mq200reg.h revision 1.1.4.2 1 /* $NetBSD: mq200reg.h,v 1.1.4.2 2000/11/20 20:46:04 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 2000 Takemura Shin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 */
31
32 #define MQ200_VENDOR_ID 0x4d51
33 #define MQ200_PRODUCT_ID 0x0200
34
35 #define MQ200_POWERSTATE_D0 0
36 #define MQ200_POWERSTATE_D1 1
37 #define MQ200_POWERSTATE_D2 2
38 #define MQ200_POWERSTATE_D3 3
39
40 #define MQ200_FRAMEBUFFER 0x000000 /* frame buffer base address */
41 #define MQ200_PM 0x600000 /* power management */
42 #define MQ200_CC 0x602000 /* CPU interface */
43 #define MQ200_MM 0x604000 /* memory interface unit */
44 #define MQ200_IN 0x608000 /* interrupt controller */
45 #define MQ200_GC 0x60a000 /* graphice controller */
46 #define MQ200_GE 0x60c000 /* graphics engine */
47 #define MQ200_FP 0x60e000 /* graphics engine */
48 #define MQ200_DC 0x614000 /* device configration */
49 #define MQ200_PC 0x616000 /* PCI configration */
50
51 /* PCI configuration space */
52 #define MQ200_PC00R (MQ200_PC+0x00) /* device/vendor ID */
53 #define MQ200_PC04R (MQ200_PC+0x04) /* command/status */
54 #define MQ200_PC08R (MQ200_PC+0x04) /* calss code/revision */
55
56 #define MQ200_PMR (MQ200_PC+0x40) /* power management */
57 #define MQ200_PMCSR (MQ200_PC+0x44) /* control/status */
58