optpoint.c revision 1.1.2.3 1 1.1.2.3 riz /* $NetBSD: optpoint.c,v 1.1.2.3 2005/09/02 15:19:20 riz Exp $ */
2 1.1.2.2 tron
3 1.1.2.2 tron /*-
4 1.1.2.2 tron * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
5 1.1.2.2 tron *
6 1.1.2.2 tron * Redistribution and use in source and binary forms, with or without
7 1.1.2.2 tron * modification, are permitted provided that the following conditions
8 1.1.2.2 tron * are met:
9 1.1.2.2 tron * 1. Redistributions of source code must retain the above copyright
10 1.1.2.2 tron * notice, this list of conditions and the following disclaimer.
11 1.1.2.2 tron * 2. Redistributions in binary form must reproduce the above copyright
12 1.1.2.2 tron * notice, this list of conditions and the following disclaimer in the
13 1.1.2.2 tron * documentation and/or other materials provided with the distribution.
14 1.1.2.2 tron *
15 1.1.2.2 tron * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 1.1.2.2 tron * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 1.1.2.2 tron * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 1.1.2.2 tron * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 1.1.2.2 tron * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 1.1.2.2 tron * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 1.1.2.2 tron * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 1.1.2.2 tron * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 1.1.2.2 tron * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1.2.2 tron * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1.2.2 tron * SUCH DAMAGE.
26 1.1.2.2 tron */
27 1.1.2.2 tron
28 1.1.2.2 tron /*
29 1.1.2.2 tron * OptOpint on Telios HC-AJ2
30 1.1.2.2 tron */
31 1.1.2.2 tron
32 1.1.2.2 tron #include <sys/cdefs.h>
33 1.1.2.2 tron
34 1.1.2.3 riz __KERNEL_RCSID(0, "$NetBSD: optpoint.c,v 1.1.2.3 2005/09/02 15:19:20 riz Exp $");
35 1.1.2.2 tron
36 1.1.2.2 tron #include <sys/param.h>
37 1.1.2.2 tron #include <sys/systm.h>
38 1.1.2.2 tron #include <sys/device.h>
39 1.1.2.2 tron #include <machine/bus.h>
40 1.1.2.3 riz #include <machine/config_hook.h>
41 1.1.2.2 tron #include <dev/hpc/hpciovar.h>
42 1.1.2.2 tron #include <dev/wscons/wsconsio.h>
43 1.1.2.2 tron #include <dev/wscons/wsmousevar.h>
44 1.1.2.2 tron #include <hpcmips/tx/tx39var.h>
45 1.1.2.2 tron #include <hpcmips/tx/tx39spivar.h>
46 1.1.2.2 tron #include <hpcmips/tx/tx39icureg.h>
47 1.1.2.2 tron
48 1.1.2.2 tron #undef OPTPOINTDEBUG
49 1.1.2.2 tron
50 1.1.2.2 tron #ifdef OPTPOINTDEBUG
51 1.1.2.2 tron #define DPRINTF(arg) printf arg
52 1.1.2.2 tron #else
53 1.1.2.2 tron #define DPRINTF(arg)
54 1.1.2.2 tron #endif
55 1.1.2.2 tron
56 1.1.2.2 tron struct optpoint_softc {
57 1.1.2.2 tron struct device sc_dev;
58 1.1.2.2 tron tx_chipset_tag_t sc_tc;
59 1.1.2.2 tron struct tx39spi_softc *sc_spi;
60 1.1.2.2 tron struct hpcio_chip *sc_hc;
61 1.1.2.2 tron struct device *sc_wsmousedev;
62 1.1.2.3 riz void *sc_powerhook; /* power management hook */
63 1.1.2.2 tron char packet[4];
64 1.1.2.2 tron int index; /* number of bytes received for this packet */
65 1.1.2.2 tron u_int buttons; /* mouse button status */
66 1.1.2.2 tron int enabled;
67 1.1.2.2 tron };
68 1.1.2.2 tron
69 1.1.2.2 tron static int optpoint_match(struct device *, struct cfdata *, void *);
70 1.1.2.2 tron static void optpoint_attach(struct device *, struct device *, void *);
71 1.1.2.2 tron static int optpoint_intr(void *);
72 1.1.2.2 tron static int optpoint_enable(void *);
73 1.1.2.2 tron static void optpoint_disable(void *);
74 1.1.2.2 tron static int optpoint_ioctl(void *, u_long, caddr_t, int, struct proc *);
75 1.1.2.2 tron static int optpoint_initialize(void *);
76 1.1.2.2 tron static void optpoint_send(struct optpoint_softc *, int);
77 1.1.2.2 tron static int optpoint_recv(struct optpoint_softc *);
78 1.1.2.3 riz static int optpoint_power(void *, int, long, void *);
79 1.1.2.2 tron
80 1.1.2.2 tron #define LBUTMASK 0x01
81 1.1.2.2 tron #define RBUTMASK 0x02
82 1.1.2.2 tron
83 1.1.2.2 tron #define TX39_INTRSTATUS4_OPTPOINTINT TX39_INTRSTATUS4_CARDIORDNEGINT
84 1.1.2.2 tron #define TX39_IO_MFIO_CARDREG 11
85 1.1.2.2 tron #define TX39_IO_MFIO_CARDIOWR 10
86 1.1.2.2 tron #define TX39_IO_MFIO_CARDIORD 9
87 1.1.2.2 tron #define TELIOS_MFIO_OPTP_T_RDY TX39_IO_MFIO_CARDREG
88 1.1.2.2 tron #define TELIOS_MFIO_OPTP_C_REQ TX39_IO_MFIO_CARDIOWR
89 1.1.2.2 tron #define TELIOS_MFIO_OPTP_S_ENB_N TX39_IO_MFIO_CARDIORD
90 1.1.2.2 tron
91 1.1.2.2 tron CFATTACH_DECL(optpoint, sizeof(struct optpoint_softc),
92 1.1.2.2 tron optpoint_match, optpoint_attach, NULL, NULL);
93 1.1.2.2 tron
94 1.1.2.2 tron const struct wsmouse_accessops optpoint_accessops = {
95 1.1.2.2 tron optpoint_enable,
96 1.1.2.2 tron optpoint_ioctl,
97 1.1.2.2 tron optpoint_disable,
98 1.1.2.2 tron };
99 1.1.2.2 tron
100 1.1.2.2 tron int
101 1.1.2.2 tron optpoint_match(struct device *parent, struct cfdata *cf, void *aux)
102 1.1.2.2 tron {
103 1.1.2.2 tron return (ATTACH_NORMAL);
104 1.1.2.2 tron }
105 1.1.2.2 tron
106 1.1.2.2 tron void
107 1.1.2.2 tron optpoint_attach(struct device *parent, struct device *self, void *aux)
108 1.1.2.2 tron {
109 1.1.2.2 tron struct txspi_attach_args *ta = aux;
110 1.1.2.2 tron struct optpoint_softc *sc = (void*)self;
111 1.1.2.2 tron struct tx39spi_softc *spi = sc->sc_spi = (void*)parent;
112 1.1.2.2 tron tx_chipset_tag_t tc = sc->sc_tc = ta->sa_tc;
113 1.1.2.2 tron struct wsmousedev_attach_args wsmaa;
114 1.1.2.2 tron
115 1.1.2.2 tron sc->sc_hc = tc->tc_iochip[MFIO];
116 1.1.2.2 tron sc->enabled = 0;
117 1.1.2.2 tron
118 1.1.2.2 tron /* Specific SPI settings for OptPoint of HC-AJ2 */
119 1.1.2.2 tron tx39spi_delayval(spi, 0);
120 1.1.2.2 tron tx39spi_baudrate(spi, 4); /* SPICLK Rate = 737.3 kHz */
121 1.1.2.2 tron tx39spi_word(spi, 0); /* Use 8bits of data */
122 1.1.2.2 tron tx39spi_phapol(spi, 0);
123 1.1.2.2 tron tx39spi_clkpol(spi, 1);
124 1.1.2.2 tron tx39spi_lsb(spi, 0); /* MSB first */
125 1.1.2.2 tron
126 1.1.2.2 tron optpoint_enable(sc);
127 1.1.2.2 tron printf("\n");
128 1.1.2.2 tron
129 1.1.2.2 tron wsmaa.accessops = &optpoint_accessops;
130 1.1.2.2 tron wsmaa.accesscookie = sc;
131 1.1.2.2 tron /* attach the wsmouse */
132 1.1.2.2 tron sc->sc_wsmousedev = config_found(self, &wsmaa, wsmousedevprint);
133 1.1.2.3 riz
134 1.1.2.3 riz /* Add a hard power hook to power saving */
135 1.1.2.3 riz sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT,
136 1.1.2.3 riz CONFIG_HOOK_PMEVENT_HARDPOWER,
137 1.1.2.3 riz CONFIG_HOOK_SHARE,
138 1.1.2.3 riz optpoint_power, sc);
139 1.1.2.3 riz #ifdef DIAGNOSTIC
140 1.1.2.3 riz if (sc->sc_powerhook == 0)
141 1.1.2.3 riz printf("%s: unable to establish hard power hook",
142 1.1.2.3 riz sc->sc_dev.dv_xname);
143 1.1.2.3 riz #endif
144 1.1.2.2 tron }
145 1.1.2.2 tron
146 1.1.2.2 tron int
147 1.1.2.2 tron optpoint_intr(void *self)
148 1.1.2.2 tron {
149 1.1.2.2 tron struct optpoint_softc *sc = (void*)self;
150 1.1.2.2 tron tx_chipset_tag_t tc = sc->sc_tc;
151 1.1.2.2 tron char data = optpoint_recv(sc) & 0xff;
152 1.1.2.2 tron
153 1.1.2.2 tron #ifdef DIAGNOSTIC
154 1.1.2.2 tron if (sc->index >= 3){
155 1.1.2.2 tron printf("%s: Receive buffer overflow\n", sc->sc_dev.dv_xname);
156 1.1.2.2 tron sc->index = 0;
157 1.1.2.2 tron memset(sc->packet, 0, 3);
158 1.1.2.2 tron }
159 1.1.2.2 tron #endif
160 1.1.2.2 tron if ((sc->index == 1) && (data & 0xcc) != 0x08){
161 1.1.2.2 tron DPRINTF(("%s: Bad second byte (0x%02x)\n",
162 1.1.2.2 tron sc->sc_dev.dv_xname, data));
163 1.1.2.2 tron tx_conf_write(tc, TX39_INTRCLEAR4_REG,
164 1.1.2.2 tron TX39_INTRSTATUS4_OPTPOINTINT);
165 1.1.2.2 tron return 0;
166 1.1.2.2 tron }
167 1.1.2.2 tron
168 1.1.2.2 tron sc->packet[sc->index++] = data;
169 1.1.2.2 tron if (sc->index >= 3){
170 1.1.2.3 riz u_int newbuttons = ((sc->packet[1] & LBUTMASK) ? 0x1 : 0)
171 1.1.2.3 riz | ((sc->packet[1] & RBUTMASK) ? 0x2 : 0);
172 1.1.2.2 tron int dx = sc->packet[2];
173 1.1.2.2 tron int dy = sc->packet[0];
174 1.1.2.2 tron u_int changed = (sc->buttons ^ newbuttons);
175 1.1.2.2 tron
176 1.1.2.2 tron if (dx || dy || changed){
177 1.1.2.3 riz DPRINTF(("%s: buttons=0x%x, dx=%d, dy=%d\n",
178 1.1.2.3 riz sc->sc_dev.dv_xname, newbuttons, dx, dy));
179 1.1.2.3 riz wsmouse_input(sc->sc_wsmousedev, newbuttons, dx, dy, 0,
180 1.1.2.2 tron WSMOUSE_INPUT_DELTA);
181 1.1.2.2 tron }
182 1.1.2.2 tron sc->buttons = newbuttons;
183 1.1.2.2 tron sc->index = 0;
184 1.1.2.2 tron memset(sc->packet, 0, 3);
185 1.1.2.2 tron }
186 1.1.2.2 tron tx_conf_write(tc, TX39_INTRCLEAR4_REG, TX39_INTRSTATUS4_OPTPOINTINT);
187 1.1.2.2 tron
188 1.1.2.2 tron return 0;
189 1.1.2.2 tron }
190 1.1.2.2 tron
191 1.1.2.2 tron int
192 1.1.2.2 tron optpoint_enable(void *self)
193 1.1.2.2 tron {
194 1.1.2.2 tron struct optpoint_softc *sc = (void*)self;
195 1.1.2.2 tron
196 1.1.2.2 tron if (!sc->enabled){
197 1.1.2.2 tron tx_chipset_tag_t tc = sc->sc_tc;
198 1.1.2.2 tron struct hpcio_chip *hc = sc->sc_hc;
199 1.1.2.2 tron int s = spltty();
200 1.1.2.2 tron
201 1.1.2.3 riz DPRINTF(("%s: enable\n", sc->sc_dev.dv_xname));
202 1.1.2.3 riz
203 1.1.2.2 tron sc->enabled = 1;
204 1.1.2.2 tron sc->index = 0;
205 1.1.2.2 tron sc->buttons = 0;
206 1.1.2.2 tron sc->packet[0] = 0xf5; /* Disable */
207 1.1.2.2 tron sc->packet[1] = 0xf2; /* Set Stream Mode */
208 1.1.2.2 tron sc->packet[2] = 0xf8; /* Stanby */
209 1.1.2.2 tron sc->packet[3] = 0xf4; /* Enable */
210 1.1.2.2 tron
211 1.1.2.2 tron tx39spi_enable(sc->sc_spi, 1);
212 1.1.2.2 tron tx_intr_establish(tc, MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT),
213 1.1.2.2 tron IST_EDGE, IPL_TTY, optpoint_initialize, sc);
214 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 1);
215 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1);
216 1.1.2.2 tron splx(s);
217 1.1.2.2 tron }
218 1.1.2.2 tron
219 1.1.2.2 tron return 0;
220 1.1.2.2 tron }
221 1.1.2.2 tron
222 1.1.2.2 tron void
223 1.1.2.2 tron optpoint_disable(void *self)
224 1.1.2.2 tron {
225 1.1.2.2 tron struct optpoint_softc *sc = (void*)self;
226 1.1.2.2 tron
227 1.1.2.2 tron if (sc->enabled){
228 1.1.2.2 tron tx_chipset_tag_t tc = sc->sc_tc;
229 1.1.2.2 tron struct hpcio_chip *hc = sc->sc_hc;
230 1.1.2.2 tron int s = spltty();
231 1.1.2.2 tron
232 1.1.2.3 riz DPRINTF(("%s: disable\n", sc->sc_dev.dv_xname));
233 1.1.2.3 riz
234 1.1.2.2 tron sc->enabled = 0;
235 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 0);
236 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 0);
237 1.1.2.2 tron tx_intr_disestablish(tc,
238 1.1.2.2 tron (void *)MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT));
239 1.1.2.2 tron tx39spi_enable(sc->sc_spi, 0);
240 1.1.2.2 tron splx(s);
241 1.1.2.2 tron }
242 1.1.2.2 tron }
243 1.1.2.2 tron
244 1.1.2.2 tron int
245 1.1.2.2 tron optpoint_ioctl(void *self, u_long cmd, caddr_t data, int flag, struct proc *p)
246 1.1.2.2 tron {
247 1.1.2.2 tron switch (cmd) {
248 1.1.2.2 tron case WSMOUSEIO_GTYPE:
249 1.1.2.2 tron *(u_int *)data = WSMOUSE_TYPE_PS2;
250 1.1.2.2 tron break;
251 1.1.2.2 tron
252 1.1.2.2 tron default:
253 1.1.2.2 tron return (EPASSTHROUGH);
254 1.1.2.2 tron }
255 1.1.2.2 tron return 0;
256 1.1.2.2 tron }
257 1.1.2.2 tron
258 1.1.2.2 tron int
259 1.1.2.2 tron optpoint_initialize(void *self)
260 1.1.2.2 tron {
261 1.1.2.2 tron struct optpoint_softc *sc = (void*)self;
262 1.1.2.2 tron struct hpcio_chip *hc = sc->sc_hc;
263 1.1.2.2 tron tx_chipset_tag_t tc = sc->sc_tc;
264 1.1.2.2 tron
265 1.1.2.2 tron if (sc->index < 4){
266 1.1.2.2 tron optpoint_send(sc, sc->packet[sc->index++]);
267 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 1);
268 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1);
269 1.1.2.2 tron } else {
270 1.1.2.2 tron tx_intr_disestablish(tc,
271 1.1.2.2 tron (void *)MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT));
272 1.1.2.2 tron sc->index = 0;
273 1.1.2.2 tron memset(sc->packet, 0, 3);
274 1.1.2.2 tron tx_intr_establish(tc,
275 1.1.2.2 tron MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT),
276 1.1.2.2 tron IST_EDGE, IPL_TTY, optpoint_intr, sc);
277 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 0);
278 1.1.2.2 tron (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1);
279 1.1.2.2 tron }
280 1.1.2.2 tron tx_conf_write(tc, TX39_INTRCLEAR4_REG, TX39_INTRSTATUS4_OPTPOINTINT);
281 1.1.2.2 tron
282 1.1.2.2 tron return 0;
283 1.1.2.2 tron }
284 1.1.2.2 tron
285 1.1.2.2 tron void
286 1.1.2.2 tron optpoint_send(struct optpoint_softc *sc, int data)
287 1.1.2.2 tron {
288 1.1.2.2 tron struct hpcio_chip *hc = sc->sc_hc;
289 1.1.2.2 tron
290 1.1.2.2 tron while ((*hc->hc_portread)(hc, TELIOS_MFIO_OPTP_S_ENB_N))
291 1.1.2.2 tron ;
292 1.1.2.2 tron tx39spi_put_word(sc->sc_spi, data & 0xff);
293 1.1.2.2 tron }
294 1.1.2.2 tron
295 1.1.2.2 tron int
296 1.1.2.2 tron optpoint_recv(struct optpoint_softc *sc)
297 1.1.2.2 tron {
298 1.1.2.2 tron struct hpcio_chip *hc = sc->sc_hc;
299 1.1.2.2 tron
300 1.1.2.2 tron optpoint_send(sc, 0x00);
301 1.1.2.2 tron while ((*hc->hc_portread)(hc, TELIOS_MFIO_OPTP_S_ENB_N))
302 1.1.2.2 tron ;
303 1.1.2.2 tron return tx39spi_get_word(sc->sc_spi) & 0xff;
304 1.1.2.2 tron }
305 1.1.2.3 riz
306 1.1.2.3 riz int
307 1.1.2.3 riz optpoint_power(void *self, int type, long id, void *msg)
308 1.1.2.3 riz {
309 1.1.2.3 riz struct optpoint_softc *sc = (void *)self;
310 1.1.2.3 riz int why = (int)msg;
311 1.1.2.3 riz
312 1.1.2.3 riz switch (why) {
313 1.1.2.3 riz case PWR_RESUME:
314 1.1.2.3 riz /* power on */
315 1.1.2.3 riz optpoint_enable(sc);
316 1.1.2.3 riz break;
317 1.1.2.3 riz case PWR_SUSPEND:
318 1.1.2.3 riz /* FALLTHROUGH */
319 1.1.2.3 riz case PWR_STANDBY:
320 1.1.2.3 riz /* power off */
321 1.1.2.3 riz optpoint_disable(sc);
322 1.1.2.3 riz break;
323 1.1.2.3 riz }
324 1.1.2.3 riz
325 1.1.2.3 riz return 0;
326 1.1.2.3 riz }
327