optpoint.c revision 1.2.2.2
1 1.2.2.2 riz /* $NetBSD: optpoint.c,v 1.2.2.2 2005/05/16 21:05:26 riz Exp $ */ 2 1.2.2.2 riz 3 1.2.2.2 riz /*- 4 1.2.2.2 riz * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved. 5 1.2.2.2 riz * 6 1.2.2.2 riz * Redistribution and use in source and binary forms, with or without 7 1.2.2.2 riz * modification, are permitted provided that the following conditions 8 1.2.2.2 riz * are met: 9 1.2.2.2 riz * 1. Redistributions of source code must retain the above copyright 10 1.2.2.2 riz * notice, this list of conditions and the following disclaimer. 11 1.2.2.2 riz * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.2.2 riz * notice, this list of conditions and the following disclaimer in the 13 1.2.2.2 riz * documentation and/or other materials provided with the distribution. 14 1.2.2.2 riz * 15 1.2.2.2 riz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 1.2.2.2 riz * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.2.2.2 riz * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.2.2.2 riz * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 1.2.2.2 riz * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 1.2.2.2 riz * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 1.2.2.2 riz * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.2.2.2 riz * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.2.2.2 riz * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.2.2.2 riz * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.2.2.2 riz * SUCH DAMAGE. 26 1.2.2.2 riz */ 27 1.2.2.2 riz 28 1.2.2.2 riz /* 29 1.2.2.2 riz * OptOpint on Telios HC-AJ2 30 1.2.2.2 riz */ 31 1.2.2.2 riz 32 1.2.2.2 riz #include <sys/cdefs.h> 33 1.2.2.2 riz 34 1.2.2.2 riz __KERNEL_RCSID(0, "$NetBSD: optpoint.c,v 1.2.2.2 2005/05/16 21:05:26 riz Exp $"); 35 1.2.2.2 riz 36 1.2.2.2 riz #include <sys/param.h> 37 1.2.2.2 riz #include <sys/systm.h> 38 1.2.2.2 riz #include <sys/device.h> 39 1.2.2.2 riz #include <machine/bus.h> 40 1.2.2.2 riz #include <dev/hpc/hpciovar.h> 41 1.2.2.2 riz #include <dev/wscons/wsconsio.h> 42 1.2.2.2 riz #include <dev/wscons/wsmousevar.h> 43 1.2.2.2 riz #include <hpcmips/tx/tx39var.h> 44 1.2.2.2 riz #include <hpcmips/tx/tx39spivar.h> 45 1.2.2.2 riz #include <hpcmips/tx/tx39icureg.h> 46 1.2.2.2 riz 47 1.2.2.2 riz #undef OPTPOINTDEBUG 48 1.2.2.2 riz 49 1.2.2.2 riz #ifdef OPTPOINTDEBUG 50 1.2.2.2 riz #define DPRINTF(arg) printf arg 51 1.2.2.2 riz #else 52 1.2.2.2 riz #define DPRINTF(arg) 53 1.2.2.2 riz #endif 54 1.2.2.2 riz 55 1.2.2.2 riz struct optpoint_softc { 56 1.2.2.2 riz struct device sc_dev; 57 1.2.2.2 riz tx_chipset_tag_t sc_tc; 58 1.2.2.2 riz struct tx39spi_softc *sc_spi; 59 1.2.2.2 riz struct hpcio_chip *sc_hc; 60 1.2.2.2 riz struct device *sc_wsmousedev; 61 1.2.2.2 riz char packet[4]; 62 1.2.2.2 riz int index; /* number of bytes received for this packet */ 63 1.2.2.2 riz u_int buttons; /* mouse button status */ 64 1.2.2.2 riz int enabled; 65 1.2.2.2 riz }; 66 1.2.2.2 riz 67 1.2.2.2 riz static int optpoint_match(struct device *, struct cfdata *, void *); 68 1.2.2.2 riz static void optpoint_attach(struct device *, struct device *, void *); 69 1.2.2.2 riz static int optpoint_intr(void *); 70 1.2.2.2 riz static int optpoint_enable(void *); 71 1.2.2.2 riz static void optpoint_disable(void *); 72 1.2.2.2 riz static int optpoint_ioctl(void *, u_long, caddr_t, int, struct proc *); 73 1.2.2.2 riz static int optpoint_initialize(void *); 74 1.2.2.2 riz static void optpoint_send(struct optpoint_softc *, int); 75 1.2.2.2 riz static int optpoint_recv(struct optpoint_softc *); 76 1.2.2.2 riz 77 1.2.2.2 riz #define LBUTMASK 0x01 78 1.2.2.2 riz #define RBUTMASK 0x02 79 1.2.2.2 riz 80 1.2.2.2 riz #define TX39_INTRSTATUS4_OPTPOINTINT TX39_INTRSTATUS4_CARDIORDNEGINT 81 1.2.2.2 riz #define TX39_IO_MFIO_CARDREG 11 82 1.2.2.2 riz #define TX39_IO_MFIO_CARDIOWR 10 83 1.2.2.2 riz #define TX39_IO_MFIO_CARDIORD 9 84 1.2.2.2 riz #define TELIOS_MFIO_OPTP_T_RDY TX39_IO_MFIO_CARDREG 85 1.2.2.2 riz #define TELIOS_MFIO_OPTP_C_REQ TX39_IO_MFIO_CARDIOWR 86 1.2.2.2 riz #define TELIOS_MFIO_OPTP_S_ENB_N TX39_IO_MFIO_CARDIORD 87 1.2.2.2 riz 88 1.2.2.2 riz CFATTACH_DECL(optpoint, sizeof(struct optpoint_softc), 89 1.2.2.2 riz optpoint_match, optpoint_attach, NULL, NULL); 90 1.2.2.2 riz 91 1.2.2.2 riz const struct wsmouse_accessops optpoint_accessops = { 92 1.2.2.2 riz optpoint_enable, 93 1.2.2.2 riz optpoint_ioctl, 94 1.2.2.2 riz optpoint_disable, 95 1.2.2.2 riz }; 96 1.2.2.2 riz 97 1.2.2.2 riz int 98 1.2.2.2 riz optpoint_match(struct device *parent, struct cfdata *cf, void *aux) 99 1.2.2.2 riz { 100 1.2.2.2 riz return (ATTACH_NORMAL); 101 1.2.2.2 riz } 102 1.2.2.2 riz 103 1.2.2.2 riz void 104 1.2.2.2 riz optpoint_attach(struct device *parent, struct device *self, void *aux) 105 1.2.2.2 riz { 106 1.2.2.2 riz struct txspi_attach_args *ta = aux; 107 1.2.2.2 riz struct optpoint_softc *sc = (void*)self; 108 1.2.2.2 riz struct tx39spi_softc *spi = sc->sc_spi = (void*)parent; 109 1.2.2.2 riz tx_chipset_tag_t tc = sc->sc_tc = ta->sa_tc; 110 1.2.2.2 riz struct wsmousedev_attach_args wsmaa; 111 1.2.2.2 riz 112 1.2.2.2 riz sc->sc_hc = tc->tc_iochip[MFIO]; 113 1.2.2.2 riz sc->enabled = 0; 114 1.2.2.2 riz 115 1.2.2.2 riz /* Specific SPI settings for OptPoint of HC-AJ2 */ 116 1.2.2.2 riz tx39spi_delayval(spi, 0); 117 1.2.2.2 riz tx39spi_baudrate(spi, 4); /* SPICLK Rate = 737.3 kHz */ 118 1.2.2.2 riz tx39spi_word(spi, 0); /* Use 8bits of data */ 119 1.2.2.2 riz tx39spi_phapol(spi, 0); 120 1.2.2.2 riz tx39spi_clkpol(spi, 1); 121 1.2.2.2 riz tx39spi_lsb(spi, 0); /* MSB first */ 122 1.2.2.2 riz 123 1.2.2.2 riz optpoint_enable(sc); 124 1.2.2.2 riz printf("\n"); 125 1.2.2.2 riz 126 1.2.2.2 riz wsmaa.accessops = &optpoint_accessops; 127 1.2.2.2 riz wsmaa.accesscookie = sc; 128 1.2.2.2 riz /* attach the wsmouse */ 129 1.2.2.2 riz sc->sc_wsmousedev = config_found(self, &wsmaa, wsmousedevprint); 130 1.2.2.2 riz } 131 1.2.2.2 riz 132 1.2.2.2 riz int 133 1.2.2.2 riz optpoint_intr(void *self) 134 1.2.2.2 riz { 135 1.2.2.2 riz struct optpoint_softc *sc = (void*)self; 136 1.2.2.2 riz tx_chipset_tag_t tc = sc->sc_tc; 137 1.2.2.2 riz char data = optpoint_recv(sc) & 0xff; 138 1.2.2.2 riz 139 1.2.2.2 riz #ifdef DIAGNOSTIC 140 1.2.2.2 riz if (sc->index >= 3){ 141 1.2.2.2 riz printf("%s: Receive buffer overflow\n", sc->sc_dev.dv_xname); 142 1.2.2.2 riz sc->index = 0; 143 1.2.2.2 riz memset(sc->packet, 0, 3); 144 1.2.2.2 riz } 145 1.2.2.2 riz #endif 146 1.2.2.2 riz if ((sc->index == 1) && (data & 0xcc) != 0x08){ 147 1.2.2.2 riz DPRINTF(("%s: Bad second byte (0x%02x)\n", 148 1.2.2.2 riz sc->sc_dev.dv_xname, data)); 149 1.2.2.2 riz tx_conf_write(tc, TX39_INTRCLEAR4_REG, 150 1.2.2.2 riz TX39_INTRSTATUS4_OPTPOINTINT); 151 1.2.2.2 riz return 0; 152 1.2.2.2 riz } 153 1.2.2.2 riz 154 1.2.2.2 riz sc->packet[sc->index++] = data; 155 1.2.2.2 riz if (sc->index >= 3){ 156 1.2.2.2 riz u_int newbuttons = ((sc->packet[1] & LBUTMASK) ? 0x1 : 0) | 157 1.2.2.2 riz ((sc->packet[1] & RBUTMASK) ? 0x2 : 0); 158 1.2.2.2 riz int dx = sc->packet[2]; 159 1.2.2.2 riz int dy = sc->packet[0]; 160 1.2.2.2 riz u_int changed = (sc->buttons ^ newbuttons); 161 1.2.2.2 riz 162 1.2.2.2 riz if (dx || dy || changed){ 163 1.2.2.2 riz DPRINTF(("buttons=0x%x, dx=%d, dy=%d\n", 164 1.2.2.2 riz newbuttons, dx, dy)); 165 1.2.2.2 riz wsmouse_input(sc->sc_wsmousedev, 166 1.2.2.2 riz sc->buttons, dx, dy, 0, 167 1.2.2.2 riz WSMOUSE_INPUT_DELTA); 168 1.2.2.2 riz } 169 1.2.2.2 riz sc->buttons = newbuttons; 170 1.2.2.2 riz sc->index = 0; 171 1.2.2.2 riz memset(sc->packet, 0, 3); 172 1.2.2.2 riz } 173 1.2.2.2 riz tx_conf_write(tc, TX39_INTRCLEAR4_REG, TX39_INTRSTATUS4_OPTPOINTINT); 174 1.2.2.2 riz 175 1.2.2.2 riz return 0; 176 1.2.2.2 riz } 177 1.2.2.2 riz 178 1.2.2.2 riz int 179 1.2.2.2 riz optpoint_enable(void *self) 180 1.2.2.2 riz { 181 1.2.2.2 riz struct optpoint_softc *sc = (void*)self; 182 1.2.2.2 riz 183 1.2.2.2 riz if (!sc->enabled){ 184 1.2.2.2 riz tx_chipset_tag_t tc = sc->sc_tc; 185 1.2.2.2 riz struct hpcio_chip *hc = sc->sc_hc; 186 1.2.2.2 riz int s = spltty(); 187 1.2.2.2 riz 188 1.2.2.2 riz sc->enabled = 1; 189 1.2.2.2 riz sc->index = 0; 190 1.2.2.2 riz sc->buttons = 0; 191 1.2.2.2 riz sc->packet[0] = 0xf5; /* Disable */ 192 1.2.2.2 riz sc->packet[1] = 0xf2; /* Set Stream Mode */ 193 1.2.2.2 riz sc->packet[2] = 0xf8; /* Stanby */ 194 1.2.2.2 riz sc->packet[3] = 0xf4; /* Enable */ 195 1.2.2.2 riz 196 1.2.2.2 riz tx39spi_enable(sc->sc_spi, 1); 197 1.2.2.2 riz tx_intr_establish(tc, MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT), 198 1.2.2.2 riz IST_EDGE, IPL_TTY, optpoint_initialize, sc); 199 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 1); 200 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1); 201 1.2.2.2 riz splx(s); 202 1.2.2.2 riz } 203 1.2.2.2 riz 204 1.2.2.2 riz return 0; 205 1.2.2.2 riz } 206 1.2.2.2 riz 207 1.2.2.2 riz void 208 1.2.2.2 riz optpoint_disable(void *self) 209 1.2.2.2 riz { 210 1.2.2.2 riz struct optpoint_softc *sc = (void*)self; 211 1.2.2.2 riz 212 1.2.2.2 riz if (sc->enabled){ 213 1.2.2.2 riz tx_chipset_tag_t tc = sc->sc_tc; 214 1.2.2.2 riz struct hpcio_chip *hc = sc->sc_hc; 215 1.2.2.2 riz int s = spltty(); 216 1.2.2.2 riz 217 1.2.2.2 riz sc->enabled = 0; 218 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 0); 219 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 0); 220 1.2.2.2 riz tx_intr_disestablish(tc, 221 1.2.2.2 riz (void *)MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT)); 222 1.2.2.2 riz tx39spi_enable(sc->sc_spi, 0); 223 1.2.2.2 riz splx(s); 224 1.2.2.2 riz } 225 1.2.2.2 riz } 226 1.2.2.2 riz 227 1.2.2.2 riz int 228 1.2.2.2 riz optpoint_ioctl(void *self, u_long cmd, caddr_t data, int flag, struct proc *p) 229 1.2.2.2 riz { 230 1.2.2.2 riz switch (cmd) { 231 1.2.2.2 riz case WSMOUSEIO_GTYPE: 232 1.2.2.2 riz *(u_int *)data = WSMOUSE_TYPE_PS2; 233 1.2.2.2 riz break; 234 1.2.2.2 riz 235 1.2.2.2 riz default: 236 1.2.2.2 riz return (EPASSTHROUGH); 237 1.2.2.2 riz } 238 1.2.2.2 riz return 0; 239 1.2.2.2 riz } 240 1.2.2.2 riz 241 1.2.2.2 riz int 242 1.2.2.2 riz optpoint_initialize(void *self) 243 1.2.2.2 riz { 244 1.2.2.2 riz struct optpoint_softc *sc = (void*)self; 245 1.2.2.2 riz struct hpcio_chip *hc = sc->sc_hc; 246 1.2.2.2 riz tx_chipset_tag_t tc = sc->sc_tc; 247 1.2.2.2 riz 248 1.2.2.2 riz if (sc->index < 4){ 249 1.2.2.2 riz optpoint_send(sc, sc->packet[sc->index++]); 250 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 1); 251 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1); 252 1.2.2.2 riz } else { 253 1.2.2.2 riz tx_intr_disestablish(tc, 254 1.2.2.2 riz (void *)MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT)); 255 1.2.2.2 riz sc->index = 0; 256 1.2.2.2 riz memset(sc->packet, 0, 3); 257 1.2.2.2 riz tx_intr_establish(tc, 258 1.2.2.2 riz MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT), 259 1.2.2.2 riz IST_EDGE, IPL_TTY, optpoint_intr, sc); 260 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 0); 261 1.2.2.2 riz (*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1); 262 1.2.2.2 riz } 263 1.2.2.2 riz tx_conf_write(tc, TX39_INTRCLEAR4_REG, TX39_INTRSTATUS4_OPTPOINTINT); 264 1.2.2.2 riz 265 1.2.2.2 riz return 0; 266 1.2.2.2 riz } 267 1.2.2.2 riz 268 1.2.2.2 riz void 269 1.2.2.2 riz optpoint_send(struct optpoint_softc *sc, int data) 270 1.2.2.2 riz { 271 1.2.2.2 riz struct hpcio_chip *hc = sc->sc_hc; 272 1.2.2.2 riz 273 1.2.2.2 riz while ((*hc->hc_portread)(hc, TELIOS_MFIO_OPTP_S_ENB_N)) 274 1.2.2.2 riz ; 275 1.2.2.2 riz tx39spi_put_word(sc->sc_spi, data & 0xff); 276 1.2.2.2 riz } 277 1.2.2.2 riz 278 1.2.2.2 riz int 279 1.2.2.2 riz optpoint_recv(struct optpoint_softc *sc) 280 1.2.2.2 riz { 281 1.2.2.2 riz struct hpcio_chip *hc = sc->sc_hc; 282 1.2.2.2 riz 283 1.2.2.2 riz optpoint_send(sc, 0x00); 284 1.2.2.2 riz while ((*hc->hc_portread)(hc, TELIOS_MFIO_OPTP_S_ENB_N)) 285 1.2.2.2 riz ; 286 1.2.2.2 riz return tx39spi_get_word(sc->sc_spi) & 0xff; 287 1.2.2.2 riz } 288
Indexes created Thu Oct 02 14:10:14 GMT 2025