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plumicu.c revision 1.8
      1  1.8    lukem /*	$NetBSD: plumicu.c,v 1.8 2003/07/15 02:29:30 lukem Exp $ */
      2  1.1      uch 
      3  1.4      uch /*-
      4  1.4      uch  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  1.1      uch  * All rights reserved.
      6  1.1      uch  *
      7  1.4      uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.4      uch  * by UCHIYAMA Yasushi.
      9  1.4      uch  *
     10  1.1      uch  * Redistribution and use in source and binary forms, with or without
     11  1.1      uch  * modification, are permitted provided that the following conditions
     12  1.1      uch  * are met:
     13  1.1      uch  * 1. Redistributions of source code must retain the above copyright
     14  1.1      uch  *    notice, this list of conditions and the following disclaimer.
     15  1.4      uch  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.4      uch  *    notice, this list of conditions and the following disclaimer in the
     17  1.4      uch  *    documentation and/or other materials provided with the distribution.
     18  1.4      uch  * 3. All advertising materials mentioning features or use of this software
     19  1.4      uch  *    must display the following acknowledgement:
     20  1.4      uch  *        This product includes software developed by the NetBSD
     21  1.4      uch  *        Foundation, Inc. and its contributors.
     22  1.4      uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.4      uch  *    contributors may be used to endorse or promote products derived
     24  1.4      uch  *    from this software without specific prior written permission.
     25  1.1      uch  *
     26  1.4      uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.4      uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.4      uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.4      uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.4      uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.4      uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.4      uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.4      uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.4      uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.4      uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.4      uch  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1      uch  */
     38  1.8    lukem 
     39  1.8    lukem #include <sys/cdefs.h>
     40  1.8    lukem __KERNEL_RCSID(0, "$NetBSD: plumicu.c,v 1.8 2003/07/15 02:29:30 lukem Exp $");
     41  1.1      uch 
     42  1.1      uch #include <sys/param.h>
     43  1.1      uch #include <sys/systm.h>
     44  1.1      uch #include <sys/device.h>
     45  1.1      uch 
     46  1.1      uch #include <machine/bus.h>
     47  1.1      uch #include <machine/intr.h>
     48  1.1      uch 
     49  1.1      uch #include <hpcmips/tx/tx39var.h>
     50  1.1      uch #include <hpcmips/dev/plumvar.h>
     51  1.1      uch #include <hpcmips/dev/plumicuvar.h>
     52  1.1      uch #include <hpcmips/dev/plumicureg.h>
     53  1.1      uch 
     54  1.1      uch #ifdef PLUMICUDEBUG
     55  1.1      uch #define	DPRINTF(arg) printf arg
     56  1.1      uch #else
     57  1.1      uch #define	DPRINTF(arg)
     58  1.1      uch #endif
     59  1.1      uch 
     60  1.4      uch int plumicu_match(struct device *, struct cfdata *, void *);
     61  1.4      uch void plumicu_attach(struct device *, struct device *, void *);
     62  1.4      uch int plumicu_intr(void *);
     63  1.1      uch 
     64  1.4      uch static __inline__ void plum_di(plum_chipset_tag_t);
     65  1.4      uch static __inline__ void plum_ei(plum_chipset_tag_t);
     66  1.3      uch 
     67  1.3      uch const struct plum_intr_ctrl {
     68  1.1      uch 	plumreg_t	ic_ackpat1;
     69  1.2      uch 	plumreg_t	ic_ackpat2;	int	ic_ackreg2;
     70  1.2      uch 	plumreg_t	ic_ienpat;	int	ic_ienreg;
     71  1.2      uch 	plumreg_t	ic_senpat;	int	ic_senreg;
     72  1.2      uch } pi_ctrl[PLUM_INTR_MAX] = {
     73  1.1      uch 	[PLUM_INT_C1IO]	= {PLUM_INT_INTSTA_PCCINT,
     74  1.1      uch 			   PLUM_INT_PCCINTS_C1IO,	PLUM_INT_PCCINTS_REG,
     75  1.4      uch 			   PLUM_INT_PCCIEN_IENC1IO,	PLUM_INT_PCCIEN_REG,
     76  1.1      uch 			   PLUM_INT_PCCIEN_SENC1IO,	PLUM_INT_PCCIEN_REG
     77  1.1      uch 	},
     78  1.1      uch 	[PLUM_INT_C1RI] = {PLUM_INT_INTSTA_PCCINT,
     79  1.1      uch 			   PLUM_INT_PCCINTS_C1RI,	PLUM_INT_PCCINTS_REG,
     80  1.1      uch 			   PLUM_INT_PCCIEN_IENC1RI,	PLUM_INT_PCCIEN_REG,
     81  1.1      uch 			   PLUM_INT_PCCIEN_SENC1RI,	PLUM_INT_PCCIEN_REG
     82  1.1      uch 	},
     83  1.1      uch 	[PLUM_INT_C1SC] = {PLUM_INT_INTSTA_C1SCINT,	0, 0, 0, 0, 0, 0},
     84  1.1      uch 	[PLUM_INT_C2IO] = {PLUM_INT_INTSTA_PCCINT,
     85  1.1      uch 			   PLUM_INT_PCCINTS_C2IO,	PLUM_INT_PCCINTS_REG,
     86  1.1      uch 			   PLUM_INT_PCCIEN_IENC2IO,	PLUM_INT_PCCIEN_REG,
     87  1.1      uch 			   PLUM_INT_PCCIEN_SENC2IO,	PLUM_INT_PCCIEN_REG
     88  1.1      uch 	},
     89  1.1      uch 	[PLUM_INT_C2RI] = {PLUM_INT_INTSTA_PCCINT,
     90  1.1      uch 			   PLUM_INT_PCCINTS_C2RI,	PLUM_INT_PCCINTS_REG,
     91  1.1      uch 			   PLUM_INT_PCCIEN_IENC2RI,	PLUM_INT_PCCIEN_REG,
     92  1.1      uch 			   PLUM_INT_PCCIEN_SENC2RI,	PLUM_INT_PCCIEN_REG
     93  1.1      uch 	},
     94  1.1      uch 	[PLUM_INT_C2SC] = {PLUM_INT_INTSTA_C2SCINT,	0, 0, 0, 0, 0, 0},
     95  1.1      uch 	[PLUM_INT_DISP] = {PLUM_INT_INTSTA_DISPINT,	0, 0, 0, 0, 0, 0},
     96  1.1      uch 	[PLUM_INT_USB]  = {PLUM_INT_INTSTA_USBINT,
     97  1.1      uch 			   0, 0,
     98  1.1      uch 			   PLUM_INT_USBINTEN_IEN,	PLUM_INT_USBINTEN_REG,
     99  1.1      uch 			   0, 0
    100  1.1      uch 	},
    101  1.1      uch 	[PLUM_INT_USBWAKE] = {PLUM_INT_INTSTA_USBWAKE,
    102  1.1      uch 			   0, 0,
    103  1.1      uch 			   PLUM_INT_USBINTEN_WIEN,	PLUM_INT_USBINTEN_REG,
    104  1.1      uch 			   0, 0
    105  1.1      uch 	},
    106  1.1      uch 	[PLUM_INT_SM]	= {PLUM_INT_INTSTA_SMINT,
    107  1.1      uch 			   0, 0,
    108  1.1      uch 			   PLUM_INT_SMIEN,		PLUM_INT_SMIEN_REG,
    109  1.1      uch 			   0, 0
    110  1.1      uch 	},
    111  1.1      uch 	[PLUM_INT_EXT5IO0] = {PLUM_INT_INTSTA_EXTINT,
    112  1.1      uch 			   PLUM_INT_EXTINTS_IO5INT0,	PLUM_INT_EXTINTS_REG,
    113  1.1      uch 			   PLUM_INT_EXTIEN_IENIO5INT0,	PLUM_INT_EXTIEN_REG,
    114  1.1      uch 			   PLUM_INT_EXTIEN_SENIO5INT0,	PLUM_INT_EXTIEN_REG,
    115  1.1      uch 	},
    116  1.1      uch 	[PLUM_INT_EXT5IO1] = {PLUM_INT_INTSTA_EXTINT,
    117  1.1      uch 			   PLUM_INT_EXTINTS_IO5INT1,	PLUM_INT_EXTINTS_REG,
    118  1.1      uch 			   PLUM_INT_EXTIEN_IENIO5INT1,	PLUM_INT_EXTIEN_REG,
    119  1.1      uch 			   PLUM_INT_EXTIEN_SENIO5INT1,	PLUM_INT_EXTIEN_REG,
    120  1.1      uch 	},
    121  1.1      uch 	[PLUM_INT_EXT5IO2] = {PLUM_INT_INTSTA_EXTINT,
    122  1.1      uch 			   PLUM_INT_EXTINTS_IO5INT2,	PLUM_INT_EXTINTS_REG,
    123  1.1      uch 			   PLUM_INT_EXTIEN_IENIO5INT2,	PLUM_INT_EXTIEN_REG,
    124  1.1      uch 			   PLUM_INT_EXTIEN_SENIO5INT2,	PLUM_INT_EXTIEN_REG,
    125  1.1      uch 	},
    126  1.1      uch 	[PLUM_INT_EXT5IO3] = {PLUM_INT_INTSTA_EXTINT,
    127  1.1      uch 			   PLUM_INT_EXTINTS_IO5INT3,	PLUM_INT_EXTINTS_REG,
    128  1.1      uch 			   PLUM_INT_EXTIEN_IENIO5INT0,	PLUM_INT_EXTIEN_REG,
    129  1.1      uch 			   PLUM_INT_EXTIEN_SENIO5INT0,	PLUM_INT_EXTIEN_REG,
    130  1.1      uch 	},
    131  1.1      uch 	[PLUM_INT_EXT3IO0] = {PLUM_INT_INTSTA_EXTINT,
    132  1.1      uch 			   PLUM_INT_EXTINTS_IO3INT0,	PLUM_INT_EXTINTS_REG,
    133  1.1      uch 			   PLUM_INT_EXTIEN_IENIO3INT0,	PLUM_INT_EXTIEN_REG,
    134  1.1      uch 			   PLUM_INT_EXTIEN_SENIO3INT0,	PLUM_INT_EXTIEN_REG,
    135  1.1      uch 	},
    136  1.1      uch 	[PLUM_INT_EXT3IO1] = {PLUM_INT_INTSTA_EXTINT,
    137  1.1      uch 			   PLUM_INT_EXTINTS_IO3INT1,	PLUM_INT_EXTINTS_REG,
    138  1.1      uch 			   PLUM_INT_EXTIEN_IENIO3INT1,	PLUM_INT_EXTIEN_REG,
    139  1.1      uch 			   PLUM_INT_EXTIEN_SENIO3INT1,	PLUM_INT_EXTIEN_REG,
    140  1.1      uch 	}
    141  1.1      uch };
    142  1.1      uch 
    143  1.1      uch struct plum_intr_entry {
    144  1.3      uch 	int pi_enabled;
    145  1.1      uch 	int pi_line;
    146  1.4      uch 	int (*pi_fun)(void *);
    147  1.1      uch 	void *pi_arg;
    148  1.3      uch 	const struct plum_intr_ctrl *pi_ctrl;
    149  1.1      uch };
    150  1.1      uch 
    151  1.1      uch struct plumicu_softc {
    152  1.1      uch 	struct	device		sc_dev;
    153  1.1      uch 	plum_chipset_tag_t	sc_pc;
    154  1.1      uch 	bus_space_tag_t		sc_regt;
    155  1.1      uch 	bus_space_handle_t	sc_regh;
    156  1.1      uch 	void			*sc_ih;
    157  1.1      uch 	int			sc_enable_count;
    158  1.3      uch 	struct plum_intr_entry  sc_intr[PLUM_INTR_MAX];
    159  1.1      uch };
    160  1.1      uch 
    161  1.7  thorpej CFATTACH_DECL(plumicu, sizeof(struct plumicu_softc),
    162  1.7  thorpej     plumicu_match, plumicu_attach, NULL, NULL);
    163  1.1      uch 
    164  1.3      uch #ifdef PLUMICUDEBUG
    165  1.4      uch void plumicu_dump(struct plumicu_softc *);
    166  1.3      uch #endif
    167  1.1      uch 
    168  1.1      uch int
    169  1.4      uch plumicu_match(struct device *parent, struct cfdata *cf, void *aux)
    170  1.1      uch {
    171  1.4      uch 
    172  1.3      uch 	return (2); /* 1st attach group */
    173  1.1      uch }
    174  1.1      uch 
    175  1.1      uch void
    176  1.4      uch plumicu_attach(struct device *parent, struct device *self, void *aux)
    177  1.1      uch {
    178  1.1      uch 	struct plum_attach_args *pa = aux;
    179  1.1      uch 	struct plumicu_softc *sc = (void*)self;
    180  1.3      uch 	const struct plum_intr_ctrl *pic;
    181  1.1      uch 	bus_space_tag_t regt;
    182  1.1      uch 	bus_space_handle_t regh;
    183  1.1      uch 	plumreg_t reg;
    184  1.1      uch 	int i;
    185  1.1      uch 
    186  1.1      uch 	sc->sc_pc	= pa->pa_pc;
    187  1.1      uch 	sc->sc_regt	= pa->pa_regt;
    188  1.1      uch 
    189  1.1      uch 	/* map plum2 interrupt controller register space */
    190  1.1      uch 	if (bus_space_map(sc->sc_regt, PLUM_INT_REGBASE,
    191  1.1      uch 			  PLUM_INT_REGSIZE, 0, &sc->sc_regh)) {
    192  1.1      uch 		printf(":interrupt register map failed\n");
    193  1.1      uch 		return;
    194  1.1      uch 	}
    195  1.3      uch #ifdef PLUMICUDEBUG
    196  1.3      uch 	plumicu_dump(sc);
    197  1.3      uch #endif
    198  1.1      uch 	/* disable all interrupt */
    199  1.1      uch 	regt = sc->sc_regt;
    200  1.1      uch 	regh = sc->sc_regh;
    201  1.1      uch 	for (i = 0; i < PLUM_INTR_MAX; i++) {
    202  1.1      uch 		pic = &pi_ctrl[i];
    203  1.1      uch 		if (pic->ic_ienreg) {
    204  1.1      uch 			reg = plum_conf_read(regt, regh, pic->ic_ienreg);
    205  1.1      uch 			reg &= ~pic->ic_ienpat;
    206  1.1      uch 			plum_conf_write(regt, regh, pic->ic_ienreg, reg);
    207  1.1      uch 		}
    208  1.1      uch 		if (pic->ic_senreg) {
    209  1.1      uch 			reg = plum_conf_read(regt, regh, pic->ic_senreg);
    210  1.1      uch 			reg &= ~pic->ic_senpat;
    211  1.1      uch 			plum_conf_write(regt, regh, pic->ic_senreg, reg);
    212  1.1      uch 		}
    213  1.1      uch 	}
    214  1.1      uch 
    215  1.1      uch 	/* register handle to plum_chipset_tag */
    216  1.1      uch 	plum_conf_register_intr(sc->sc_pc, (void*)sc);
    217  1.1      uch 
    218  1.1      uch 	/* disable interrupt redirect to TX39 core */
    219  1.3      uch 	plum_di(sc->sc_pc);
    220  1.1      uch 
    221  1.1      uch 	if (!(sc->sc_ih = tx_intr_establish(sc->sc_pc->pc_tc, pa->pa_irq,
    222  1.3      uch 					    IST_EDGE, IPL_BIO,
    223  1.3      uch 					    plumicu_intr, sc))) {
    224  1.1      uch 		printf(": can't establish interrupt\n");
    225  1.1      uch 	}
    226  1.1      uch 	printf("\n");
    227  1.3      uch }
    228  1.3      uch 
    229  1.3      uch __inline__ void
    230  1.4      uch plum_di(plum_chipset_tag_t pc)
    231  1.3      uch {
    232  1.3      uch 	struct plumicu_softc *sc = pc->pc_intrt;
    233  1.3      uch 
    234  1.3      uch 	plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_INT_INTIEN_REG, 0);
    235  1.3      uch }
    236  1.3      uch 
    237  1.3      uch __inline__ void
    238  1.4      uch plum_ei(plum_chipset_tag_t pc)
    239  1.3      uch {
    240  1.3      uch 	struct plumicu_softc *sc = pc->pc_intrt;
    241  1.1      uch 
    242  1.3      uch 	plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_INT_INTIEN_REG,
    243  1.3      uch 			PLUM_INT_INTIEN);
    244  1.1      uch }
    245  1.1      uch 
    246  1.1      uch void*
    247  1.4      uch plum_intr_establish(plum_chipset_tag_t pc, int line, int mode, int level,
    248  1.4      uch     int (*ih_fun)(void *), void *ih_arg)
    249  1.1      uch {
    250  1.1      uch 	struct plumicu_softc *sc = pc->pc_intrt;
    251  1.1      uch 	bus_space_tag_t regt = sc->sc_regt;
    252  1.1      uch 	bus_space_handle_t regh = sc->sc_regh;
    253  1.1      uch 	plumreg_t reg;
    254  1.1      uch 	struct plum_intr_entry *pi;
    255  1.1      uch 
    256  1.1      uch 	if (!LEGAL_PRUM_INTR(line)) {
    257  1.1      uch 		panic("plum_intr_establish: bogus interrupt line");
    258  1.1      uch 	}
    259  1.1      uch 
    260  1.3      uch 	pi = &sc->sc_intr[line];
    261  1.1      uch 	pi->pi_line = line;
    262  1.1      uch 	pi->pi_fun  = ih_fun;
    263  1.1      uch 	pi->pi_arg  = ih_arg;
    264  1.1      uch 	pi->pi_ctrl = &pi_ctrl[line];
    265  1.1      uch 
    266  1.1      uch 	/* Enable interrupt */
    267  1.3      uch 
    268  1.2      uch 	/* status enable */
    269  1.2      uch 	if (pi->pi_ctrl->ic_senreg) {
    270  1.2      uch 		reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_senreg);
    271  1.2      uch 		reg |= pi->pi_ctrl->ic_senpat;
    272  1.2      uch 		plum_conf_write(regt, regh, pi->pi_ctrl->ic_senreg, reg);
    273  1.2      uch 	}
    274  1.2      uch 	/* interrupt enable */
    275  1.1      uch 	if (pi->pi_ctrl->ic_ienreg) {
    276  1.1      uch 		reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_ienreg);
    277  1.1      uch 		reg |= pi->pi_ctrl->ic_ienpat;
    278  1.1      uch 		plum_conf_write(regt, regh, pi->pi_ctrl->ic_ienreg, reg);
    279  1.1      uch 	}
    280  1.1      uch 
    281  1.1      uch 	/* Enable redirect to TX39 core */
    282  1.3      uch 	DPRINTF(("plum_intr_establish: %d (count=%d)\n", line,
    283  1.3      uch 		 sc->sc_enable_count));
    284  1.3      uch 
    285  1.3      uch 	if (sc->sc_enable_count++ == 0)
    286  1.3      uch 		plum_ei(pc);
    287  1.2      uch 
    288  1.3      uch 	pi->pi_enabled = 1;
    289  1.1      uch 
    290  1.3      uch 	return (ih_fun);
    291  1.1      uch }
    292  1.1      uch 
    293  1.1      uch void
    294  1.4      uch plum_intr_disestablish(plum_chipset_tag_t pc, void *arg)
    295  1.1      uch {
    296  1.1      uch 	struct plumicu_softc *sc = pc->pc_intrt;
    297  1.1      uch 	bus_space_tag_t regt = sc->sc_regt;
    298  1.1      uch 	bus_space_handle_t regh = sc->sc_regh;
    299  1.1      uch 	plumreg_t reg;
    300  1.1      uch 	struct plum_intr_entry *pi;
    301  1.1      uch 	int i;
    302  1.3      uch 
    303  1.3      uch 	sc = pc->pc_intrt;
    304  1.1      uch 
    305  1.1      uch 	for (i = 0; i < PLUM_INTR_MAX; i++) {
    306  1.3      uch 		pi = &sc->sc_intr[i];
    307  1.3      uch 		if (pi->pi_fun != arg)
    308  1.3      uch 			continue;
    309  1.3      uch 		DPRINTF(("plum_intr_disestablish: %d (count=%d)\n",
    310  1.3      uch 			 pi->pi_line, sc->sc_enable_count - 1));
    311  1.3      uch 		goto found;
    312  1.1      uch 	}
    313  1.1      uch 	panic("plum_intr_disestablish: can't find entry.");
    314  1.3      uch 	/* NOTREACHED */
    315  1.1      uch  found:
    316  1.3      uch 	pi->pi_enabled = 0;
    317  1.1      uch 	/* Disable interrupt */
    318  1.1      uch 	if (pi->pi_ctrl->ic_ienreg) {
    319  1.1      uch 		reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_ienreg);
    320  1.1      uch 		reg &= ~(pi->pi_ctrl->ic_ienpat);
    321  1.1      uch 		plum_conf_write(regt, regh, pi->pi_ctrl->ic_ienreg, reg);
    322  1.1      uch 	}
    323  1.1      uch 	if (pi->pi_ctrl->ic_senreg) {
    324  1.1      uch 		reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_senreg);
    325  1.1      uch 		reg &= ~(pi->pi_ctrl->ic_senpat);
    326  1.1      uch 		plum_conf_write(regt, regh, pi->pi_ctrl->ic_senreg, reg);
    327  1.1      uch 	}
    328  1.1      uch 
    329  1.3      uch 	/* Disable/Enable interrupt redirect to TX39 core */
    330  1.3      uch 	if (--sc->sc_enable_count == 0)
    331  1.3      uch 		plum_di(pc);
    332  1.1      uch }
    333  1.1      uch 
    334  1.1      uch int
    335  1.4      uch plumicu_intr(void *arg)
    336  1.1      uch {
    337  1.1      uch 	struct plumicu_softc *sc = arg;
    338  1.1      uch 	bus_space_tag_t regt = sc->sc_regt;
    339  1.1      uch 	bus_space_handle_t regh = sc->sc_regh;
    340  1.3      uch 	plumreg_t reg1, reg2, reg_ext, reg_pccard;
    341  1.1      uch 	int i;
    342  1.1      uch 
    343  1.3      uch 	plum_di(sc->sc_pc);
    344  1.3      uch 	/* read level 1 status */
    345  1.1      uch 	reg1 = plum_conf_read(regt, regh, PLUM_INT_INTSTA_REG);
    346  1.2      uch 
    347  1.3      uch 	/* read level 2 status and acknowledge */
    348  1.3      uch 	reg_ext = plum_conf_read(regt, regh, PLUM_INT_EXTINTS_REG);
    349  1.3      uch 	plum_conf_write(regt, regh, PLUM_INT_EXTINTS_REG, reg_ext);
    350  1.3      uch 
    351  1.3      uch 	reg_pccard = plum_conf_read(regt, regh, PLUM_INT_PCCINTS_REG);
    352  1.3      uch 	plum_conf_write(regt, regh, PLUM_INT_PCCINTS_REG, reg_pccard);
    353  1.3      uch 
    354  1.1      uch 	for (i = 0; i < PLUM_INTR_MAX; i++) {
    355  1.3      uch 		register struct plum_intr_entry *pi;
    356  1.3      uch 		register const struct plum_intr_ctrl *pic = &pi_ctrl[i];
    357  1.3      uch 
    358  1.3      uch 		if (!(pic->ic_ackpat1 & reg1))
    359  1.3      uch 			continue;
    360  1.3      uch 
    361  1.3      uch 		pi = &sc->sc_intr[i];
    362  1.3      uch 		if (!pi->pi_enabled)
    363  1.3      uch 			continue;
    364  1.3      uch 
    365  1.3      uch 		if (pic->ic_ackreg2 == 0) {
    366  1.3      uch 			(*pi->pi_fun)(pi->pi_arg);
    367  1.3      uch 			continue;
    368  1.1      uch 		}
    369  1.3      uch 
    370  1.3      uch 		reg2 = pic->ic_ackreg2 == PLUM_INT_PCCINTS_REG
    371  1.3      uch 			? reg_pccard : reg_ext;
    372  1.3      uch 
    373  1.3      uch 		if (pic->ic_ackpat2 & reg2)
    374  1.3      uch 			(*pi->pi_fun)(pi->pi_arg);
    375  1.1      uch 	}
    376  1.3      uch 	plum_ei(sc->sc_pc);
    377  1.1      uch 
    378  1.3      uch 	return (0);
    379  1.1      uch }
    380  1.1      uch 
    381  1.3      uch #ifdef PLUMICUDEBUG
    382  1.1      uch void
    383  1.4      uch plumicu_dump(struct plumicu_softc *sc)
    384  1.1      uch {
    385  1.1      uch 	bus_space_tag_t regt = sc->sc_regt;
    386  1.1      uch 	bus_space_handle_t regh = sc->sc_regh;
    387  1.1      uch 	plumreg_t reg;
    388  1.1      uch 
    389  1.1      uch 	printf("status:");
    390  1.1      uch 	reg = plum_conf_read(regt, regh, PLUM_INT_INTSTA_REG);
    391  1.5      uch 	dbg_bit_print(reg);
    392  1.1      uch 	printf("ExtIO\n");
    393  1.1      uch 	printf("status:");
    394  1.1      uch 	reg = plum_conf_read(regt, regh, PLUM_INT_EXTINTS_REG);
    395  1.5      uch 	dbg_bit_print(reg);
    396  1.1      uch 	printf("enable:");
    397  1.1      uch 	reg = plum_conf_read(regt, regh, PLUM_INT_EXTIEN_REG);
    398  1.5      uch  	dbg_bit_print(reg);
    399  1.1      uch 
    400  1.1      uch }
    401  1.3      uch #endif /* PLUMICUDEBUG */
    402