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plumicuvar.h revision 1.1
      1  1.1  uch /*	$NetBSD: plumicuvar.h,v 1.1 1999/11/21 06:50:26 uch Exp $ */
      2  1.1  uch 
      3  1.1  uch /*
      4  1.1  uch  * Copyright (c) 1999, by UCHIYAMA Yasushi
      5  1.1  uch  * All rights reserved.
      6  1.1  uch  *
      7  1.1  uch  * Redistribution and use in source and binary forms, with or without
      8  1.1  uch  * modification, are permitted provided that the following conditions
      9  1.1  uch  * are met:
     10  1.1  uch  * 1. Redistributions of source code must retain the above copyright
     11  1.1  uch  *    notice, this list of conditions and the following disclaimer.
     12  1.1  uch  * 2. The name of the developer may NOT be used to endorse or promote products
     13  1.1  uch  *    derived from this software without specific prior written permission.
     14  1.1  uch  *
     15  1.1  uch  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  1.1  uch  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  1.1  uch  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  1.1  uch  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  1.1  uch  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  1.1  uch  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  1.1  uch  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  1.1  uch  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  1.1  uch  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  1.1  uch  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  1.1  uch  * SUCH DAMAGE.
     26  1.1  uch  *
     27  1.1  uch  */
     28  1.1  uch /*
     29  1.1  uch  * 1	EXT -> IO5(INT0, INT1, INT2), IO3(INT0, INT1)
     30  1.1  uch  * 2	SM
     31  1.1  uch  * 3	USBWAKE
     32  1.1  uch  * 4	USB
     33  1.1  uch  * 5	DISP
     34  1.1  uch  * 6	C2SC
     35  1.1  uch  * 7	C1SC
     36  1.1  uch  * 8	PCC -> C1IO, C1RI, C2IO, C2RI
     37  1.1  uch  */
     38  1.1  uch 
     39  1.1  uch /* Logical interrupt line # */
     40  1.1  uch #define PLUM_INT_C1IO		0
     41  1.1  uch #define PLUM_INT_C1RI		1
     42  1.1  uch #define PLUM_INT_C1SC		2
     43  1.1  uch #define PLUM_INT_C2IO		3
     44  1.1  uch #define PLUM_INT_C2RI		4
     45  1.1  uch #define PLUM_INT_C2SC		5
     46  1.1  uch #define PLUM_INT_DISP		6
     47  1.1  uch #define PLUM_INT_USB		7
     48  1.1  uch #define PLUM_INT_USBWAKE	8
     49  1.1  uch #define PLUM_INT_SM		9
     50  1.1  uch #define PLUM_INT_EXT5IO0	10
     51  1.1  uch #define PLUM_INT_EXT5IO1	11
     52  1.1  uch #define PLUM_INT_EXT5IO2	12
     53  1.1  uch #define PLUM_INT_EXT5IO3	13
     54  1.1  uch #define PLUM_INT_EXT3IO0	14
     55  1.1  uch #define PLUM_INT_EXT3IO1	15
     56  1.1  uch 
     57  1.1  uch #define PLUM_INTR_MAX		16
     58  1.1  uch #define LEGAL_PRUM_INTR(x) (((x) >= 0) && ((x) < PLUM_INTR_MAX))
     59  1.1  uch 
     60  1.1  uch void*	plum_intr_establish __P((plum_chipset_tag_t, int, int, int, int (*) __P((void*)),	void*));
     61  1.1  uch void	plum_intr_disestablish __P((plum_chipset_tag_t, void*));
     62