plumohci.c revision 1.17 1 1.17 thorpej /* $NetBSD: plumohci.c,v 1.17 2021/04/24 23:36:38 thorpej Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2000 UCHIYAMA Yasushi
5 1.1 uch * Copyright (c) 1999 MAEKAWA Masahide <bishop (at) rr.iij4u.or.jp>
6 1.1 uch * All rights reserved.
7 1.1 uch *
8 1.1 uch * Redistribution and use in source and binary forms, with or without
9 1.1 uch * modification, are permitted provided that the following conditions
10 1.1 uch * are met:
11 1.1 uch * 1. Redistributions of source code must retain the above copyright
12 1.1 uch * notice, this list of conditions and the following disclaimer.
13 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer in the
15 1.1 uch * documentation and/or other materials provided with the distribution.
16 1.1 uch *
17 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 1.1 uch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 1.1 uch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 1.1 uch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 1.1 uch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 1.1 uch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 1.1 uch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 uch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 1.1 uch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 1.1 uch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 1.1 uch * SUCH DAMAGE.
28 1.1 uch */
29 1.1 uch
30 1.1 uch /*
31 1.1 uch * USB Open Host Controller driver.
32 1.1 uch *
33 1.1 uch * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
34 1.1 uch * USB spec: http://www.usb.org/developers/data/usb11.pdf
35 1.1 uch */
36 1.8 lukem
37 1.8 lukem #include <sys/cdefs.h>
38 1.17 thorpej __KERNEL_RCSID(0, "$NetBSD: plumohci.c,v 1.17 2021/04/24 23:36:38 thorpej Exp $");
39 1.1 uch
40 1.1 uch #include <sys/param.h>
41 1.1 uch #include <sys/systm.h>
42 1.1 uch #include <sys/kernel.h>
43 1.1 uch #include <sys/device.h>
44 1.1 uch #include <sys/proc.h>
45 1.1 uch #include <sys/queue.h>
46 1.16 thorpej #include <sys/kmem.h>
47 1.1 uch
48 1.1 uch /* busdma */
49 1.1 uch #include <sys/mbuf.h>
50 1.3 mrg #include <uvm/uvm_extern.h>
51 1.1 uch
52 1.1 uch #include <machine/bus.h>
53 1.5 takemura #include <machine/bus_dma_hpcmips.h>
54 1.1 uch
55 1.1 uch #include <dev/usb/usb.h>
56 1.1 uch #include <dev/usb/usbdi.h>
57 1.1 uch #include <dev/usb/usbdivar.h>
58 1.1 uch #include <dev/usb/usb_mem.h>
59 1.1 uch
60 1.1 uch #include <dev/usb/ohcireg.h>
61 1.1 uch #include <dev/usb/ohcivar.h>
62 1.1 uch
63 1.1 uch #include <hpcmips/tx/tx39var.h>
64 1.1 uch #include <hpcmips/dev/plumvar.h>
65 1.1 uch #include <hpcmips/dev/plumicuvar.h>
66 1.1 uch #include <hpcmips/dev/plumpowervar.h>
67 1.1 uch #include <hpcmips/dev/plumohcireg.h>
68 1.1 uch
69 1.14 chs int plumohci_match(device_t, cfdata_t, void *);
70 1.14 chs void plumohci_attach(device_t, device_t, void *);
71 1.4 uch int plumohci_intr(void *);
72 1.4 uch
73 1.4 uch void __plumohci_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
74 1.4 uch bus_addr_t, bus_size_t, int);
75 1.4 uch int __plumohci_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
76 1.4 uch bus_size_t, bus_dma_segment_t *, int, int *, int);
77 1.4 uch void __plumohci_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
78 1.4 uch int __plumohci_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
79 1.11 christos int, size_t, void **, int);
80 1.11 christos void __plumohci_dmamem_unmap(bus_dma_tag_t, void *, size_t);
81 1.1 uch
82 1.5 takemura struct bus_dma_tag_hpcmips plumohci_bus_dma_tag = {
83 1.5 takemura {
84 1.5 takemura NULL,
85 1.5 takemura {
86 1.5 takemura _hpcmips_bd_map_create,
87 1.5 takemura _hpcmips_bd_map_destroy,
88 1.5 takemura _hpcmips_bd_map_load,
89 1.5 takemura _hpcmips_bd_map_load_mbuf,
90 1.5 takemura _hpcmips_bd_map_load_uio,
91 1.5 takemura _hpcmips_bd_map_load_raw,
92 1.5 takemura _hpcmips_bd_map_unload,
93 1.5 takemura __plumohci_dmamap_sync,
94 1.5 takemura __plumohci_dmamem_alloc,
95 1.5 takemura __plumohci_dmamem_free,
96 1.5 takemura __plumohci_dmamem_map,
97 1.5 takemura __plumohci_dmamem_unmap,
98 1.5 takemura _hpcmips_bd_mem_mmap,
99 1.5 takemura },
100 1.5 takemura },
101 1.5 takemura NULL,
102 1.1 uch };
103 1.1 uch
104 1.1 uch struct plumohci_shm {
105 1.1 uch bus_space_handle_t ps_bsh;
106 1.1 uch paddr_t ps_paddr;
107 1.11 christos void * ps_caddr;
108 1.1 uch size_t ps_size;
109 1.1 uch LIST_ENTRY(plumohci_shm) ps_link;
110 1.1 uch };
111 1.1 uch
112 1.1 uch struct plumohci_softc {
113 1.1 uch struct ohci_softc sc;
114 1.1 uch void *sc_ih;
115 1.15 skrll void *sc_wakeih;
116 1.1 uch
117 1.1 uch LIST_HEAD(, plumohci_shm) sc_shm_head;
118 1.1 uch };
119 1.1 uch
120 1.12 drochner CFATTACH_DECL_NEW(plumohci, sizeof(struct plumohci_softc),
121 1.7 thorpej plumohci_match, plumohci_attach, NULL, NULL);
122 1.1 uch
123 1.1 uch int
124 1.14 chs plumohci_match(device_t parent, cfdata_t match, void *aux)
125 1.1 uch {
126 1.1 uch /* PLUM2 builtin OHCI module */
127 1.1 uch
128 1.15 skrll return 1;
129 1.1 uch }
130 1.1 uch
131 1.1 uch void
132 1.14 chs plumohci_attach(device_t parent, device_t self, void *aux)
133 1.1 uch {
134 1.12 drochner struct plumohci_softc *sc = device_private(self);
135 1.1 uch struct plum_attach_args *pa = aux;
136 1.1 uch
137 1.12 drochner sc->sc.sc_dev = self;
138 1.15 skrll sc->sc.sc_bus.ub_hcpriv = sc;
139 1.12 drochner
140 1.1 uch sc->sc.iot = pa->pa_iot;
141 1.15 skrll sc->sc.sc_bus.ub_dmatag = &plumohci_bus_dma_tag.bdt;
142 1.5 takemura plumohci_bus_dma_tag._dmamap_chipset_v = sc;
143 1.1 uch
144 1.1 uch /* Map I/O space */
145 1.15 skrll if (bus_space_map(sc->sc.iot, PLUM_OHCI_REGBASE, OHCI_PAGE_SIZE,
146 1.4 uch 0, &sc->sc.ioh)) {
147 1.1 uch printf(": cannot map mem space\n");
148 1.1 uch return;
149 1.1 uch }
150 1.1 uch
151 1.1 uch /* power up */
152 1.15 skrll /*
153 1.1 uch * in the case of PLUM2, UHOSTC uses the VRAM as the shared RAM
154 1.1 uch * so establish power/clock of Video contoroller
155 1.1 uch */
156 1.1 uch plum_power_establish(pa->pa_pc, PLUM_PWR_EXTPW1);
157 1.1 uch plum_power_establish(pa->pa_pc, PLUM_PWR_USB);
158 1.1 uch
159 1.1 uch /* Disable interrupts, so we don't can any spurious ones. */
160 1.1 uch bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
161 1.4 uch OHCI_ALL_INTRS);
162 1.1 uch
163 1.1 uch /* master enable */
164 1.1 uch sc->sc_ih = plum_intr_establish(pa->pa_pc, PLUM_INT_USB, IST_EDGE,
165 1.4 uch IPL_USB, ohci_intr, sc);
166 1.1 uch #if 0
167 1.15 skrll /*
168 1.15 skrll * enable the clock restart request interrupt
169 1.1 uch * (for USBSUSPEND state)
170 1.1 uch */
171 1.15 skrll sc->sc_wakeih = plum_intr_establish(pa->pa_pc, PLUM_INT_USBWAKE,
172 1.15 skrll IST_EDGE, IPL_USB,
173 1.4 uch plumohci_intr, sc);
174 1.1 uch #endif
175 1.1 uch /*
176 1.1 uch * Shared memory list.
177 1.1 uch */
178 1.1 uch LIST_INIT(&sc->sc_shm_head);
179 1.1 uch
180 1.1 uch printf("\n");
181 1.1 uch
182 1.15 skrll int err = ohci_init(&sc->sc);
183 1.1 uch
184 1.15 skrll if (err) {
185 1.15 skrll printf(": init failed, error=%d\n", err);
186 1.1 uch
187 1.1 uch plum_intr_disestablish(pa->pa_pc, sc->sc_ih);
188 1.1 uch plum_intr_disestablish(pa->pa_pc, sc->sc_wakeih);
189 1.1 uch
190 1.1 uch return;
191 1.1 uch }
192 1.1 uch
193 1.1 uch /* Attach usb device. */
194 1.17 thorpej sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint,
195 1.17 thorpej CFARG_EOL);
196 1.1 uch }
197 1.1 uch
198 1.1 uch int
199 1.4 uch plumohci_intr(void *arg)
200 1.1 uch {
201 1.1 uch printf("Plum2 OHCI: wakeup intr\n");
202 1.1 uch return 0;
203 1.1 uch }
204 1.1 uch
205 1.1 uch /*
206 1.1 uch * Plum2 OHCI specific busdma routines.
207 1.15 skrll * Plum2 OHCI shared buffer can't allocate on memory
208 1.1 uch * but V-RAM (busspace).
209 1.1 uch */
210 1.1 uch
211 1.1 uch void
212 1.5 takemura __plumohci_dmamap_sync(bus_dma_tag_t tx, bus_dmamap_t map, bus_addr_t offset,
213 1.4 uch bus_size_t len, int ops)
214 1.1 uch {
215 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
216 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
217 1.4 uch
218 1.1 uch /*
219 1.1 uch * Flush the write buffer allocated on the V-RAM.
220 1.1 uch * Accessing any host controller register flushs write buffer
221 1.1 uch */
222 1.1 uch (void)bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_REVISION);
223 1.1 uch }
224 1.1 uch
225 1.1 uch int
226 1.5 takemura __plumohci_dmamem_alloc(bus_dma_tag_t tx, bus_size_t size,
227 1.5 takemura bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs,
228 1.5 takemura int nsegs, int *rsegs, int flags)
229 1.1 uch {
230 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
231 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
232 1.1 uch struct plumohci_shm *ps;
233 1.1 uch bus_space_handle_t bsh;
234 1.1 uch paddr_t paddr;
235 1.11 christos void *caddr;
236 1.1 uch int error;
237 1.1 uch
238 1.1 uch size = round_page(size);
239 1.1 uch
240 1.1 uch /*
241 1.1 uch * Allocate buffer from V-RAM area.
242 1.1 uch */
243 1.1 uch error = bus_space_alloc(sc->sc.iot, PLUM_OHCI_SHMEMBASE,
244 1.4 uch PLUM_OHCI_SHMEMBASE + PLUM_OHCI_SHMEMSIZE - 1,
245 1.13 tsutsui size, OHCI_PAGE_SIZE, 0, 0,
246 1.9 simonb (bus_addr_t *)(void *)&caddr, &bsh);
247 1.1 uch if (error)
248 1.15 skrll return 1;
249 1.1 uch
250 1.1 uch pmap_extract(pmap_kernel(), (vaddr_t)caddr, &paddr);
251 1.1 uch
252 1.16 thorpej ps = kmem_intr_alloc(sizeof(struct plumohci_shm), KM_NOSLEEP);
253 1.1 uch if (ps == 0)
254 1.15 skrll return 1;
255 1.1 uch
256 1.1 uch ps->ps_bsh = bsh;
257 1.1 uch ps->ps_size = segs[0].ds_len = size;
258 1.1 uch ps->ps_paddr = segs[0].ds_addr = paddr;
259 1.1 uch ps->ps_caddr = caddr;
260 1.1 uch
261 1.1 uch LIST_INSERT_HEAD(&sc->sc_shm_head, ps, ps_link);
262 1.1 uch
263 1.1 uch *rsegs = 1;
264 1.1 uch
265 1.15 skrll return 0;
266 1.1 uch }
267 1.1 uch
268 1.1 uch void
269 1.5 takemura __plumohci_dmamem_free(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs)
270 1.1 uch {
271 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
272 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
273 1.1 uch struct plumohci_shm *ps;
274 1.1 uch
275 1.1 uch for (ps = LIST_FIRST(&sc->sc_shm_head); ps;
276 1.4 uch ps = LIST_NEXT(ps, ps_link)) {
277 1.1 uch
278 1.1 uch if (ps->ps_paddr == segs[0].ds_addr) {
279 1.1 uch bus_space_free(sc->sc.iot, ps->ps_bsh, ps->ps_size);
280 1.1 uch LIST_REMOVE(ps, ps_link);
281 1.16 thorpej kmem_intr_free(ps, sizeof(*ps));
282 1.1 uch
283 1.1 uch return;
284 1.1 uch }
285 1.1 uch }
286 1.1 uch
287 1.1 uch panic("__plumohci_dmamem_free: can't find corresponding handle.");
288 1.1 uch /* NOTREACHED */
289 1.1 uch }
290 1.1 uch
291 1.1 uch int
292 1.5 takemura __plumohci_dmamem_map(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs,
293 1.11 christos size_t size, void **kvap, int flags)
294 1.1 uch {
295 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
296 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
297 1.1 uch struct plumohci_shm *ps;
298 1.1 uch
299 1.1 uch for (ps = LIST_FIRST(&sc->sc_shm_head); ps;
300 1.4 uch ps = LIST_NEXT(ps, ps_link)) {
301 1.1 uch if (ps->ps_paddr == segs[0].ds_addr) {
302 1.1 uch
303 1.1 uch *kvap = ps->ps_caddr;
304 1.1 uch
305 1.15 skrll return 0;
306 1.1 uch }
307 1.1 uch }
308 1.1 uch
309 1.15 skrll return 1;
310 1.1 uch }
311 1.1 uch
312 1.1 uch void
313 1.11 christos __plumohci_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size)
314 1.1 uch {
315 1.1 uch /* nothing to do */
316 1.1 uch }
317