plumohci.c revision 1.3 1 1.3 mrg /* $NetBSD: plumohci.c,v 1.3 2000/06/29 08:17:59 mrg Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2000 UCHIYAMA Yasushi
5 1.1 uch * Copyright (c) 1999 MAEKAWA Masahide <bishop (at) rr.iij4u.or.jp>
6 1.1 uch * All rights reserved.
7 1.1 uch *
8 1.1 uch * Redistribution and use in source and binary forms, with or without
9 1.1 uch * modification, are permitted provided that the following conditions
10 1.1 uch * are met:
11 1.1 uch * 1. Redistributions of source code must retain the above copyright
12 1.1 uch * notice, this list of conditions and the following disclaimer.
13 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer in the
15 1.1 uch * documentation and/or other materials provided with the distribution.
16 1.1 uch *
17 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 1.1 uch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 1.1 uch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 1.1 uch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 1.1 uch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 1.1 uch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 1.1 uch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 uch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 1.1 uch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 1.1 uch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 1.1 uch * SUCH DAMAGE.
28 1.1 uch */
29 1.1 uch
30 1.1 uch /*
31 1.1 uch * USB Open Host Controller driver.
32 1.1 uch *
33 1.1 uch * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
34 1.1 uch * USB spec: http://www.usb.org/developers/data/usb11.pdf
35 1.1 uch */
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.1 uch #include <sys/kernel.h>
40 1.1 uch #include <sys/device.h>
41 1.1 uch #include <sys/proc.h>
42 1.1 uch #include <sys/queue.h>
43 1.1 uch
44 1.1 uch /* busdma */
45 1.1 uch #include <sys/mbuf.h>
46 1.3 mrg #include <uvm/uvm_extern.h>
47 1.1 uch
48 1.1 uch #define _HPCMIPS_BUS_DMA_PRIVATE
49 1.1 uch #include <machine/bus.h>
50 1.1 uch
51 1.1 uch #include <dev/usb/usb.h>
52 1.1 uch #include <dev/usb/usbdi.h>
53 1.1 uch #include <dev/usb/usbdivar.h>
54 1.1 uch #include <dev/usb/usb_mem.h>
55 1.1 uch
56 1.1 uch #include <dev/usb/ohcireg.h>
57 1.1 uch #include <dev/usb/ohcivar.h>
58 1.1 uch
59 1.1 uch #include <hpcmips/tx/tx39var.h>
60 1.1 uch #include <hpcmips/dev/plumvar.h>
61 1.1 uch #include <hpcmips/dev/plumicuvar.h>
62 1.1 uch #include <hpcmips/dev/plumpowervar.h>
63 1.1 uch #include <hpcmips/dev/plumohcireg.h>
64 1.1 uch
65 1.1 uch int plumohci_match __P((struct device *, struct cfdata *, void *));
66 1.1 uch void plumohci_attach __P((struct device *, struct device *, void *));
67 1.1 uch int plumohci_intr __P((void *));
68 1.1 uch
69 1.1 uch void __plumohci_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
70 1.1 uch bus_addr_t, bus_size_t, int));
71 1.1 uch int __plumohci_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
72 1.1 uch bus_size_t, bus_dma_segment_t *, int,
73 1.1 uch int *, int));
74 1.1 uch void __plumohci_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *,
75 1.1 uch int));
76 1.1 uch int __plumohci_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *,
77 1.1 uch int, size_t, caddr_t *, int));
78 1.1 uch void __plumohci_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t));
79 1.1 uch
80 1.1 uch struct hpcmips_bus_dma_tag plumohci_bus_dma_tag = {
81 1.1 uch _bus_dmamap_create,
82 1.1 uch _bus_dmamap_destroy,
83 1.1 uch _bus_dmamap_load,
84 1.1 uch _bus_dmamap_load_mbuf,
85 1.1 uch _bus_dmamap_load_uio,
86 1.1 uch _bus_dmamap_load_raw,
87 1.1 uch _bus_dmamap_unload,
88 1.1 uch __plumohci_dmamap_sync,
89 1.1 uch __plumohci_dmamem_alloc,
90 1.1 uch __plumohci_dmamem_free,
91 1.1 uch __plumohci_dmamem_map,
92 1.1 uch __plumohci_dmamem_unmap,
93 1.1 uch _bus_dmamem_mmap,
94 1.1 uch NULL
95 1.1 uch };
96 1.1 uch
97 1.1 uch struct plumohci_shm {
98 1.1 uch bus_space_handle_t ps_bsh;
99 1.1 uch paddr_t ps_paddr;
100 1.1 uch caddr_t ps_caddr;
101 1.1 uch size_t ps_size;
102 1.1 uch LIST_ENTRY(plumohci_shm) ps_link;
103 1.1 uch };
104 1.1 uch
105 1.1 uch struct plumohci_softc {
106 1.1 uch struct ohci_softc sc;
107 1.1 uch void *sc_ih;
108 1.1 uch void *sc_wakeih;
109 1.1 uch
110 1.1 uch LIST_HEAD(, plumohci_shm) sc_shm_head;
111 1.1 uch };
112 1.1 uch
113 1.1 uch struct cfattach plumohci_ca = {
114 1.1 uch sizeof(struct plumohci_softc), plumohci_match, plumohci_attach,
115 1.1 uch };
116 1.1 uch
117 1.1 uch int
118 1.1 uch plumohci_match(parent, match, aux)
119 1.1 uch struct device *parent;
120 1.1 uch struct cfdata *match;
121 1.1 uch void *aux;
122 1.1 uch {
123 1.1 uch /* PLUM2 builtin OHCI module */
124 1.1 uch
125 1.1 uch return (1);
126 1.1 uch }
127 1.1 uch
128 1.1 uch void
129 1.1 uch plumohci_attach(parent, self, aux)
130 1.1 uch struct device *parent;
131 1.1 uch struct device *self;
132 1.1 uch void *aux;
133 1.1 uch {
134 1.1 uch struct plumohci_softc *sc = (struct plumohci_softc *)self;
135 1.1 uch struct plum_attach_args *pa = aux;
136 1.1 uch usbd_status r;
137 1.1 uch
138 1.1 uch sc->sc.iot = pa->pa_iot;
139 1.1 uch sc->sc.sc_bus.dmatag = &plumohci_bus_dma_tag;
140 1.1 uch sc->sc.sc_bus.dmatag->_dmamap_chipset_v = sc;
141 1.1 uch
142 1.1 uch /* Map I/O space */
143 1.1 uch if (bus_space_map(sc->sc.iot, PLUM_OHCI_REGBASE, OHCI_PAGE_SIZE,
144 1.1 uch 0, &sc->sc.ioh)) {
145 1.1 uch printf(": cannot map mem space\n");
146 1.1 uch return;
147 1.1 uch }
148 1.1 uch
149 1.1 uch /* power up */
150 1.1 uch /*
151 1.1 uch * in the case of PLUM2, UHOSTC uses the VRAM as the shared RAM
152 1.1 uch * so establish power/clock of Video contoroller
153 1.1 uch */
154 1.1 uch plum_power_establish(pa->pa_pc, PLUM_PWR_EXTPW1);
155 1.1 uch plum_power_establish(pa->pa_pc, PLUM_PWR_USB);
156 1.1 uch
157 1.1 uch /* Disable interrupts, so we don't can any spurious ones. */
158 1.1 uch bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
159 1.1 uch OHCI_ALL_INTRS);
160 1.1 uch
161 1.1 uch /* master enable */
162 1.1 uch sc->sc_ih = plum_intr_establish(pa->pa_pc, PLUM_INT_USB, IST_EDGE,
163 1.1 uch IPL_USB, ohci_intr, sc);
164 1.1 uch #if 0
165 1.1 uch /*
166 1.1 uch * enable the clock restart request interrupt
167 1.1 uch * (for USBSUSPEND state)
168 1.1 uch */
169 1.1 uch sc->sc_wakeih = plum_intr_establish(pa->pa_pc, PLUM_INT_USBWAKE,
170 1.1 uch IST_EDGE, IPL_USB,
171 1.1 uch plumohci_intr, sc);
172 1.1 uch #endif
173 1.1 uch /*
174 1.1 uch * Shared memory list.
175 1.1 uch */
176 1.1 uch LIST_INIT(&sc->sc_shm_head);
177 1.1 uch
178 1.1 uch printf("\n");
179 1.1 uch
180 1.1 uch r = ohci_init(&sc->sc);
181 1.1 uch
182 1.1 uch if (r != USBD_NORMAL_COMPLETION) {
183 1.1 uch printf(": init failed, error=%d\n", r);
184 1.1 uch
185 1.1 uch plum_intr_disestablish(pa->pa_pc, sc->sc_ih);
186 1.1 uch plum_intr_disestablish(pa->pa_pc, sc->sc_wakeih);
187 1.1 uch
188 1.1 uch return;
189 1.1 uch }
190 1.1 uch
191 1.1 uch /* Attach usb device. */
192 1.1 uch sc->sc.sc_child = config_found((void *) sc, &sc->sc.sc_bus,
193 1.1 uch usbctlprint);
194 1.1 uch }
195 1.1 uch
196 1.1 uch int
197 1.1 uch plumohci_intr(arg)
198 1.1 uch void *arg;
199 1.1 uch {
200 1.1 uch printf("Plum2 OHCI: wakeup intr\n");
201 1.1 uch return 0;
202 1.1 uch }
203 1.1 uch
204 1.1 uch /*
205 1.1 uch * Plum2 OHCI specific busdma routines.
206 1.1 uch * Plum2 OHCI shared buffer can't allocate on memory
207 1.1 uch * but V-RAM (busspace).
208 1.1 uch */
209 1.1 uch
210 1.1 uch void
211 1.1 uch __plumohci_dmamap_sync(t, map, offset, len, ops)
212 1.1 uch bus_dma_tag_t t;
213 1.1 uch bus_dmamap_t map;
214 1.1 uch bus_addr_t offset;
215 1.1 uch bus_size_t len;
216 1.1 uch int ops;
217 1.1 uch {
218 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
219 1.1 uch /*
220 1.1 uch * Flush the write buffer allocated on the V-RAM.
221 1.1 uch * Accessing any host controller register flushs write buffer
222 1.1 uch */
223 1.1 uch
224 1.1 uch (void)bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_REVISION);
225 1.1 uch }
226 1.1 uch
227 1.1 uch int
228 1.1 uch __plumohci_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs,
229 1.1 uch flags)
230 1.1 uch bus_dma_tag_t t;
231 1.1 uch bus_size_t size, alignment, boundary;
232 1.1 uch bus_dma_segment_t *segs;
233 1.1 uch int nsegs;
234 1.1 uch int *rsegs;
235 1.1 uch int flags;
236 1.1 uch {
237 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
238 1.1 uch struct plumohci_shm *ps;
239 1.1 uch bus_space_handle_t bsh;
240 1.1 uch paddr_t paddr;
241 1.1 uch caddr_t caddr;
242 1.1 uch int error;
243 1.1 uch
244 1.1 uch size = round_page(size);
245 1.1 uch
246 1.1 uch /*
247 1.1 uch * Allocate buffer from V-RAM area.
248 1.1 uch */
249 1.1 uch error = bus_space_alloc(sc->sc.iot, PLUM_OHCI_SHMEMBASE,
250 1.1 uch PLUM_OHCI_SHMEMBASE + PLUM_OHCI_SHMEMSIZE - 1,
251 1.1 uch size, OHCI_PAGE_SIZE, OHCI_PAGE_SIZE, 0,
252 1.1 uch (bus_addr_t*)&caddr, &bsh);
253 1.1 uch if (error)
254 1.1 uch return (1);
255 1.1 uch
256 1.1 uch pmap_extract(pmap_kernel(), (vaddr_t)caddr, &paddr);
257 1.1 uch
258 1.1 uch ps = malloc(sizeof(struct plumohci_shm), M_DEVBUF, M_NOWAIT);
259 1.1 uch if (ps == 0)
260 1.1 uch return (1);
261 1.1 uch
262 1.1 uch ps->ps_bsh = bsh;
263 1.1 uch ps->ps_size = segs[0].ds_len = size;
264 1.1 uch ps->ps_paddr = segs[0].ds_addr = paddr;
265 1.1 uch ps->ps_caddr = caddr;
266 1.1 uch
267 1.1 uch LIST_INSERT_HEAD(&sc->sc_shm_head, ps, ps_link);
268 1.1 uch
269 1.1 uch *rsegs = 1;
270 1.1 uch
271 1.1 uch return (0);
272 1.1 uch }
273 1.1 uch
274 1.1 uch void
275 1.1 uch __plumohci_dmamem_free(t, segs, nsegs)
276 1.1 uch bus_dma_tag_t t;
277 1.1 uch bus_dma_segment_t *segs;
278 1.1 uch int nsegs;
279 1.1 uch {
280 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
281 1.1 uch struct plumohci_shm *ps;
282 1.1 uch
283 1.1 uch for (ps = LIST_FIRST(&sc->sc_shm_head); ps;
284 1.1 uch ps = LIST_NEXT(ps, ps_link)) {
285 1.1 uch
286 1.1 uch if (ps->ps_paddr == segs[0].ds_addr) {
287 1.1 uch bus_space_free(sc->sc.iot, ps->ps_bsh, ps->ps_size);
288 1.1 uch LIST_REMOVE(ps, ps_link);
289 1.1 uch free(ps, M_DEVBUF);
290 1.1 uch
291 1.1 uch return;
292 1.1 uch }
293 1.1 uch }
294 1.1 uch
295 1.1 uch panic("__plumohci_dmamem_free: can't find corresponding handle.");
296 1.1 uch /* NOTREACHED */
297 1.1 uch }
298 1.1 uch
299 1.1 uch int
300 1.1 uch __plumohci_dmamem_map(t, segs, nsegs, size, kvap, flags)
301 1.1 uch bus_dma_tag_t t;
302 1.1 uch bus_dma_segment_t *segs;
303 1.1 uch int nsegs;
304 1.1 uch size_t size;
305 1.1 uch caddr_t *kvap;
306 1.1 uch int flags;
307 1.1 uch {
308 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
309 1.1 uch struct plumohci_shm *ps;
310 1.1 uch
311 1.1 uch for (ps = LIST_FIRST(&sc->sc_shm_head); ps;
312 1.1 uch ps = LIST_NEXT(ps, ps_link)) {
313 1.1 uch if (ps->ps_paddr == segs[0].ds_addr) {
314 1.1 uch
315 1.1 uch *kvap = ps->ps_caddr;
316 1.1 uch
317 1.1 uch return (0);
318 1.1 uch }
319 1.1 uch }
320 1.1 uch
321 1.1 uch return (1);
322 1.1 uch }
323 1.1 uch
324 1.1 uch void
325 1.1 uch __plumohci_dmamem_unmap(t, kva, size)
326 1.1 uch bus_dma_tag_t t;
327 1.1 uch caddr_t kva;
328 1.1 uch size_t size;
329 1.1 uch {
330 1.1 uch /* nothing to do */
331 1.1 uch }
332