plumohci.c revision 1.7 1 1.7 thorpej /* $NetBSD: plumohci.c,v 1.7 2002/10/02 05:26:46 thorpej Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2000 UCHIYAMA Yasushi
5 1.1 uch * Copyright (c) 1999 MAEKAWA Masahide <bishop (at) rr.iij4u.or.jp>
6 1.1 uch * All rights reserved.
7 1.1 uch *
8 1.1 uch * Redistribution and use in source and binary forms, with or without
9 1.1 uch * modification, are permitted provided that the following conditions
10 1.1 uch * are met:
11 1.1 uch * 1. Redistributions of source code must retain the above copyright
12 1.1 uch * notice, this list of conditions and the following disclaimer.
13 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer in the
15 1.1 uch * documentation and/or other materials provided with the distribution.
16 1.1 uch *
17 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 1.1 uch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 1.1 uch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 1.1 uch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 1.1 uch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 1.1 uch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 1.1 uch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 uch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 1.1 uch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 1.1 uch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 1.1 uch * SUCH DAMAGE.
28 1.1 uch */
29 1.1 uch
30 1.1 uch /*
31 1.1 uch * USB Open Host Controller driver.
32 1.1 uch *
33 1.1 uch * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
34 1.1 uch * USB spec: http://www.usb.org/developers/data/usb11.pdf
35 1.1 uch */
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.1 uch #include <sys/kernel.h>
40 1.1 uch #include <sys/device.h>
41 1.1 uch #include <sys/proc.h>
42 1.1 uch #include <sys/queue.h>
43 1.1 uch
44 1.1 uch /* busdma */
45 1.1 uch #include <sys/mbuf.h>
46 1.3 mrg #include <uvm/uvm_extern.h>
47 1.1 uch
48 1.1 uch #include <machine/bus.h>
49 1.5 takemura #include <machine/bus_dma_hpcmips.h>
50 1.1 uch
51 1.1 uch #include <dev/usb/usb.h>
52 1.1 uch #include <dev/usb/usbdi.h>
53 1.1 uch #include <dev/usb/usbdivar.h>
54 1.1 uch #include <dev/usb/usb_mem.h>
55 1.1 uch
56 1.1 uch #include <dev/usb/ohcireg.h>
57 1.1 uch #include <dev/usb/ohcivar.h>
58 1.1 uch
59 1.1 uch #include <hpcmips/tx/tx39var.h>
60 1.1 uch #include <hpcmips/dev/plumvar.h>
61 1.1 uch #include <hpcmips/dev/plumicuvar.h>
62 1.1 uch #include <hpcmips/dev/plumpowervar.h>
63 1.1 uch #include <hpcmips/dev/plumohcireg.h>
64 1.1 uch
65 1.4 uch int plumohci_match(struct device *, struct cfdata *, void *);
66 1.4 uch void plumohci_attach(struct device *, struct device *, void *);
67 1.4 uch int plumohci_intr(void *);
68 1.4 uch
69 1.4 uch void __plumohci_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
70 1.4 uch bus_addr_t, bus_size_t, int);
71 1.4 uch int __plumohci_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
72 1.4 uch bus_size_t, bus_dma_segment_t *, int, int *, int);
73 1.4 uch void __plumohci_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
74 1.4 uch int __plumohci_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
75 1.4 uch int, size_t, caddr_t *, int);
76 1.4 uch void __plumohci_dmamem_unmap(bus_dma_tag_t, caddr_t, size_t);
77 1.1 uch
78 1.5 takemura struct bus_dma_tag_hpcmips plumohci_bus_dma_tag = {
79 1.5 takemura {
80 1.5 takemura NULL,
81 1.5 takemura {
82 1.5 takemura _hpcmips_bd_map_create,
83 1.5 takemura _hpcmips_bd_map_destroy,
84 1.5 takemura _hpcmips_bd_map_load,
85 1.5 takemura _hpcmips_bd_map_load_mbuf,
86 1.5 takemura _hpcmips_bd_map_load_uio,
87 1.5 takemura _hpcmips_bd_map_load_raw,
88 1.5 takemura _hpcmips_bd_map_unload,
89 1.5 takemura __plumohci_dmamap_sync,
90 1.5 takemura __plumohci_dmamem_alloc,
91 1.5 takemura __plumohci_dmamem_free,
92 1.5 takemura __plumohci_dmamem_map,
93 1.5 takemura __plumohci_dmamem_unmap,
94 1.5 takemura _hpcmips_bd_mem_mmap,
95 1.5 takemura },
96 1.5 takemura },
97 1.5 takemura NULL,
98 1.1 uch };
99 1.1 uch
100 1.1 uch struct plumohci_shm {
101 1.1 uch bus_space_handle_t ps_bsh;
102 1.1 uch paddr_t ps_paddr;
103 1.1 uch caddr_t ps_caddr;
104 1.1 uch size_t ps_size;
105 1.1 uch LIST_ENTRY(plumohci_shm) ps_link;
106 1.1 uch };
107 1.1 uch
108 1.1 uch struct plumohci_softc {
109 1.1 uch struct ohci_softc sc;
110 1.1 uch void *sc_ih;
111 1.1 uch void *sc_wakeih;
112 1.1 uch
113 1.1 uch LIST_HEAD(, plumohci_shm) sc_shm_head;
114 1.1 uch };
115 1.1 uch
116 1.7 thorpej CFATTACH_DECL(plumohci, sizeof(struct plumohci_softc),
117 1.7 thorpej plumohci_match, plumohci_attach, NULL, NULL);
118 1.1 uch
119 1.1 uch int
120 1.4 uch plumohci_match(struct device *parent, struct cfdata *match, void *aux)
121 1.1 uch {
122 1.1 uch /* PLUM2 builtin OHCI module */
123 1.1 uch
124 1.1 uch return (1);
125 1.1 uch }
126 1.1 uch
127 1.1 uch void
128 1.4 uch plumohci_attach(struct device *parent, struct device *self, void *aux)
129 1.1 uch {
130 1.1 uch struct plumohci_softc *sc = (struct plumohci_softc *)self;
131 1.1 uch struct plum_attach_args *pa = aux;
132 1.1 uch usbd_status r;
133 1.1 uch
134 1.1 uch sc->sc.iot = pa->pa_iot;
135 1.5 takemura sc->sc.sc_bus.dmatag = &plumohci_bus_dma_tag.bdt;
136 1.5 takemura plumohci_bus_dma_tag._dmamap_chipset_v = sc;
137 1.1 uch
138 1.1 uch /* Map I/O space */
139 1.1 uch if (bus_space_map(sc->sc.iot, PLUM_OHCI_REGBASE, OHCI_PAGE_SIZE,
140 1.4 uch 0, &sc->sc.ioh)) {
141 1.1 uch printf(": cannot map mem space\n");
142 1.1 uch return;
143 1.1 uch }
144 1.1 uch
145 1.1 uch /* power up */
146 1.1 uch /*
147 1.1 uch * in the case of PLUM2, UHOSTC uses the VRAM as the shared RAM
148 1.1 uch * so establish power/clock of Video contoroller
149 1.1 uch */
150 1.1 uch plum_power_establish(pa->pa_pc, PLUM_PWR_EXTPW1);
151 1.1 uch plum_power_establish(pa->pa_pc, PLUM_PWR_USB);
152 1.1 uch
153 1.1 uch /* Disable interrupts, so we don't can any spurious ones. */
154 1.1 uch bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
155 1.4 uch OHCI_ALL_INTRS);
156 1.1 uch
157 1.1 uch /* master enable */
158 1.1 uch sc->sc_ih = plum_intr_establish(pa->pa_pc, PLUM_INT_USB, IST_EDGE,
159 1.4 uch IPL_USB, ohci_intr, sc);
160 1.1 uch #if 0
161 1.1 uch /*
162 1.1 uch * enable the clock restart request interrupt
163 1.1 uch * (for USBSUSPEND state)
164 1.1 uch */
165 1.1 uch sc->sc_wakeih = plum_intr_establish(pa->pa_pc, PLUM_INT_USBWAKE,
166 1.4 uch IST_EDGE, IPL_USB,
167 1.4 uch plumohci_intr, sc);
168 1.1 uch #endif
169 1.1 uch /*
170 1.1 uch * Shared memory list.
171 1.1 uch */
172 1.1 uch LIST_INIT(&sc->sc_shm_head);
173 1.1 uch
174 1.1 uch printf("\n");
175 1.1 uch
176 1.1 uch r = ohci_init(&sc->sc);
177 1.1 uch
178 1.1 uch if (r != USBD_NORMAL_COMPLETION) {
179 1.1 uch printf(": init failed, error=%d\n", r);
180 1.1 uch
181 1.1 uch plum_intr_disestablish(pa->pa_pc, sc->sc_ih);
182 1.1 uch plum_intr_disestablish(pa->pa_pc, sc->sc_wakeih);
183 1.1 uch
184 1.1 uch return;
185 1.1 uch }
186 1.1 uch
187 1.1 uch /* Attach usb device. */
188 1.1 uch sc->sc.sc_child = config_found((void *) sc, &sc->sc.sc_bus,
189 1.4 uch usbctlprint);
190 1.1 uch }
191 1.1 uch
192 1.1 uch int
193 1.4 uch plumohci_intr(void *arg)
194 1.1 uch {
195 1.1 uch printf("Plum2 OHCI: wakeup intr\n");
196 1.1 uch return 0;
197 1.1 uch }
198 1.1 uch
199 1.1 uch /*
200 1.1 uch * Plum2 OHCI specific busdma routines.
201 1.1 uch * Plum2 OHCI shared buffer can't allocate on memory
202 1.1 uch * but V-RAM (busspace).
203 1.1 uch */
204 1.1 uch
205 1.1 uch void
206 1.5 takemura __plumohci_dmamap_sync(bus_dma_tag_t tx, bus_dmamap_t map, bus_addr_t offset,
207 1.4 uch bus_size_t len, int ops)
208 1.1 uch {
209 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
210 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
211 1.4 uch
212 1.1 uch /*
213 1.1 uch * Flush the write buffer allocated on the V-RAM.
214 1.1 uch * Accessing any host controller register flushs write buffer
215 1.1 uch */
216 1.1 uch (void)bus_space_read_4(sc->sc.iot, sc->sc.ioh, OHCI_REVISION);
217 1.1 uch }
218 1.1 uch
219 1.1 uch int
220 1.5 takemura __plumohci_dmamem_alloc(bus_dma_tag_t tx, bus_size_t size,
221 1.5 takemura bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs,
222 1.5 takemura int nsegs, int *rsegs, int flags)
223 1.1 uch {
224 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
225 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
226 1.1 uch struct plumohci_shm *ps;
227 1.1 uch bus_space_handle_t bsh;
228 1.1 uch paddr_t paddr;
229 1.1 uch caddr_t caddr;
230 1.1 uch int error;
231 1.1 uch
232 1.1 uch size = round_page(size);
233 1.1 uch
234 1.1 uch /*
235 1.1 uch * Allocate buffer from V-RAM area.
236 1.1 uch */
237 1.1 uch error = bus_space_alloc(sc->sc.iot, PLUM_OHCI_SHMEMBASE,
238 1.4 uch PLUM_OHCI_SHMEMBASE + PLUM_OHCI_SHMEMSIZE - 1,
239 1.4 uch size, OHCI_PAGE_SIZE, OHCI_PAGE_SIZE, 0,
240 1.4 uch (bus_addr_t*)&caddr, &bsh);
241 1.1 uch if (error)
242 1.1 uch return (1);
243 1.1 uch
244 1.1 uch pmap_extract(pmap_kernel(), (vaddr_t)caddr, &paddr);
245 1.1 uch
246 1.1 uch ps = malloc(sizeof(struct plumohci_shm), M_DEVBUF, M_NOWAIT);
247 1.1 uch if (ps == 0)
248 1.1 uch return (1);
249 1.1 uch
250 1.1 uch ps->ps_bsh = bsh;
251 1.1 uch ps->ps_size = segs[0].ds_len = size;
252 1.1 uch ps->ps_paddr = segs[0].ds_addr = paddr;
253 1.1 uch ps->ps_caddr = caddr;
254 1.1 uch
255 1.1 uch LIST_INSERT_HEAD(&sc->sc_shm_head, ps, ps_link);
256 1.1 uch
257 1.1 uch *rsegs = 1;
258 1.1 uch
259 1.1 uch return (0);
260 1.1 uch }
261 1.1 uch
262 1.1 uch void
263 1.5 takemura __plumohci_dmamem_free(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs)
264 1.1 uch {
265 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
266 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
267 1.1 uch struct plumohci_shm *ps;
268 1.1 uch
269 1.1 uch for (ps = LIST_FIRST(&sc->sc_shm_head); ps;
270 1.4 uch ps = LIST_NEXT(ps, ps_link)) {
271 1.1 uch
272 1.1 uch if (ps->ps_paddr == segs[0].ds_addr) {
273 1.1 uch bus_space_free(sc->sc.iot, ps->ps_bsh, ps->ps_size);
274 1.1 uch LIST_REMOVE(ps, ps_link);
275 1.1 uch free(ps, M_DEVBUF);
276 1.1 uch
277 1.1 uch return;
278 1.1 uch }
279 1.1 uch }
280 1.1 uch
281 1.1 uch panic("__plumohci_dmamem_free: can't find corresponding handle.");
282 1.1 uch /* NOTREACHED */
283 1.1 uch }
284 1.1 uch
285 1.1 uch int
286 1.5 takemura __plumohci_dmamem_map(bus_dma_tag_t tx, bus_dma_segment_t *segs, int nsegs,
287 1.4 uch size_t size, caddr_t *kvap, int flags)
288 1.1 uch {
289 1.5 takemura struct bus_dma_tag_hpcmips *t = (struct bus_dma_tag_hpcmips *)tx;
290 1.1 uch struct plumohci_softc *sc = t->_dmamap_chipset_v;
291 1.1 uch struct plumohci_shm *ps;
292 1.1 uch
293 1.1 uch for (ps = LIST_FIRST(&sc->sc_shm_head); ps;
294 1.4 uch ps = LIST_NEXT(ps, ps_link)) {
295 1.1 uch if (ps->ps_paddr == segs[0].ds_addr) {
296 1.1 uch
297 1.1 uch *kvap = ps->ps_caddr;
298 1.1 uch
299 1.1 uch return (0);
300 1.1 uch }
301 1.1 uch }
302 1.1 uch
303 1.1 uch return (1);
304 1.1 uch }
305 1.1 uch
306 1.1 uch void
307 1.4 uch __plumohci_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
308 1.1 uch {
309 1.1 uch /* nothing to do */
310 1.1 uch }
311