plumpcmcia.c revision 1.4 1 1.4 uch /* $NetBSD: plumpcmcia.c,v 1.4 2000/09/27 17:32:34 uch Exp $ */
2 1.1 uch
3 1.1 uch /*
4 1.4 uch * Copyright (c) 1999, 2000 UCHIYAMA Yasushi. All rights reserved.
5 1.4 uch * Copyright (c) 1997 Marc Horowitz. All rights reserved.
6 1.1 uch *
7 1.1 uch * Redistribution and use in source and binary forms, with or without
8 1.1 uch * modification, are permitted provided that the following conditions
9 1.1 uch * are met:
10 1.1 uch * 1. Redistributions of source code must retain the above copyright
11 1.1 uch * notice, this list of conditions and the following disclaimer.
12 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 uch * notice, this list of conditions and the following disclaimer in the
14 1.1 uch * documentation and/or other materials provided with the distribution.
15 1.1 uch * 3. All advertising materials mentioning features or use of this software
16 1.1 uch * must display the following acknowledgement:
17 1.1 uch * This product includes software developed by Marc Horowitz.
18 1.1 uch * 4. The name of the author may not be used to endorse or promote products
19 1.1 uch * derived from this software without specific prior written permission.
20 1.1 uch *
21 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 uch * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 uch * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 uch * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 uch * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 uch * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 uch * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 uch * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 uch * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 uch * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 uch */
32 1.1 uch
33 1.1 uch #include "opt_tx39_debug.h"
34 1.1 uch
35 1.1 uch #include <sys/param.h>
36 1.1 uch #include <sys/systm.h>
37 1.1 uch #include <sys/device.h>
38 1.4 uch #include <sys/kthread.h>
39 1.1 uch
40 1.1 uch #include <machine/bus.h>
41 1.1 uch
42 1.1 uch #include <dev/pcmcia/pcmciareg.h>
43 1.1 uch #include <dev/pcmcia/pcmciavar.h>
44 1.1 uch #include <dev/pcmcia/pcmciachip.h>
45 1.1 uch
46 1.1 uch #include <hpcmips/tx/tx39var.h>
47 1.1 uch #include <hpcmips/dev/plumvar.h>
48 1.1 uch #include <hpcmips/dev/plumicuvar.h>
49 1.2 uch #include <hpcmips/dev/plumpowervar.h>
50 1.1 uch #include <hpcmips/dev/plumpcmciareg.h>
51 1.1 uch
52 1.1 uch #ifdef PLUMPCMCIADEBUG
53 1.1 uch #define DPRINTF(arg) printf arg
54 1.1 uch #else
55 1.1 uch #define DPRINTF(arg)
56 1.1 uch #endif
57 1.1 uch
58 1.4 uch int plumpcmcia_match(struct device *, struct cfdata *, void *);
59 1.4 uch void plumpcmcia_attach(struct device *, struct device *, void *);
60 1.4 uch int plumpcmcia_print(void *, const char *);
61 1.4 uch int plumpcmcia_submatch(struct device *, struct cfdata *, void *);
62 1.1 uch
63 1.1 uch struct plumpcmcia_softc;
64 1.1 uch
65 1.1 uch struct plumpcmcia_handle {
66 1.1 uch /* parent */
67 1.1 uch struct device *ph_parent;
68 1.1 uch /* child */
69 1.1 uch struct device *ph_pcmcia;
70 1.1 uch
71 1.1 uch /* PCMCIA controller register space */
72 1.1 uch bus_space_tag_t ph_regt;
73 1.1 uch bus_space_handle_t ph_regh;
74 1.1 uch
75 1.1 uch /* I/O port space */
76 1.1 uch int ph_ioarea; /* not PCMCIA window */
77 1.1 uch struct {
78 1.1 uch bus_addr_t pi_addr;
79 1.1 uch bus_size_t pi_size;
80 1.1 uch int pi_width;
81 1.1 uch } ph_io[PLUM_PCMCIA_IO_WINS];
82 1.1 uch int ph_ioalloc;
83 1.1 uch bus_space_tag_t ph_iot;
84 1.1 uch bus_space_handle_t ph_ioh;
85 1.1 uch bus_addr_t ph_iobase;
86 1.1 uch bus_size_t ph_iosize;
87 1.1 uch
88 1.1 uch /* I/O Memory space */
89 1.1 uch int ph_memarea; /* not PCMCIA window */
90 1.1 uch struct {
91 1.1 uch bus_addr_t pm_addr;
92 1.1 uch bus_size_t pm_size;
93 1.1 uch int32_t pm_offset;
94 1.1 uch int pm_kind;
95 1.1 uch } ph_mem[PLUM_PCMCIA_MEM_WINS];
96 1.1 uch int ph_memalloc;
97 1.1 uch bus_space_tag_t ph_memt;
98 1.1 uch bus_space_handle_t ph_memh;
99 1.1 uch bus_addr_t ph_membase;
100 1.1 uch bus_size_t ph_memsize;
101 1.1 uch
102 1.4 uch /* Card interrupt handler */
103 1.1 uch int ph_plum_irq;
104 1.1 uch void *ph_card_ih;
105 1.1 uch };
106 1.1 uch
107 1.4 uch enum plumpcmcia_event_type {
108 1.4 uch PLUM_PCMCIA_EVENT_INSERT,
109 1.4 uch PLUM_PCMCIA_EVENT_REMOVE,
110 1.4 uch };
111 1.4 uch
112 1.4 uch struct plumpcmcia_event {
113 1.4 uch int __queued;
114 1.4 uch enum plumpcmcia_event_type pe_type;
115 1.4 uch struct plumpcmcia_handle *pe_ph;
116 1.4 uch SIMPLEQ_ENTRY(plumpcmcia_event) pe_link;
117 1.4 uch };
118 1.4 uch
119 1.1 uch struct plumpcmcia_softc {
120 1.1 uch struct device sc_dev;
121 1.1 uch plum_chipset_tag_t sc_pc;
122 1.1 uch
123 1.1 uch /* Register space */
124 1.1 uch bus_space_tag_t sc_regt;
125 1.1 uch bus_space_handle_t sc_regh;
126 1.1 uch
127 1.4 uch /* CSC event */
128 1.4 uch struct proc *sc_event_thread;
129 1.4 uch SIMPLEQ_HEAD (, plumpcmcia_event) sc_event_head;
130 1.4 uch
131 1.4 uch /* for each slot */
132 1.1 uch struct plumpcmcia_handle sc_ph[PLUMPCMCIA_NSLOTS];
133 1.1 uch };
134 1.1 uch
135 1.4 uch static void plumpcmcia_attach_socket(struct plumpcmcia_handle *);
136 1.4 uch static int plumpcmcia_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
137 1.4 uch struct pcmcia_mem_handle *);
138 1.4 uch static void plumpcmcia_chip_mem_free(pcmcia_chipset_handle_t,
139 1.4 uch struct pcmcia_mem_handle *);
140 1.4 uch static int plumpcmcia_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
141 1.4 uch bus_size_t, struct pcmcia_mem_handle *,
142 1.4 uch bus_addr_t *, int *);
143 1.4 uch static void plumpcmcia_chip_mem_unmap(pcmcia_chipset_handle_t, int);
144 1.4 uch static int plumpcmcia_chip_io_alloc(pcmcia_chipset_handle_t, bus_addr_t,
145 1.4 uch bus_size_t, bus_size_t,
146 1.4 uch struct pcmcia_io_handle *);
147 1.4 uch static void plumpcmcia_chip_io_free(pcmcia_chipset_handle_t,
148 1.4 uch struct pcmcia_io_handle *);
149 1.4 uch static int plumpcmcia_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
150 1.4 uch bus_size_t, struct pcmcia_io_handle *,
151 1.4 uch int *);
152 1.4 uch static void plumpcmcia_chip_io_unmap(pcmcia_chipset_handle_t, int);
153 1.4 uch static void plumpcmcia_chip_socket_enable(pcmcia_chipset_handle_t);
154 1.4 uch static void plumpcmcia_chip_socket_disable(pcmcia_chipset_handle_t);
155 1.4 uch static void *plumpcmcia_chip_intr_establish(pcmcia_chipset_handle_t,
156 1.4 uch struct pcmcia_function *, int,
157 1.4 uch int (*)(void *), void *);
158 1.4 uch static void plumpcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
159 1.4 uch static void plumpcmcia_wait_ready( struct plumpcmcia_handle *);
160 1.4 uch static void plumpcmcia_chip_do_mem_map(struct plumpcmcia_handle *, int);
161 1.4 uch static void plumpcmcia_chip_do_io_map(struct plumpcmcia_handle *, int);
162 1.1 uch
163 1.1 uch static struct pcmcia_chip_functions plumpcmcia_functions = {
164 1.1 uch plumpcmcia_chip_mem_alloc,
165 1.1 uch plumpcmcia_chip_mem_free,
166 1.1 uch plumpcmcia_chip_mem_map,
167 1.1 uch plumpcmcia_chip_mem_unmap,
168 1.1 uch plumpcmcia_chip_io_alloc,
169 1.1 uch plumpcmcia_chip_io_free,
170 1.1 uch plumpcmcia_chip_io_map,
171 1.1 uch plumpcmcia_chip_io_unmap,
172 1.1 uch plumpcmcia_chip_intr_establish,
173 1.1 uch plumpcmcia_chip_intr_disestablish,
174 1.1 uch plumpcmcia_chip_socket_enable,
175 1.1 uch plumpcmcia_chip_socket_disable
176 1.1 uch };
177 1.1 uch
178 1.4 uch /* CSC */
179 1.4 uch #define PLUM_PCMCIA_EVENT_QUEUE_MAX 5
180 1.4 uch static struct plumpcmcia_event __event_queue_pool[PLUM_PCMCIA_EVENT_QUEUE_MAX];
181 1.4 uch static struct plumpcmcia_event *plumpcmcia_event_alloc(void);
182 1.4 uch static void plumpcmcia_event_free(struct plumpcmcia_event *);
183 1.4 uch static void plum_csc_intr_setup(struct plumpcmcia_softc *,
184 1.4 uch struct plumpcmcia_handle *, int);
185 1.4 uch static int plum_csc_intr(void *);
186 1.4 uch static void plumpcmcia_create_event_thread(void *);
187 1.4 uch static void plumpcmcia_event_thread(void *);
188 1.4 uch
189 1.4 uch /* debug */
190 1.4 uch #define __DEBUG_FUNC __attribute__((__unused__))
191 1.4 uch static void __ioareadump(plumreg_t) __DEBUG_FUNC;
192 1.4 uch static void __memareadump(plumreg_t) __DEBUG_FUNC;
193 1.4 uch static void plumpcmcia_dump(struct plumpcmcia_softc *) __DEBUG_FUNC;
194 1.4 uch
195 1.1 uch struct cfattach plumpcmcia_ca = {
196 1.1 uch sizeof(struct plumpcmcia_softc), plumpcmcia_match, plumpcmcia_attach
197 1.1 uch };
198 1.1 uch
199 1.1 uch int
200 1.4 uch plumpcmcia_match(struct device *parent, struct cfdata *cf, void *aux)
201 1.1 uch {
202 1.1 uch return 1;
203 1.1 uch }
204 1.1 uch
205 1.1 uch void
206 1.4 uch plumpcmcia_attach(struct device *parent, struct device *self, void *aux)
207 1.1 uch {
208 1.1 uch struct plum_attach_args *pa = aux;
209 1.1 uch struct plumpcmcia_softc *sc = (void*)self;
210 1.1 uch struct plumpcmcia_handle *ph;
211 1.1 uch
212 1.1 uch sc->sc_pc = pa->pa_pc;
213 1.1 uch sc->sc_regt = pa->pa_regt;
214 1.1 uch if (bus_space_map(sc->sc_regt, PLUM_PCMCIA_REGBASE,
215 1.1 uch PLUM_PCMCIA_REGSIZE, 0, &sc->sc_regh)) {
216 1.1 uch printf(": register map failed\n");
217 1.1 uch }
218 1.1 uch
219 1.1 uch printf("\n");
220 1.1 uch
221 1.4 uch /* Slot0/1 CSC event queue */
222 1.4 uch SIMPLEQ_INIT (&sc->sc_event_head);
223 1.4 uch kthread_create(plumpcmcia_create_event_thread, sc);
224 1.4 uch
225 1.1 uch /* Slot 0 */
226 1.1 uch ph = &sc->sc_ph[0];
227 1.1 uch ph->ph_plum_irq = PLUM_INT_C1IO;
228 1.1 uch ph->ph_memarea = PLUM_PCMCIA_MEMWINCTRL_MAP_AREA1;
229 1.1 uch ph->ph_membase = PLUM_PCMCIA_MEMBASE1;
230 1.1 uch ph->ph_memsize = PLUM_PCMCIA_MEMSIZE1;
231 1.1 uch ph->ph_ioarea = PLUM_PCMCIA_IOWINADDRCTRL_AREA1;
232 1.1 uch ph->ph_iobase = PLUM_PCMCIA_IOBASE1;
233 1.1 uch ph->ph_iosize = PLUM_PCMCIA_IOSIZE1;
234 1.1 uch ph->ph_regt = sc->sc_regt;
235 1.1 uch bus_space_subregion(sc->sc_regt, sc->sc_regh,
236 1.1 uch PLUM_PCMCIA_REGSPACE_SLOT0,
237 1.1 uch PLUM_PCMCIA_REGSPACE_SIZE,
238 1.1 uch &ph->ph_regh);
239 1.1 uch ph->ph_iot = pa->pa_iot;
240 1.1 uch ph->ph_memt = pa->pa_iot;
241 1.1 uch ph->ph_parent = (void*)sc;
242 1.2 uch
243 1.4 uch plum_csc_intr_setup(sc, ph, PLUM_INT_C1SC);
244 1.2 uch plum_power_establish(sc->sc_pc, PLUM_PWR_PCC1);
245 1.1 uch plumpcmcia_attach_socket(ph);
246 1.1 uch
247 1.1 uch /* Slot 1 */
248 1.1 uch ph = &sc->sc_ph[1];
249 1.1 uch ph->ph_plum_irq = PLUM_INT_C2IO;
250 1.1 uch ph->ph_memarea = PLUM_PCMCIA_MEMWINCTRL_MAP_AREA2;
251 1.1 uch ph->ph_membase = PLUM_PCMCIA_MEMBASE2;
252 1.1 uch ph->ph_memsize = PLUM_PCMCIA_MEMSIZE2;
253 1.1 uch ph->ph_ioarea = PLUM_PCMCIA_IOWINADDRCTRL_AREA2;
254 1.1 uch ph->ph_iobase = PLUM_PCMCIA_IOBASE2;
255 1.1 uch ph->ph_iosize = PLUM_PCMCIA_IOSIZE2;
256 1.1 uch ph->ph_regt = sc->sc_regt;
257 1.1 uch bus_space_subregion(sc->sc_regt, sc->sc_regh,
258 1.1 uch PLUM_PCMCIA_REGSPACE_SLOT1,
259 1.1 uch PLUM_PCMCIA_REGSPACE_SIZE,
260 1.1 uch &ph->ph_regh);
261 1.1 uch ph->ph_iot = pa->pa_iot;
262 1.1 uch ph->ph_memt = pa->pa_iot;
263 1.1 uch ph->ph_parent = (void*)sc;
264 1.2 uch
265 1.4 uch plum_csc_intr_setup(sc, ph, PLUM_INT_C2SC);
266 1.2 uch plum_power_establish(sc->sc_pc, PLUM_PWR_PCC2);
267 1.1 uch plumpcmcia_attach_socket(ph);
268 1.1 uch }
269 1.1 uch
270 1.1 uch int
271 1.4 uch plumpcmcia_print(void *arg, const char *pnp)
272 1.1 uch {
273 1.1 uch if (pnp) {
274 1.1 uch printf("pcmcia at %s", pnp);
275 1.1 uch }
276 1.1 uch
277 1.1 uch return UNCONF;
278 1.1 uch }
279 1.1 uch
280 1.1 uch int
281 1.4 uch plumpcmcia_submatch(struct device *parent, struct cfdata *cf, void *aux)
282 1.1 uch {
283 1.1 uch return ((*cf->cf_attach->ca_match)(parent, cf, aux));
284 1.1 uch }
285 1.1 uch
286 1.4 uch static void
287 1.4 uch plumpcmcia_attach_socket(struct plumpcmcia_handle *ph)
288 1.1 uch {
289 1.1 uch struct pcmciabus_attach_args paa;
290 1.1 uch struct plumpcmcia_softc *sc = (void*)ph->ph_parent;
291 1.1 uch
292 1.1 uch paa.paa_busname = "pcmcia";
293 1.1 uch paa.pct = (pcmcia_chipset_tag_t)&plumpcmcia_functions;
294 1.1 uch paa.pch = (pcmcia_chipset_handle_t)ph;
295 1.1 uch paa.iobase = 0; /* I don't use them */
296 1.1 uch paa.iosize = 0;
297 1.1 uch
298 1.1 uch
299 1.1 uch if ((ph->ph_pcmcia = config_found_sm((void*)sc, &paa,
300 1.1 uch plumpcmcia_print,
301 1.1 uch plumpcmcia_submatch))) {
302 1.1 uch /* Enable slot */
303 1.1 uch plum_conf_write(ph->ph_regt, ph->ph_regh,
304 1.1 uch PLUM_PCMCIA_SLOTCTRL,
305 1.1 uch PLUM_PCMCIA_SLOTCTRL_ENABLE);
306 1.1 uch /* Support 3.3V card & enable Voltage Sense Status */
307 1.1 uch plum_conf_write(ph->ph_regt, ph->ph_regh,
308 1.1 uch PLUM_PCMCIA_FUNCCTRL,
309 1.1 uch PLUM_PCMCIA_FUNCCTRL_VSSEN |
310 1.1 uch PLUM_PCMCIA_FUNCCTRL_3VSUPPORT);
311 1.1 uch pcmcia_card_attach(ph->ph_pcmcia);
312 1.1 uch }
313 1.1 uch }
314 1.1 uch
315 1.4 uch static void *
316 1.4 uch plumpcmcia_chip_intr_establish(pcmcia_chipset_handle_t pch,
317 1.4 uch struct pcmcia_function *pf, int ipl,
318 1.4 uch int (*ih_fun)(void *), void *ih_arg)
319 1.1 uch {
320 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
321 1.1 uch struct plumpcmcia_softc *sc = (void*)ph->ph_parent;
322 1.1 uch
323 1.1 uch if (!(ph->ph_card_ih =
324 1.1 uch plum_intr_establish(sc->sc_pc, ph->ph_plum_irq,
325 1.1 uch IST_EDGE, IPL_BIO, ih_fun, ih_arg))) {
326 1.1 uch printf("plumpcmcia_chip_intr_establish: can't establish\n");
327 1.1 uch return 0;
328 1.1 uch }
329 1.1 uch
330 1.1 uch return ph->ph_card_ih;
331 1.1 uch }
332 1.1 uch
333 1.4 uch static void
334 1.4 uch plumpcmcia_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
335 1.1 uch {
336 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
337 1.1 uch struct plumpcmcia_softc *sc = (void*)ph->ph_parent;
338 1.1 uch
339 1.1 uch plum_intr_disestablish(sc->sc_pc, ih);
340 1.1 uch }
341 1.1 uch
342 1.4 uch static int
343 1.4 uch plumpcmcia_chip_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size,
344 1.4 uch struct pcmcia_mem_handle *pcmhp)
345 1.1 uch {
346 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
347 1.1 uch bus_size_t realsize;
348 1.1 uch
349 1.1 uch /* convert size to PCIC pages */
350 1.1 uch realsize = ((size + (PLUM_PCMCIA_MEM_PAGESIZE - 1)) /
351 1.1 uch PLUM_PCMCIA_MEM_PAGESIZE) * PLUM_PCMCIA_MEM_PAGESIZE;
352 1.1 uch
353 1.1 uch if (bus_space_alloc(ph->ph_memt, ph->ph_membase,
354 1.1 uch ph->ph_membase + ph->ph_memsize,
355 1.1 uch realsize, PLUM_PCMCIA_MEM_PAGESIZE,
356 1.1 uch 0, 0, 0, &pcmhp->memh)) {
357 1.1 uch return 1;
358 1.1 uch }
359 1.1 uch
360 1.1 uch pcmhp->memt = ph->ph_memt;
361 1.1 uch /* Address offset from MEM area base */
362 1.1 uch pcmhp->addr = pcmhp->memh - ph->ph_membase - ph->ph_memt->t_base;
363 1.1 uch pcmhp->size = size;
364 1.1 uch pcmhp->realsize = realsize;
365 1.1 uch
366 1.1 uch DPRINTF(("plumpcmcia_chip_mem_alloc: size %#x->%#x addr %#x->%#x\n",
367 1.4 uch (unsigned)size, (unsigned)realsize, (unsigned)pcmhp->addr,
368 1.4 uch (unsigned)pcmhp->memh));
369 1.1 uch
370 1.1 uch return 0;
371 1.1 uch }
372 1.1 uch
373 1.4 uch static void
374 1.4 uch plumpcmcia_chip_mem_free(pcmcia_chipset_handle_t pch,
375 1.4 uch struct pcmcia_mem_handle *pcmhp)
376 1.1 uch {
377 1.1 uch bus_space_free(pcmhp->memt, pcmhp->memh, pcmhp->size);
378 1.1 uch }
379 1.1 uch
380 1.4 uch static int
381 1.4 uch plumpcmcia_chip_mem_map(pcmcia_chipset_handle_t pch, int kind,
382 1.4 uch bus_addr_t card_addr, bus_size_t size,
383 1.4 uch struct pcmcia_mem_handle *pcmhp,
384 1.4 uch bus_addr_t *offsetp, int *windowp)
385 1.1 uch {
386 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
387 1.1 uch bus_addr_t busaddr;
388 1.1 uch int32_t card_offset;
389 1.1 uch int i, win;
390 1.1 uch
391 1.1 uch for (win = -1, i = 0; i < PLUM_PCMCIA_MEM_WINS; i++) {
392 1.1 uch if ((ph->ph_memalloc & (1 << i)) == 0) {
393 1.1 uch win = i;
394 1.1 uch ph->ph_memalloc |= (1 << i);
395 1.1 uch break;
396 1.1 uch }
397 1.1 uch }
398 1.1 uch if (win == -1) {
399 1.1 uch DPRINTF(("plumpcmcia_chip_mem_map: no window\n"));
400 1.1 uch return 1;
401 1.1 uch }
402 1.1 uch
403 1.1 uch busaddr = pcmhp->addr;
404 1.1 uch
405 1.1 uch *offsetp = card_addr % PLUM_PCMCIA_MEM_PAGESIZE;
406 1.1 uch card_addr -= *offsetp;
407 1.1 uch size += *offsetp - 1;
408 1.1 uch *windowp = win;
409 1.1 uch card_offset = (((int32_t)card_addr) - ((int32_t)busaddr));
410 1.1 uch
411 1.1 uch DPRINTF(("plumpcmcia_chip_mem_map window %d bus %#x(kv:%#x)+%#x"
412 1.4 uch " size %#x at card addr %#x offset %#x\n", win,
413 1.4 uch (unsigned)busaddr, (unsigned)pcmhp->memh, (unsigned)*offsetp,
414 1.4 uch (unsigned)size, (unsigned)card_addr, (unsigned)card_offset));
415 1.1 uch
416 1.1 uch ph->ph_mem[win].pm_addr = busaddr;
417 1.1 uch ph->ph_mem[win].pm_size = size;
418 1.1 uch ph->ph_mem[win].pm_offset = card_offset;
419 1.1 uch ph->ph_mem[win].pm_kind = kind;
420 1.1 uch ph->ph_memalloc |= (1 << win);
421 1.1 uch
422 1.1 uch plumpcmcia_chip_do_mem_map(ph, win);
423 1.1 uch
424 1.1 uch return 0;
425 1.1 uch }
426 1.1 uch
427 1.4 uch static void
428 1.4 uch plumpcmcia_chip_do_mem_map(struct plumpcmcia_handle *ph, int win)
429 1.1 uch {
430 1.1 uch bus_space_tag_t regt = ph->ph_regt;
431 1.1 uch bus_space_handle_t regh = ph->ph_regh;
432 1.1 uch plumreg_t reg, addr, offset, size;
433 1.1 uch
434 1.1 uch if (win < 0 || win > 4) {
435 1.1 uch panic("plumpcmcia_chip_do_mem_map: bogus window %d", win);
436 1.1 uch }
437 1.1 uch
438 1.1 uch addr = (ph->ph_mem[win].pm_addr) >> PLUM_PCMCIA_MEM_SHIFT;
439 1.1 uch size = (ph->ph_mem[win].pm_size) >> PLUM_PCMCIA_MEM_SHIFT;
440 1.1 uch offset = (ph->ph_mem[win].pm_offset) >> PLUM_PCMCIA_MEM_SHIFT;
441 1.1 uch
442 1.1 uch /* Attribute memory or not */
443 1.1 uch reg = ph->ph_mem[win].pm_kind == PCMCIA_MEM_ATTR ?
444 1.1 uch PLUM_PCMCIA_MEMWINCTRL_REGACTIVE : 0;
445 1.1 uch
446 1.1 uch /* Notify I/O area to select for PCMCIA controller */
447 1.1 uch reg = PLUM_PCMCIA_MEMWINCTRL_MAP_SET(reg, ph->ph_memarea);
448 1.1 uch
449 1.1 uch /* Zero wait & 16bit access */
450 1.1 uch reg |= (PLUM_PCMCIA_MEMWINCTRL_ZERO_WS |
451 1.1 uch PLUM_PCMCIA_MEMWINCTRL_DATASIZE16);
452 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_MEMWINCTRL(win), reg);
453 1.1 uch
454 1.1 uch /* Map Host <-> PC-Card address */
455 1.1 uch
456 1.1 uch /* host-side */
457 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_MEMWINSTARTADDR(win),
458 1.1 uch addr);
459 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_MEMWINSTOPADDR(win),
460 1.1 uch addr + size);
461 1.1 uch
462 1.1 uch /* card-side */
463 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_MEMWINOFSADDR(win), offset);
464 1.1 uch
465 1.1 uch /* Enable memory window */
466 1.1 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_WINEN);
467 1.1 uch reg |= PLUM_PCMCIA_WINEN_MEM(win);
468 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_WINEN, reg);
469 1.1 uch
470 1.2 uch DPRINTF(("plumpcmcia_chip_do_mem_map: window:%d %#x(%#x)+%#x\n",
471 1.2 uch win, offset, addr, size));
472 1.1 uch
473 1.1 uch delay(100);
474 1.1 uch }
475 1.1 uch
476 1.4 uch static void
477 1.4 uch plumpcmcia_chip_mem_unmap(pcmcia_chipset_handle_t pch, int window)
478 1.1 uch {
479 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
480 1.1 uch bus_space_tag_t regt = ph->ph_regt;
481 1.1 uch bus_space_handle_t regh = ph->ph_regh;
482 1.1 uch plumreg_t reg;
483 1.1 uch
484 1.1 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_WINEN);
485 1.1 uch reg &= ~PLUM_PCMCIA_WINEN_MEM(window);
486 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_WINEN, reg);
487 1.1 uch
488 1.1 uch ph->ph_memalloc &= ~(1 << window);
489 1.1 uch }
490 1.1 uch
491 1.4 uch static int
492 1.4 uch plumpcmcia_chip_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start,
493 1.4 uch bus_size_t size, bus_size_t align,
494 1.4 uch struct pcmcia_io_handle *pcihp)
495 1.1 uch {
496 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
497 1.1 uch
498 1.1 uch DPRINTF(("plumpcmcia_chip_io_alloc: start=%#x size=%#x ",
499 1.4 uch (unsigned)start, (unsigned)size));
500 1.1 uch if (start) {
501 1.1 uch if (bus_space_map(ph->ph_iot, ph->ph_iobase + start,
502 1.1 uch size, 0, &pcihp->ioh)) {
503 1.1 uch DPRINTF(("bus_space_map failed\n"));
504 1.1 uch return 1;
505 1.1 uch }
506 1.1 uch pcihp->flags = 0;
507 1.2 uch pcihp->addr = start;
508 1.4 uch DPRINTF(("(mapped) %#x+%#x\n", (unsigned)start,
509 1.4 uch (unsigned)size));
510 1.1 uch } else {
511 1.1 uch if (bus_space_alloc(ph->ph_iot, ph->ph_iobase,
512 1.1 uch ph->ph_iobase + ph->ph_iosize, size,
513 1.2 uch align, 0, 0, 0, &pcihp->ioh)) {
514 1.1 uch DPRINTF(("bus_space_alloc failed\n"));
515 1.1 uch return 1;
516 1.1 uch }
517 1.2 uch /* Address offset from IO area base */
518 1.2 uch pcihp->addr = pcihp->ioh - ph->ph_iobase -
519 1.2 uch ph->ph_iot->t_base;
520 1.1 uch pcihp->flags = PCMCIA_IO_ALLOCATED;
521 1.4 uch DPRINTF(("(allocated) %#x+%#x\n", (unsigned)pcihp->addr,
522 1.4 uch (unsigned)size));
523 1.1 uch }
524 1.1 uch
525 1.1 uch pcihp->iot = ph->ph_iot;
526 1.1 uch pcihp->size = size;
527 1.1 uch
528 1.1 uch return 0;
529 1.1 uch }
530 1.1 uch
531 1.4 uch static int
532 1.4 uch plumpcmcia_chip_io_map(pcmcia_chipset_handle_t pch, int width,
533 1.4 uch bus_addr_t offset, bus_size_t size,
534 1.4 uch struct pcmcia_io_handle *pcihp, int *windowp)
535 1.1 uch {
536 1.2 uch #ifdef PLUMPCMCIADEBUG
537 1.1 uch static char *width_names[] = { "auto", "io8", "io16" };
538 1.2 uch #endif /* PLUMPCMCIADEBUG */
539 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
540 1.1 uch bus_addr_t winofs;
541 1.1 uch int i, win;
542 1.1 uch
543 1.2 uch winofs = pcihp->addr + offset;
544 1.2 uch
545 1.2 uch if (winofs > 0x3ff) {
546 1.3 takemura printf("plumpcmcia_chip_io_map: WARNING port %#lx > 0x3ff\n",
547 1.2 uch winofs);
548 1.2 uch }
549 1.1 uch
550 1.1 uch for (win = -1, i = 0; i < PLUM_PCMCIA_IO_WINS; i++) {
551 1.1 uch if ((ph->ph_ioalloc & (1 << i)) == 0) {
552 1.1 uch win = i;
553 1.1 uch ph->ph_ioalloc |= (1 << i);
554 1.1 uch break;
555 1.1 uch }
556 1.1 uch }
557 1.1 uch if (win == -1) {
558 1.1 uch DPRINTF(("plumpcmcia_chip_io_map: no window\n"));
559 1.1 uch return 1;
560 1.1 uch }
561 1.1 uch *windowp = win;
562 1.1 uch
563 1.1 uch ph->ph_io[win].pi_addr = winofs;
564 1.1 uch ph->ph_io[win].pi_size = size;
565 1.1 uch ph->ph_io[win].pi_width = width;
566 1.1 uch
567 1.1 uch plumpcmcia_chip_do_io_map(ph, win);
568 1.1 uch
569 1.1 uch DPRINTF(("plumpcmcia_chip_io_map: %#x(kv:%#x)+%#x %s\n",
570 1.4 uch (unsigned)offset, (unsigned)pcihp->ioh, (unsigned)size,
571 1.4 uch width_names[width]));
572 1.1 uch
573 1.1 uch return 0;
574 1.1 uch }
575 1.1 uch
576 1.4 uch static void
577 1.4 uch plumpcmcia_chip_do_io_map(struct plumpcmcia_handle *ph, int win)
578 1.1 uch {
579 1.1 uch bus_space_tag_t regt = ph->ph_regt;
580 1.1 uch bus_space_handle_t regh = ph->ph_regh;
581 1.1 uch plumreg_t reg;
582 1.1 uch bus_addr_t addr;
583 1.1 uch bus_size_t size;
584 1.1 uch int shift;
585 1.1 uch plumreg_t ioctlbits[3] = {
586 1.1 uch PLUM_PCMCIA_IOWINCTRL_IOCS16SRC,
587 1.1 uch 0,
588 1.1 uch PLUM_PCMCIA_IOWINCTRL_DATASIZE16
589 1.1 uch };
590 1.1 uch
591 1.1 uch if (win < 0 || win > 1) {
592 1.1 uch panic("plumpcmcia_chip_do_io_map: bogus window %d", win);
593 1.1 uch }
594 1.1 uch
595 1.1 uch addr = ph->ph_io[win].pi_addr;
596 1.1 uch size = ph->ph_io[win].pi_size;
597 1.1 uch
598 1.1 uch /* Notify I/O area to select for PCMCIA controller */
599 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_IOWINADDRCTRL(win),
600 1.1 uch ph->ph_ioarea);
601 1.1 uch
602 1.1 uch /* Start/Stop addr */
603 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_IOWINSTARTADDR(win), addr);
604 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_IOWINSTOPADDR(win),
605 1.1 uch addr + size - 1);
606 1.1 uch
607 1.1 uch /* Set bus width */
608 1.1 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_IOWINCTRL);
609 1.1 uch shift = win == 0 ? PLUM_PCMCIA_IOWINCTRL_WIN0SHIFT :
610 1.1 uch PLUM_PCMCIA_IOWINCTRL_WIN1SHIFT;
611 1.1 uch
612 1.1 uch reg &= ~(PLUM_PCMCIA_IOWINCTRL_WINMASK << shift);
613 1.1 uch reg |= ((ioctlbits[ph->ph_io[win].pi_width] |
614 1.1 uch PLUM_PCMCIA_IOWINCTRL_ZEROWAIT) << shift);
615 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_IOWINCTRL, reg);
616 1.1 uch
617 1.1 uch /* Enable window */
618 1.1 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_WINEN);
619 1.1 uch reg |= (win == 0 ? PLUM_PCMCIA_WINEN_IO0 :
620 1.1 uch PLUM_PCMCIA_WINEN_IO1);
621 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_WINEN, reg);
622 1.1 uch
623 1.1 uch delay(100);
624 1.1 uch }
625 1.1 uch
626 1.4 uch static void
627 1.4 uch plumpcmcia_chip_io_free(pcmcia_chipset_handle_t pch,
628 1.4 uch struct pcmcia_io_handle *pcihp)
629 1.1 uch {
630 1.1 uch if (pcihp->flags & PCMCIA_IO_ALLOCATED) {
631 1.1 uch bus_space_free(pcihp->iot, pcihp->ioh, pcihp->size);
632 1.1 uch } else {
633 1.1 uch bus_space_unmap(pcihp->iot, pcihp->ioh, pcihp->size);
634 1.1 uch }
635 1.1 uch
636 1.1 uch DPRINTF(("plumpcmcia_chip_io_free %#x+%#x\n", pcihp->ioh,
637 1.4 uch (unsigned)pcihp->size));
638 1.1 uch }
639 1.1 uch
640 1.4 uch static void
641 1.4 uch plumpcmcia_chip_io_unmap(pcmcia_chipset_handle_t pch, int window)
642 1.1 uch {
643 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
644 1.1 uch bus_space_tag_t regt = ph->ph_regt;
645 1.1 uch bus_space_handle_t regh = ph->ph_regh;
646 1.1 uch plumreg_t reg;
647 1.1 uch
648 1.1 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_WINEN);
649 1.1 uch switch (window) {
650 1.1 uch default:
651 1.1 uch panic("plumpcmcia_chip_io_unmap: bogus window");
652 1.1 uch case 0:
653 1.1 uch reg &= ~PLUM_PCMCIA_WINEN_IO0;
654 1.1 uch break;
655 1.1 uch case 1:
656 1.1 uch reg &= ~PLUM_PCMCIA_WINEN_IO1;
657 1.1 uch break;
658 1.1 uch }
659 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_WINEN, reg);
660 1.1 uch ph->ph_ioalloc &= ~(1 << window);
661 1.1 uch }
662 1.1 uch
663 1.4 uch static void
664 1.4 uch plumpcmcia_wait_ready(struct plumpcmcia_handle *ph)
665 1.1 uch {
666 1.1 uch bus_space_tag_t regt = ph->ph_regt;
667 1.1 uch bus_space_handle_t regh = ph->ph_regh;
668 1.1 uch int i;
669 1.1 uch
670 1.1 uch for (i = 0; i < 10000; i++) {
671 1.1 uch if ((plum_conf_read(regt, regh, PLUM_PCMCIA_STATUS) &
672 1.1 uch PLUM_PCMCIA_STATUS_READY) &&
673 1.1 uch (plum_conf_read(regt, regh, PLUM_PCMCIA_STATUS) &
674 1.1 uch PLUM_PCMCIA_STATUS_PWROK)) {
675 1.1 uch return;
676 1.1 uch }
677 1.1 uch delay(500);
678 1.1 uch
679 1.1 uch if ((i > 5000) && (i % 100 == 99)) {
680 1.1 uch printf(".");
681 1.1 uch }
682 1.1 uch }
683 1.1 uch printf("plumpcmcia_wait_ready: failed\n");
684 1.1 uch }
685 1.1 uch
686 1.4 uch static void
687 1.4 uch plumpcmcia_chip_socket_enable(pcmcia_chipset_handle_t pch)
688 1.1 uch {
689 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
690 1.1 uch bus_space_tag_t regt = ph->ph_regt;
691 1.1 uch bus_space_handle_t regh = ph->ph_regh;
692 1.1 uch plumreg_t reg, power;
693 1.1 uch int win, cardtype;
694 1.1 uch
695 1.1 uch /* this bit is mostly stolen from pcic_attach_card */
696 1.1 uch
697 1.1 uch /* power down the socket to reset it, clear the card reset pin */
698 1.1 uch
699 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_PWRCTRL, 0);
700 1.1 uch
701 1.1 uch /*
702 1.1 uch * wait 300ms until power fails (Tpf). Then, wait 100ms since
703 1.1 uch * we are changing Vcc (Toff).
704 1.1 uch */
705 1.1 uch delay((300 + 100) * 1000);
706 1.1 uch
707 1.1 uch /*
708 1.1 uch * power up the socket
709 1.1 uch */
710 1.1 uch /* detect voltage */
711 1.1 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_GENCTRL2);
712 1.1 uch if ((reg & PLUM_PCMCIA_GENCTRL2_VCC5V) ==
713 1.1 uch PLUM_PCMCIA_GENCTRL2_VCC5V) {
714 1.1 uch power = PLUM_PCMCIA_PWRCTRL_VCC_CTRLBIT1; /* 5V */
715 1.1 uch } else {
716 1.1 uch power = PLUM_PCMCIA_PWRCTRL_VCC_CTRLBIT0; /* 3.3V */
717 1.1 uch }
718 1.1 uch
719 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_PWRCTRL,
720 1.1 uch PLUM_PCMCIA_PWRCTRL_DISABLE_RESETDRV |
721 1.1 uch power |
722 1.1 uch PLUM_PCMCIA_PWRCTRL_PWR_ENABLE);
723 1.1 uch
724 1.1 uch /*
725 1.1 uch * wait 100ms until power raise (Tpr) and 20ms to become
726 1.1 uch * stable (Tsu(Vcc)).
727 1.1 uch *
728 1.1 uch * some machines require some more time to be settled
729 1.1 uch * (300ms is added here).
730 1.1 uch */
731 1.1 uch delay((100 + 20 + 300) * 1000);
732 1.1 uch
733 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_PWRCTRL,
734 1.1 uch PLUM_PCMCIA_PWRCTRL_DISABLE_RESETDRV |
735 1.1 uch power |
736 1.1 uch PLUM_PCMCIA_PWRCTRL_OE |
737 1.1 uch PLUM_PCMCIA_PWRCTRL_PWR_ENABLE);
738 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_GENCTRL, 0);
739 1.1 uch
740 1.1 uch /*
741 1.1 uch * hold RESET at least 10us.
742 1.1 uch */
743 1.1 uch delay(10);
744 1.1 uch
745 1.1 uch /* clear the reset flag */
746 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_GENCTRL,
747 1.1 uch PLUM_PCMCIA_GENCTRL_RESET);
748 1.1 uch
749 1.1 uch /* wait 20ms as per pc card standard (r2.01) section 4.3.6 */
750 1.1 uch
751 1.1 uch delay(20000);
752 1.1 uch
753 1.1 uch /* wait for the chip to finish initializing */
754 1.1 uch plumpcmcia_wait_ready(ph);
755 1.1 uch
756 1.1 uch /* zero out the address windows */
757 1.1 uch
758 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_WINEN, 0);
759 1.1 uch
760 1.1 uch /* set the card type */
761 1.1 uch
762 1.1 uch cardtype = pcmcia_card_gettype(ph->ph_pcmcia);
763 1.1 uch
764 1.1 uch reg = (cardtype == PCMCIA_IFTYPE_IO) ?
765 1.1 uch PLUM_PCMCIA_GENCTRL_CARDTYPE_IO :
766 1.1 uch PLUM_PCMCIA_GENCTRL_CARDTYPE_MEM;
767 1.1 uch reg |= plum_conf_read(regt, regh, PLUM_PCMCIA_GENCTRL);
768 1.1 uch DPRINTF(("%s: plumpcmcia_chip_socket_enable cardtype %s\n",
769 1.1 uch ph->ph_parent->dv_xname,
770 1.1 uch ((cardtype == PCMCIA_IFTYPE_IO) ? "io" : "mem")));
771 1.1 uch
772 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_GENCTRL, reg);
773 1.1 uch
774 1.1 uch /* reinstall all the memory and io mappings */
775 1.1 uch
776 1.1 uch for (win = 0; win < PLUM_PCMCIA_MEM_WINS; win++) {
777 1.1 uch if (ph->ph_memalloc & (1 << win)) {
778 1.1 uch plumpcmcia_chip_do_mem_map(ph, win);
779 1.1 uch }
780 1.1 uch }
781 1.1 uch
782 1.1 uch for (win = 0; win < PLUM_PCMCIA_IO_WINS; win++) {
783 1.1 uch if (ph->ph_ioalloc & (1 << win)) {
784 1.1 uch plumpcmcia_chip_do_io_map(ph, win);
785 1.1 uch }
786 1.1 uch }
787 1.1 uch
788 1.1 uch }
789 1.1 uch
790 1.4 uch static void
791 1.4 uch plumpcmcia_chip_socket_disable(pcmcia_chipset_handle_t pch)
792 1.1 uch {
793 1.1 uch struct plumpcmcia_handle *ph = (void*)pch;
794 1.1 uch bus_space_tag_t regt = ph->ph_regt;
795 1.1 uch bus_space_handle_t regh = ph->ph_regh;
796 1.1 uch
797 1.1 uch /* power down the socket */
798 1.1 uch plum_conf_write(regt, regh, PLUM_PCMCIA_PWRCTRL, 0);
799 1.1 uch
800 1.1 uch /*
801 1.1 uch * wait 300ms until power fails (Tpf).
802 1.1 uch */
803 1.1 uch delay(300 * 1000);
804 1.1 uch }
805 1.1 uch
806 1.4 uch static void
807 1.4 uch plum_csc_intr_setup(struct plumpcmcia_softc *sc, struct plumpcmcia_handle *ph,
808 1.4 uch int irq)
809 1.4 uch {
810 1.4 uch bus_space_tag_t regt = ph->ph_regt;
811 1.4 uch bus_space_handle_t regh = ph->ph_regh;
812 1.4 uch plumreg_t reg;
813 1.4 uch void *ih;
814 1.4 uch
815 1.4 uch /* enable CARD DETECT ENABLE only */
816 1.4 uch plum_conf_write(regt, regh, PLUM_PCMCIA_CSCINT,
817 1.4 uch PLUM_PCMCIA_CSCINT_CARD_DETECT);
818 1.4 uch
819 1.4 uch /* don't use explicit writeback csc interrupt status */
820 1.4 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_GLOBALCTRL);
821 1.4 uch reg &= ~PLUM_PCMCIA_GLOBALCTRL_EXPLICIT_WB_CSC_INT;
822 1.4 uch plum_conf_write(regt, regh, PLUM_PCMCIA_GLOBALCTRL, reg);
823 1.4 uch
824 1.4 uch /* install interrupt handler (don't fail) */
825 1.4 uch ih = plum_intr_establish(sc->sc_pc, irq, IST_EDGE, IPL_TTY,
826 1.4 uch plum_csc_intr, ph);
827 1.4 uch KASSERT(ih != 0);
828 1.4 uch }
829 1.4 uch
830 1.4 uch static int
831 1.4 uch plum_csc_intr(void *arg)
832 1.4 uch {
833 1.4 uch struct plumpcmcia_handle *ph = arg;
834 1.4 uch struct plumpcmcia_softc *sc = (void *)ph->ph_parent;
835 1.4 uch struct plumpcmcia_event *pe;
836 1.4 uch bus_space_tag_t regt = ph->ph_regt;
837 1.4 uch bus_space_handle_t regh = ph->ph_regh;
838 1.4 uch plumreg_t reg;
839 1.4 uch int flag;
840 1.1 uch
841 1.4 uch /* read and clear interrupt status */
842 1.4 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_CSCINT_STAT);
843 1.4 uch if (reg & PLUM_PCMCIA_CSCINT_CARD_DETECT) {
844 1.4 uch DPRINTF(("%s: card status change.\n", __FUNCTION__));
845 1.4 uch } else {
846 1.4 uch DPRINTF(("%s: unhandled csc event. 0x%02x\n",
847 1.4 uch __FUNCTION__, reg));
848 1.4 uch return 0;
849 1.4 uch }
850 1.4 uch
851 1.4 uch /* inquire card status (insert or remove) */
852 1.4 uch reg = plum_conf_read(regt, regh, PLUM_PCMCIA_STATUS);
853 1.4 uch reg &= (PLUM_PCMCIA_STATUS_CD1 | PLUM_PCMCIA_STATUS_CD2);
854 1.4 uch if (reg == (PLUM_PCMCIA_STATUS_CD1 | PLUM_PCMCIA_STATUS_CD2)) {
855 1.4 uch /* insert */
856 1.4 uch flag = PLUM_PCMCIA_EVENT_INSERT;
857 1.4 uch } else {
858 1.4 uch /* remove */
859 1.4 uch flag = PLUM_PCMCIA_EVENT_REMOVE;
860 1.4 uch }
861 1.4 uch
862 1.4 uch /* queue event to event thread and wakeup. */
863 1.4 uch pe = plumpcmcia_event_alloc();
864 1.4 uch if (pe == 0) {
865 1.4 uch printf("%s: event FIFO overflow (%d).\n", __FUNCTION__,
866 1.4 uch PLUM_PCMCIA_EVENT_QUEUE_MAX);
867 1.4 uch return 0;
868 1.4 uch }
869 1.4 uch pe->pe_type = flag;
870 1.4 uch pe->pe_ph = ph;
871 1.4 uch SIMPLEQ_INSERT_TAIL(&sc->sc_event_head, pe, pe_link);
872 1.4 uch wakeup(sc);
873 1.4 uch
874 1.4 uch return 0;
875 1.4 uch }
876 1.4 uch
877 1.4 uch static void
878 1.4 uch __memareadump(plumreg_t reg)
879 1.1 uch {
880 1.1 uch int maparea;
881 1.1 uch
882 1.1 uch maparea = PLUM_PCMCIA_MEMWINCTRL_MAP(reg);
883 1.1 uch switch (maparea) {
884 1.1 uch case PLUM_PCMCIA_MEMWINCTRL_MAP_AREA1:
885 1.1 uch printf("MEM Area1\n");
886 1.1 uch break;
887 1.1 uch case PLUM_PCMCIA_MEMWINCTRL_MAP_AREA2:
888 1.1 uch printf("MEM Area2\n");
889 1.1 uch break;
890 1.1 uch case PLUM_PCMCIA_MEMWINCTRL_MAP_AREA3:
891 1.1 uch printf("MEM Area3\n");
892 1.1 uch break;
893 1.1 uch case PLUM_PCMCIA_MEMWINCTRL_MAP_AREA4:
894 1.1 uch printf("MEM Area4\n");
895 1.1 uch break;
896 1.1 uch }
897 1.1 uch }
898 1.1 uch
899 1.4 uch static struct plumpcmcia_event *
900 1.4 uch plumpcmcia_event_alloc()
901 1.4 uch {
902 1.4 uch int i;
903 1.4 uch /* I assume called from interrupt context only. so don't lock */
904 1.4 uch for (i = 0; i < PLUM_PCMCIA_EVENT_QUEUE_MAX; i++) {
905 1.4 uch if (!__event_queue_pool[i].__queued) {
906 1.4 uch __event_queue_pool[i].__queued = 1;
907 1.4 uch return &__event_queue_pool[i];
908 1.4 uch }
909 1.4 uch }
910 1.4 uch
911 1.4 uch return 0;
912 1.4 uch }
913 1.4 uch
914 1.4 uch static void
915 1.4 uch plumpcmcia_event_free(struct plumpcmcia_event *pe)
916 1.4 uch {
917 1.4 uch /* I assume context is already locked */
918 1.4 uch pe->__queued = 0;
919 1.4 uch }
920 1.4 uch
921 1.4 uch static void
922 1.4 uch plumpcmcia_create_event_thread(void *arg)
923 1.4 uch {
924 1.4 uch struct plumpcmcia_softc *sc = arg;
925 1.4 uch int error;
926 1.4 uch
927 1.4 uch error = kthread_create1(plumpcmcia_event_thread, sc,
928 1.4 uch &sc->sc_event_thread, "%s",
929 1.4 uch sc->sc_dev.dv_xname);
930 1.4 uch KASSERT(error == 0);
931 1.4 uch }
932 1.4 uch
933 1.4 uch static void
934 1.4 uch plumpcmcia_event_thread(void *arg)
935 1.4 uch {
936 1.4 uch struct plumpcmcia_softc *sc = arg;
937 1.4 uch struct plumpcmcia_event *pe;
938 1.4 uch int s;
939 1.4 uch
940 1.4 uch while (/*CONSTCOND*/1) { /* XXX shutdown. -uch */
941 1.4 uch tsleep(sc, PWAIT, "CSC wait", 0);
942 1.4 uch s = spltty();
943 1.4 uch while ((pe = SIMPLEQ_FIRST(&sc->sc_event_head))) {
944 1.4 uch splx(s);
945 1.4 uch switch (pe->pe_type) {
946 1.4 uch default:
947 1.4 uch printf("%s: unknown event.\n", __FUNCTION__);
948 1.4 uch break;
949 1.4 uch case PLUM_PCMCIA_EVENT_INSERT:
950 1.4 uch DPRINTF(("%s: insert event.\n", __FUNCTION__));
951 1.4 uch pcmcia_card_attach(pe->pe_ph->ph_pcmcia);
952 1.4 uch break;
953 1.4 uch case PLUM_PCMCIA_EVENT_REMOVE:
954 1.4 uch DPRINTF(("%s: remove event.\n", __FUNCTION__));
955 1.4 uch pcmcia_card_detach(pe->pe_ph->ph_pcmcia,
956 1.4 uch DETACH_FORCE);
957 1.4 uch break;
958 1.4 uch }
959 1.4 uch s = spltty();
960 1.4 uch SIMPLEQ_REMOVE_HEAD(&sc->sc_event_head, pe, pe_link);
961 1.4 uch plumpcmcia_event_free(pe);
962 1.4 uch }
963 1.4 uch splx(s);
964 1.4 uch }
965 1.4 uch /* NOTREACHED */
966 1.4 uch }
967 1.4 uch
968 1.4 uch static void
969 1.4 uch __ioareadump(plumreg_t reg)
970 1.1 uch {
971 1.1 uch if (reg & PLUM_PCMCIA_IOWINADDRCTRL_AREA2) {
972 1.1 uch printf("I/O Area 2\n");
973 1.1 uch } else {
974 1.1 uch printf("I/O Area 1\n");
975 1.1 uch }
976 1.1 uch }
977 1.1 uch
978 1.4 uch static void
979 1.4 uch plumpcmcia_dump(struct plumpcmcia_softc *sc)
980 1.1 uch {
981 1.1 uch bus_space_tag_t regt = sc->sc_regt;
982 1.1 uch bus_space_handle_t regh = sc->sc_regh;
983 1.1 uch plumreg_t reg;
984 1.1 uch
985 1.1 uch int i, j;
986 1.1 uch
987 1.1 uch __memareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_MEMWIN0CTRL));
988 1.1 uch __memareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_MEMWIN1CTRL));
989 1.1 uch __memareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_MEMWIN2CTRL));
990 1.1 uch __memareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_MEMWIN3CTRL));
991 1.1 uch __memareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_MEMWIN4CTRL));
992 1.1 uch
993 1.1 uch __ioareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_IOWIN0ADDRCTRL));
994 1.1 uch __ioareadump(plum_conf_read(regt, regh, PLUM_PCMCIA_IOWIN1ADDRCTRL));
995 1.1 uch
996 1.1 uch for (j = 0; j < 2; j++) {
997 1.1 uch printf("[slot %d]\n", j);
998 1.1 uch for (i = 0; i < 0x120; i += 4) {
999 1.1 uch reg = plum_conf_read(sc->sc_regt, sc->sc_regh, i + 0x800 * j);
1000 1.1 uch printf("%03x %08x", i, reg);
1001 1.1 uch bitdisp(reg);
1002 1.1 uch }
1003 1.1 uch }
1004 1.1 uch printf("\n");
1005 1.1 uch }
1006