plumpcmciareg.h revision 1.4
1 /* $NetBSD: plumpcmciareg.h,v 1.4 2001/09/15 12:47:07 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* (CS3) */ 40 #define PLUM_PCMCIA_REGBASE 0x5000 41 #define PLUM_PCMCIA_REGSIZE 0x1000 42 43 /* (MCS0) */ 44 /* 1MByte */ 45 #define PLUM_PCMCIA_IOBASE1 0x00600000 46 #define PLUM_PCMCIA_IOSIZE1 0x00100000 47 /* 1MByte */ 48 #define PLUM_PCMCIA_IOBASE2 0x00700000 49 #define PLUM_PCMCIA_IOSIZE2 0x00100000 50 /* 8Mbyte */ 51 #define PLUM_PCMCIA_MEMBASE1 0x00800000 52 #define PLUM_PCMCIA_MEMSIZE1 0x00800000 53 /* 16MByte */ 54 #define PLUM_PCMCIA_MEMBASE2 0x01000000 55 #define PLUM_PCMCIA_MEMSIZE2 0x01000000 56 /* 32MByte */ 57 #define PLUM_PCMCIA_MEMBASE3 0x02000000 58 #define PLUM_PCMCIA_MEMSIZE3 0x02000000 59 /* (MCS1) */ 60 /* 64MByte */ 61 #define PLUM_PCMCIA_MEMBASE4 0x04000000 62 #define PLUM_PCMCIA_MEMSIZE4 0x04000000 63 64 /* 65 * # of slots 66 */ 67 #define PLUMPCMCIA_NSLOTS 2 68 /* 69 * Control registers. 70 */ 71 #define PLUM_PCMCIA_REGSPACE_SLOT0 0 72 #define PLUM_PCMCIA_REGSPACE_SLOT1 0x800 73 #define PLUM_PCMCIA_REGSPACE_SIZE 0x800 74 75 #define PLUM_PCMCIA_IDENT 0x000 76 #define PLUM_PCMCIA_STATUS 0x004 77 #define PLUM_PCMCIA_STATUS_BVD1 0x01 78 #define PLUM_PCMCIA_STATUS_BVD2 0x02 79 #define PLUM_PCMCIA_STATUS_CD1 0x04 80 #define PLUM_PCMCIA_STATUS_CD2 0x08 81 #define PLUM_PCMCIA_STATUS_WRITEPROTECT 0x10 82 /* really READY/!BUSY */ 83 #define PLUM_PCMCIA_STATUS_READY 0x20 84 #define PLUM_PCMCIA_STATUS_PWROK 0x40 85 86 #define PLUM_PCMCIA_PWRCTRL 0x008 87 /* output enable */ 88 #define PLUM_PCMCIA_PWRCTRL_OE 0x80 89 #define PLUM_PCMCIA_PWRCTRL_DISABLE_RESETDRV 0x40 90 #define PLUM_PCMCIA_PWRCTRL_AUTOSWITCH_ENABLE 0x20 91 #define PLUM_PCMCIA_PWRCTRL_PWR_ENABLE 0x10 92 #define PLUM_PCMCIA_PWRCTRL_VCC_CTRLBIT1 0x08 93 #define PLUM_PCMCIA_PWRCTRL_VCC_CTRLBIT0 0x04 94 #define PLUM_PCMCIA_PWRCTRL_VPP1_CTRLBIT1 0x02 95 #define PLUM_PCMCIA_PWRCTRL_VPP1_CTRLBIT0 0x01 96 97 #define PLUM_PCMCIA_GENCTRL 0x00c 98 /* active low (zero) */ 99 #define PLUM_PCMCIA_GENCTRL_RESET 0x40 100 #define PLUM_PCMCIA_GENCTRL_CARDTYPE_MASK 0x20 101 #define PLUM_PCMCIA_GENCTRL_CARDTYPE_IO 0x20 102 #define PLUM_PCMCIA_GENCTRL_CARDTYPE_MEM 0x00 103 104 #define PLUM_PCMCIA_CSCINT_STAT 0x010 105 #define PLUM_PCMCIA_CSCINT 0x014 106 #define PLUM_PCMCIA_CSCINT_BATTERY_DEAD 0x01 107 #define PLUM_PCMCIA_CSCINT_BATTERY_WARNING 0x02 108 #define PLUM_PCMCIA_CSCINT_READY 0x04 109 #define PLUM_PCMCIA_CSCINT_CARD_DETECT 0x08 110 111 #define PLUM_PCMCIA_WINEN 0x018 112 #define PLUM_PCMCIA_WINEN_IO1 0x00000080 113 #define PLUM_PCMCIA_WINEN_IO0 0x00000040 114 #define PLUM_PCMCIA_WINEN_MEM4 0x00000010 115 #define PLUM_PCMCIA_WINEN_MEM3 0x00000008 116 #define PLUM_PCMCIA_WINEN_MEM2 0x00000004 117 #define PLUM_PCMCIA_WINEN_MEM1 0x00000002 118 #define PLUM_PCMCIA_WINEN_MEM0 0x00000001 119 #define PLUM_PCMCIA_WINEN_MEM(x) (1 << (x)) 120 121 #define PLUM_PCMCIA_MEM_WINS 5 122 #define PLUM_PCMCIA_MEM_SHIFT 12 123 #define PLUM_PCMCIA_MEM_PAGESIZE (1<<PLUM_PCMCIA_MEM_SHIFT) 124 125 #define PLUM_PCMCIA_IO_WINS 2 126 127 #define PLUM_PCMCIA_IOWINCTRL 0x01c 128 #define PLUM_PCMCIA_IOWINCTRL_WINMASK 0x0000000f 129 #define PLUM_PCMCIA_IOWINCTRL_WIN0SHIFT 0 130 #define PLUM_PCMCIA_IOWINCTRL_WIN1SHIFT 4 131 #define PLUM_PCMCIA_IOWINCTRL_DATASIZE16 0x00000001 132 #define PLUM_PCMCIA_IOWINCTRL_IOCS16SRC 0x00000002 133 #define PLUM_PCMCIA_IOWINCTRL_ZEROWAIT 0x00000004 134 #define PLUM_PCMCIA_IOWINCTRL_WAITSTATE 0x00000008 135 136 #define PLUM_PCMCIA_IOWIN0STARTADDR 0x020 137 #define PLUM_PCMCIA_IOWIN1STARTADDR 0x030 138 #define PLUM_PCMCIA_IOWINSTARTADDR(x) \ 139 ((x) * 0x10 + PLUM_PCMCIA_IOWIN0STARTADDR) 140 141 #define PLUM_PCMCIA_IOWIN0STOPADDR 0x024 142 #define PLUM_PCMCIA_IOWIN1STOPADDR 0x034 143 #define PLUM_PCMCIA_IOWINSTOPADDR(x) \ 144 ((x) * 0x10 + PLUM_PCMCIA_IOWIN0STOPADDR) 145 146 #define PLUM_PCMCIA_IOWIN0ADDRCTRL 0x028 147 #define PLUM_PCMCIA_IOWIN1ADDRCTRL 0x038 148 #define PLUM_PCMCIA_IOWINADDRCTRL(x) \ 149 ((x) * 0x10 + PLUM_PCMCIA_IOWIN0ADDRCTRL) 150 151 #define PLUM_PCMCIA_IOWINADDRCTRL_AREA1 0x00000000 152 #define PLUM_PCMCIA_IOWINADDRCTRL_AREA2 0x00000001 153 154 #define PLUM_PCMCIA_MEMWIN0STARTADDR 0x040 155 #define PLUM_PCMCIA_MEMWIN1STARTADDR 0x060 156 #define PLUM_PCMCIA_MEMWIN2STARTADDR 0x080 157 #define PLUM_PCMCIA_MEMWIN3STARTADDR 0x0a0 158 #define PLUM_PCMCIA_MEMWIN4STARTADDR 0x0c0 159 #define PLUM_PCMCIA_MEMWINSTARTADDR(x) \ 160 ((x) * 0x20 + PLUM_PCMCIA_MEMWIN0STARTADDR) 161 162 #define PLUM_PCMCIA_MEMWIN0STOPADDR 0x044 163 #define PLUM_PCMCIA_MEMWIN1STOPADDR 0x064 164 #define PLUM_PCMCIA_MEMWIN2STOPADDR 0x084 165 #define PLUM_PCMCIA_MEMWIN3STOPADDR 0x0a4 166 #define PLUM_PCMCIA_MEMWIN4STOPADDR 0x0c4 167 #define PLUM_PCMCIA_MEMWINSTOPADDR(x) \ 168 ((x) * 0x20 + PLUM_PCMCIA_MEMWIN0STOPADDR) 169 170 #define PLUM_PCMCIA_MEMWIN0OFSADDR 0x048 171 #define PLUM_PCMCIA_MEMWIN1OFSADDR 0x068 172 #define PLUM_PCMCIA_MEMWIN2OFSADDR 0x088 173 #define PLUM_PCMCIA_MEMWIN3OFSADDR 0x0a8 174 #define PLUM_PCMCIA_MEMWIN4OFSADDR 0x0c8 175 #define PLUM_PCMCIA_MEMWINOFSADDR(x) \ 176 ((x) * 0x20 + PLUM_PCMCIA_MEMWIN0OFSADDR) 177 178 #define PLUM_PCMCIA_MEMWIN0CTRL 0x04c 179 #define PLUM_PCMCIA_MEMWIN1CTRL 0x06c 180 #define PLUM_PCMCIA_MEMWIN2CTRL 0x08c 181 #define PLUM_PCMCIA_MEMWIN3CTRL 0x0ac 182 #define PLUM_PCMCIA_MEMWIN4CTRL 0x0cc 183 #define PLUM_PCMCIA_MEMWINCTRL(x) \ 184 ((x) * 0x20 + PLUM_PCMCIA_MEMWIN0CTRL) 185 186 #define PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT 24 187 #define PLUM_PCMCIA_MEMWINCTRL_MAP_MASK 0x3 188 #define PLUM_PCMCIA_MEMWINCTRL_MAP(cr) \ 189 (((cr) >> PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT) & \ 190 PLUM_PCMCIA_MEMWINCTRL_MAP_MASK) 191 #define PLUM_PCMCIA_MEMWINCTRL_MAP_SET(cr, val) \ 192 ((cr) | (((val) << PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT) & \ 193 (PLUM_PCMCIA_MEMWINCTRL_MAP_MASK << PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT))) 194 #define PLUM_PCMCIA_MEMWINCTRL_MAP_CLEAR(cr) \ 195 ((cr) &= ~(PLUM_PCMCIA_MEMWINCTRL_MAP_MASK << PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT)) 196 #define PLUM_PCMCIA_MEMWINCTRL_MAP_AREA1 0x0 197 #define PLUM_PCMCIA_MEMWINCTRL_MAP_AREA2 0x1 198 #define PLUM_PCMCIA_MEMWINCTRL_MAP_AREA3 0x2 199 #define PLUM_PCMCIA_MEMWINCTRL_MAP_AREA4 0x3 200 201 #define PLUM_PCMCIA_MEMWINCTRL_WRPROTECT 0x00800000 202 #define PLUM_PCMCIA_MEMWINCTRL_REGACTIVE 0x00400000 203 #define PLUM_PCMCIA_MEMWINCTRL_DATASIZE16 0x00000080 204 #define PLUM_PCMCIA_MEMWINCTRL_ZERO_WS 0x00000040 205 206 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT 14 207 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_MASK 0x3 208 #define PLUM_PCMCIA_MEMWINCTRL_TIMING(cr) \ 209 (((cr) >> PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT) & \ 210 PLUM_PCMCIA_MEMWINCTRL_TIMING_MASK) 211 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_SET(cr, val) \ 212 ((cr) | (((val) << PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT) & \ 213 (PLUM_PCMCIA_MEMWINCTRL_TIMING_MASK << \ 214 PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT))) 215 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_STD 0x0 216 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_1WAIT 0x1 217 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_2WAIT 0x2 218 #define PLUM_PCMCIA_MEMWINCTRL_TIMING_3WAIT 0x3 219 220 #define PLUM_PCMCIA_MEMWINCTRL_DATASIZE_16BIT 0x00000080 /* else 8bit */ 221 #define PLUM_PCMCIA_MEMWINCTRL_ZEROWS 0x00000040 222 223 #define PLUM_PCMCIA_GENCTRL2 0x058 224 #define PLUM_PCMCIA_GENCTRL2_VCC5V 0x000000c0 225 #define PLUM_PCMCIA_GENCTRL2_VCC3V 0x00000080 226 227 #define PLUM_PCMCIA_GLOBALCTRL 0x078 228 #define PLUM_PCMCIA_GLOBALCTRL_EXPLICIT_WB_CSC_INT 0x04 229 230 #define PLUM_PCMCIA_TIMING 0x0ec 231 232 #define PLUM_PCMCIA_FUNCCTRL 0x0f8 233 #define PLUM_PCMCIA_FUNCCTRL_3VSUPPORT 0x00000001 234 #define PLUM_PCMCIA_FUNCCTRL_VSSEN 0x00000002 235 236 #define PLUM_PCMCIA_SPECIALMODE 0x0fc 237 238 #define PLUM_PCMCIA_SLOTCTRL 0x100 239 #define PLUM_PCMCIA_SLOTCTRL_ENABLE 0x00000080 240 241 #define PLUM_PCMCIA_BUFOFF 0x104 242 #define PLUM_PCMCIA_CARDDETECTMODE 0x108 243 #define PLUM_PCMCIA_CARDPWRCTRL 0x10c 244 #define PLUM_PCMCIA_CARDPWRCTRL_OFF 1 245 #define PLUM_PCMCIA_CARDPWRCTRL_ON 0 246
Indexes created Tue Sep 30 11:09:46 GMT 2025