plumpower.c revision 1.10 1 1.10 lukem /* $NetBSD: plumpower.c,v 1.10 2003/07/15 02:29:30 lukem Exp $ */
2 1.1 uch
3 1.5 uch /*-
4 1.5 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.5 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.5 uch * by UCHIYAMA Yasushi.
9 1.5 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.5 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.5 uch * notice, this list of conditions and the following disclaimer in the
17 1.5 uch * documentation and/or other materials provided with the distribution.
18 1.5 uch * 3. All advertising materials mentioning features or use of this software
19 1.5 uch * must display the following acknowledgement:
20 1.5 uch * This product includes software developed by the NetBSD
21 1.5 uch * Foundation, Inc. and its contributors.
22 1.5 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.5 uch * contributors may be used to endorse or promote products derived
24 1.5 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.5 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.5 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.5 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.5 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.5 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.5 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.5 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.5 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.5 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.5 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.5 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.10 lukem
39 1.10 lukem #include <sys/cdefs.h>
40 1.10 lukem __KERNEL_RCSID(0, "$NetBSD: plumpower.c,v 1.10 2003/07/15 02:29:30 lukem Exp $");
41 1.5 uch
42 1.3 uch #undef PLUMPOWERDEBUG
43 1.1 uch
44 1.1 uch #include <sys/param.h>
45 1.1 uch #include <sys/systm.h>
46 1.1 uch #include <sys/device.h>
47 1.1 uch #include <sys/malloc.h>
48 1.1 uch
49 1.1 uch #include <machine/bus.h>
50 1.1 uch #include <machine/intr.h>
51 1.1 uch
52 1.1 uch #include <hpcmips/tx/tx39var.h>
53 1.1 uch #include <hpcmips/dev/plumvar.h>
54 1.1 uch #include <hpcmips/dev/plumpowervar.h>
55 1.1 uch #include <hpcmips/dev/plumpowerreg.h>
56 1.1 uch
57 1.3 uch #ifdef PLUMPOWERDEBUG
58 1.3 uch int plumpower_debug = 1;
59 1.3 uch #define DPRINTF(arg) if (plumpower_debug) printf arg;
60 1.3 uch #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
61 1.3 uch #else
62 1.3 uch #define DPRINTF(arg)
63 1.3 uch #define DPRINTFN(n, arg)
64 1.3 uch #endif
65 1.3 uch
66 1.5 uch int plumpower_match(struct device *, struct cfdata *, void *);
67 1.5 uch void plumpower_attach(struct device *, struct device *, void *);
68 1.1 uch
69 1.1 uch struct plumpower_softc {
70 1.1 uch struct device sc_dev;
71 1.1 uch plum_chipset_tag_t sc_pc;
72 1.1 uch bus_space_tag_t sc_regt;
73 1.1 uch bus_space_handle_t sc_regh;
74 1.1 uch };
75 1.1 uch
76 1.9 thorpej CFATTACH_DECL(plumpower, sizeof(struct plumpower_softc),
77 1.9 thorpej plumpower_match, plumpower_attach, NULL, NULL);
78 1.1 uch
79 1.5 uch #ifdef PLUMPOWERDEBUG
80 1.5 uch static void plumpower_dump(struct plumpower_softc *);
81 1.5 uch #endif
82 1.1 uch
83 1.1 uch int
84 1.5 uch plumpower_match(struct device *parent, struct cfdata *cf, void *aux)
85 1.1 uch {
86 1.1 uch return 2; /* 1st attach group */
87 1.1 uch }
88 1.1 uch
89 1.1 uch void
90 1.5 uch plumpower_attach(struct device *parent, struct device *self, void *aux)
91 1.1 uch {
92 1.1 uch struct plum_attach_args *pa = aux;
93 1.1 uch struct plumpower_softc *sc = (void*)self;
94 1.1 uch
95 1.1 uch printf("\n");
96 1.1 uch sc->sc_pc = pa->pa_pc;
97 1.1 uch sc->sc_regt = pa->pa_regt;
98 1.1 uch
99 1.1 uch if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
100 1.6 uch PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
101 1.1 uch printf(": register map failed\n");
102 1.1 uch return;
103 1.1 uch }
104 1.1 uch plum_conf_register_power(sc->sc_pc, (void*)sc);
105 1.3 uch #ifdef PLUMPOWERDEBUG
106 1.1 uch plumpower_dump(sc);
107 1.3 uch #endif
108 1.2 uch /* disable all power/clock */
109 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
110 1.6 uch PLUM_POWER_PWRCONT_REG, 0);
111 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
112 1.6 uch PLUM_POWER_CLKCONT_REG, 0);
113 1.2 uch
114 1.2 uch /* enable MCS interface from TX3922 */
115 1.1 uch plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
116 1.6 uch PLUM_POWER_INPENA);
117 1.1 uch }
118 1.1 uch
119 1.1 uch void
120 1.5 uch plum_power_ioreset(plum_chipset_tag_t pc)
121 1.1 uch {
122 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
123 1.1 uch bus_space_tag_t regt = sc->sc_regt;
124 1.1 uch bus_space_handle_t regh = sc->sc_regh;
125 1.1 uch
126 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
127 1.6 uch PLUM_POWER_RESETC_IO5CL1 |
128 1.6 uch PLUM_POWER_RESETC_IO5CL1);
129 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
130 1.1 uch }
131 1.1 uch
132 1.1 uch void*
133 1.5 uch plum_power_establish(plum_chipset_tag_t pc, int src)
134 1.1 uch {
135 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
136 1.1 uch bus_space_tag_t regt = sc->sc_regt;
137 1.1 uch bus_space_handle_t regh = sc->sc_regh;
138 1.1 uch plumreg_t pwrreg, clkreg;
139 1.1 uch
140 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
141 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
142 1.1 uch
143 1.1 uch switch(src) {
144 1.1 uch default:
145 1.1 uch panic("plum_power_establish: unknown power source");
146 1.1 uch case PLUM_PWR_LCD:
147 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
148 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
149 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
150 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
151 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
152 1.1 uch break;
153 1.1 uch case PLUM_PWR_BKL:
154 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
155 1.1 uch break;
156 1.1 uch case PLUM_PWR_IO5:
157 1.2 uch /* reset I/O bus (High/Low) */
158 1.2 uch plum_power_ioreset(pc);
159 1.2 uch
160 1.2 uch /* supply power */
161 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
162 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
163 1.2 uch
164 1.2 uch /* output enable & supply clock */
165 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
166 1.1 uch clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
167 1.1 uch break;
168 1.1 uch case PLUM_PWR_EXTPW0:
169 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
170 1.1 uch break;
171 1.1 uch case PLUM_PWR_EXTPW1:
172 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
173 1.1 uch break;
174 1.1 uch case PLUM_PWR_EXTPW2:
175 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
176 1.1 uch break;
177 1.1 uch case PLUM_PWR_USB:
178 1.2 uch /* output enable */
179 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_USBEN;
180 1.2 uch /* supply clock to the USB host controller */
181 1.2 uch clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
182 1.4 uch /*
183 1.4 uch * clock supply is adaptively controlled by hardware
184 1.4 uch * (recommended)
185 1.4 uch */
186 1.2 uch clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
187 1.1 uch break;
188 1.1 uch case PLUM_PWR_SM:
189 1.1 uch clkreg |= PLUM_POWER_CLKCONT_SMCLK;
190 1.1 uch break;
191 1.1 uch case PLUM_PWR_PCC1:
192 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
193 1.1 uch break;
194 1.1 uch case PLUM_PWR_PCC2:
195 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
196 1.1 uch break;
197 1.1 uch }
198 1.1 uch
199 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
200 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
201 1.3 uch #ifdef PLUMPOWERDEBUG
202 1.2 uch plumpower_dump(sc);
203 1.3 uch #endif
204 1.1 uch return (void*)src;
205 1.1 uch }
206 1.1 uch
207 1.1 uch void
208 1.5 uch plum_power_disestablish(plum_chipset_tag_t pc, int ph)
209 1.1 uch {
210 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
211 1.1 uch bus_space_tag_t regt = sc->sc_regt;
212 1.1 uch bus_space_handle_t regh = sc->sc_regh;
213 1.1 uch int src = (int)ph;
214 1.1 uch plumreg_t pwrreg, clkreg;
215 1.1 uch
216 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
217 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
218 1.1 uch
219 1.1 uch switch(src) {
220 1.1 uch default:
221 1.1 uch panic("plum_power_disestablish: unknown power source");
222 1.1 uch case PLUM_PWR_LCD:
223 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE;
224 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
225 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP;
226 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
227 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR;
228 1.1 uch break;
229 1.1 uch case PLUM_PWR_BKL:
230 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
231 1.1 uch break;
232 1.1 uch case PLUM_PWR_IO5:
233 1.1 uch pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
234 1.6 uch PLUM_POWER_PWRCONT_IO5OE);
235 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
236 1.1 uch break;
237 1.1 uch case PLUM_PWR_EXTPW0:
238 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
239 1.1 uch break;
240 1.1 uch case PLUM_PWR_EXTPW1:
241 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
242 1.1 uch break;
243 1.1 uch case PLUM_PWR_EXTPW2:
244 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
245 1.1 uch break;
246 1.1 uch case PLUM_PWR_USB:
247 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
248 1.1 uch clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
249 1.6 uch PLUM_POWER_CLKCONT_USBCLK2);
250 1.1 uch break;
251 1.1 uch case PLUM_PWR_SM:
252 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
253 1.1 uch break;
254 1.1 uch case PLUM_PWR_PCC1:
255 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
256 1.1 uch break;
257 1.1 uch case PLUM_PWR_PCC2:
258 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
259 1.1 uch break;
260 1.1 uch }
261 1.1 uch
262 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
263 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
264 1.3 uch #ifdef PLUMPOWERDEBUG
265 1.2 uch plumpower_dump(sc);
266 1.3 uch #endif
267 1.1 uch }
268 1.1 uch
269 1.5 uch #ifdef PLUMPOWERDEBUG
270 1.7 uch #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m)
271 1.7 uch #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m)
272 1.5 uch static void
273 1.5 uch plumpower_dump(struct plumpower_softc *sc)
274 1.1 uch {
275 1.1 uch bus_space_tag_t regt = sc->sc_regt;
276 1.1 uch bus_space_handle_t regh = sc->sc_regh;
277 1.1 uch plumreg_t reg;
278 1.1 uch
279 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
280 1.1 uch printf(" power:");
281 1.1 uch ISPOWERSUPPLY(reg, USBEN);
282 1.1 uch ISPOWERSUPPLY(reg, IO5OE);
283 1.1 uch ISPOWERSUPPLY(reg, LCDOE);
284 1.1 uch ISPOWERSUPPLY(reg, EXTPW2);
285 1.1 uch ISPOWERSUPPLY(reg, EXTPW1);
286 1.1 uch ISPOWERSUPPLY(reg, EXTPW0);
287 1.1 uch ISPOWERSUPPLY(reg, IO5PWR);
288 1.1 uch ISPOWERSUPPLY(reg, BKLIGHT);
289 1.1 uch ISPOWERSUPPLY(reg, LCDPWR);
290 1.1 uch ISPOWERSUPPLY(reg, LCDDSP);
291 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
292 1.1 uch printf("\n clock:");
293 1.1 uch ISCLOCKSUPPLY(reg, USBCLK2);
294 1.1 uch ISCLOCKSUPPLY(reg, USBCLK1);
295 1.1 uch ISCLOCKSUPPLY(reg, IO5CLK);
296 1.1 uch ISCLOCKSUPPLY(reg, SMCLK);
297 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK2);
298 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK1);
299 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
300 1.1 uch printf("\n MCS interface %sebled",
301 1.6 uch reg & PLUM_POWER_INPENA ? "en" : "dis");
302 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
303 1.1 uch printf("\n IO5 reset:%s %s",
304 1.6 uch reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
305 1.6 uch reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
306 1.1 uch printf("\n");
307 1.1 uch }
308 1.5 uch #endif /* PLUMPOWERDEBUG */
309 1.1 uch
310