plumpower.c revision 1.13 1 1.13 chs /* $NetBSD: plumpower.c,v 1.13 2012/10/27 17:17:53 chs Exp $ */
2 1.1 uch
3 1.5 uch /*-
4 1.5 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.5 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.5 uch * by UCHIYAMA Yasushi.
9 1.5 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.5 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.5 uch * notice, this list of conditions and the following disclaimer in the
17 1.5 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.5 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.5 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.5 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.5 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.5 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.5 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.5 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.5 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.5 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.5 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.5 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.10 lukem
32 1.10 lukem #include <sys/cdefs.h>
33 1.13 chs __KERNEL_RCSID(0, "$NetBSD: plumpower.c,v 1.13 2012/10/27 17:17:53 chs Exp $");
34 1.5 uch
35 1.3 uch #undef PLUMPOWERDEBUG
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.1 uch #include <sys/device.h>
40 1.1 uch #include <sys/malloc.h>
41 1.1 uch
42 1.1 uch #include <machine/bus.h>
43 1.1 uch #include <machine/intr.h>
44 1.1 uch
45 1.1 uch #include <hpcmips/tx/tx39var.h>
46 1.1 uch #include <hpcmips/dev/plumvar.h>
47 1.1 uch #include <hpcmips/dev/plumpowervar.h>
48 1.1 uch #include <hpcmips/dev/plumpowerreg.h>
49 1.1 uch
50 1.3 uch #ifdef PLUMPOWERDEBUG
51 1.3 uch int plumpower_debug = 1;
52 1.3 uch #define DPRINTF(arg) if (plumpower_debug) printf arg;
53 1.3 uch #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
54 1.3 uch #else
55 1.3 uch #define DPRINTF(arg)
56 1.3 uch #define DPRINTFN(n, arg)
57 1.3 uch #endif
58 1.3 uch
59 1.13 chs int plumpower_match(device_t, cfdata_t, void *);
60 1.13 chs void plumpower_attach(device_t, device_t, void *);
61 1.1 uch
62 1.1 uch struct plumpower_softc {
63 1.1 uch plum_chipset_tag_t sc_pc;
64 1.1 uch bus_space_tag_t sc_regt;
65 1.1 uch bus_space_handle_t sc_regh;
66 1.1 uch };
67 1.1 uch
68 1.13 chs CFATTACH_DECL_NEW(plumpower, sizeof(struct plumpower_softc),
69 1.9 thorpej plumpower_match, plumpower_attach, NULL, NULL);
70 1.1 uch
71 1.5 uch #ifdef PLUMPOWERDEBUG
72 1.5 uch static void plumpower_dump(struct plumpower_softc *);
73 1.5 uch #endif
74 1.1 uch
75 1.1 uch int
76 1.13 chs plumpower_match(device_t parent, cfdata_t cf, void *aux)
77 1.1 uch {
78 1.1 uch return 2; /* 1st attach group */
79 1.1 uch }
80 1.1 uch
81 1.1 uch void
82 1.13 chs plumpower_attach(device_t parent, device_t self, void *aux)
83 1.1 uch {
84 1.1 uch struct plum_attach_args *pa = aux;
85 1.13 chs struct plumpower_softc *sc = device_private(self);
86 1.1 uch
87 1.1 uch printf("\n");
88 1.1 uch sc->sc_pc = pa->pa_pc;
89 1.1 uch sc->sc_regt = pa->pa_regt;
90 1.1 uch
91 1.1 uch if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
92 1.6 uch PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
93 1.1 uch printf(": register map failed\n");
94 1.1 uch return;
95 1.1 uch }
96 1.1 uch plum_conf_register_power(sc->sc_pc, (void*)sc);
97 1.3 uch #ifdef PLUMPOWERDEBUG
98 1.1 uch plumpower_dump(sc);
99 1.3 uch #endif
100 1.2 uch /* disable all power/clock */
101 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
102 1.6 uch PLUM_POWER_PWRCONT_REG, 0);
103 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
104 1.6 uch PLUM_POWER_CLKCONT_REG, 0);
105 1.2 uch
106 1.2 uch /* enable MCS interface from TX3922 */
107 1.1 uch plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
108 1.6 uch PLUM_POWER_INPENA);
109 1.1 uch }
110 1.1 uch
111 1.1 uch void
112 1.5 uch plum_power_ioreset(plum_chipset_tag_t pc)
113 1.1 uch {
114 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
115 1.1 uch bus_space_tag_t regt = sc->sc_regt;
116 1.1 uch bus_space_handle_t regh = sc->sc_regh;
117 1.1 uch
118 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
119 1.6 uch PLUM_POWER_RESETC_IO5CL1 |
120 1.6 uch PLUM_POWER_RESETC_IO5CL1);
121 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
122 1.1 uch }
123 1.1 uch
124 1.1 uch void*
125 1.5 uch plum_power_establish(plum_chipset_tag_t pc, int src)
126 1.1 uch {
127 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
128 1.1 uch bus_space_tag_t regt = sc->sc_regt;
129 1.1 uch bus_space_handle_t regh = sc->sc_regh;
130 1.1 uch plumreg_t pwrreg, clkreg;
131 1.1 uch
132 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
133 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
134 1.1 uch
135 1.1 uch switch(src) {
136 1.1 uch default:
137 1.1 uch panic("plum_power_establish: unknown power source");
138 1.1 uch case PLUM_PWR_LCD:
139 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
140 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
141 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
142 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
143 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
144 1.1 uch break;
145 1.1 uch case PLUM_PWR_BKL:
146 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
147 1.1 uch break;
148 1.1 uch case PLUM_PWR_IO5:
149 1.2 uch /* reset I/O bus (High/Low) */
150 1.2 uch plum_power_ioreset(pc);
151 1.2 uch
152 1.2 uch /* supply power */
153 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
154 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
155 1.2 uch
156 1.2 uch /* output enable & supply clock */
157 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
158 1.1 uch clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
159 1.1 uch break;
160 1.1 uch case PLUM_PWR_EXTPW0:
161 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
162 1.1 uch break;
163 1.1 uch case PLUM_PWR_EXTPW1:
164 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
165 1.1 uch break;
166 1.1 uch case PLUM_PWR_EXTPW2:
167 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
168 1.1 uch break;
169 1.1 uch case PLUM_PWR_USB:
170 1.2 uch /* output enable */
171 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_USBEN;
172 1.2 uch /* supply clock to the USB host controller */
173 1.2 uch clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
174 1.4 uch /*
175 1.4 uch * clock supply is adaptively controlled by hardware
176 1.4 uch * (recommended)
177 1.4 uch */
178 1.2 uch clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
179 1.1 uch break;
180 1.1 uch case PLUM_PWR_SM:
181 1.1 uch clkreg |= PLUM_POWER_CLKCONT_SMCLK;
182 1.1 uch break;
183 1.1 uch case PLUM_PWR_PCC1:
184 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
185 1.1 uch break;
186 1.1 uch case PLUM_PWR_PCC2:
187 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
188 1.1 uch break;
189 1.1 uch }
190 1.1 uch
191 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
192 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
193 1.3 uch #ifdef PLUMPOWERDEBUG
194 1.2 uch plumpower_dump(sc);
195 1.3 uch #endif
196 1.1 uch return (void*)src;
197 1.1 uch }
198 1.1 uch
199 1.1 uch void
200 1.5 uch plum_power_disestablish(plum_chipset_tag_t pc, int ph)
201 1.1 uch {
202 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
203 1.1 uch bus_space_tag_t regt = sc->sc_regt;
204 1.1 uch bus_space_handle_t regh = sc->sc_regh;
205 1.1 uch int src = (int)ph;
206 1.1 uch plumreg_t pwrreg, clkreg;
207 1.1 uch
208 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
209 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
210 1.1 uch
211 1.1 uch switch(src) {
212 1.1 uch default:
213 1.1 uch panic("plum_power_disestablish: unknown power source");
214 1.1 uch case PLUM_PWR_LCD:
215 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE;
216 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
217 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP;
218 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
219 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR;
220 1.1 uch break;
221 1.1 uch case PLUM_PWR_BKL:
222 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
223 1.1 uch break;
224 1.1 uch case PLUM_PWR_IO5:
225 1.1 uch pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
226 1.6 uch PLUM_POWER_PWRCONT_IO5OE);
227 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
228 1.1 uch break;
229 1.1 uch case PLUM_PWR_EXTPW0:
230 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
231 1.1 uch break;
232 1.1 uch case PLUM_PWR_EXTPW1:
233 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
234 1.1 uch break;
235 1.1 uch case PLUM_PWR_EXTPW2:
236 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
237 1.1 uch break;
238 1.1 uch case PLUM_PWR_USB:
239 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
240 1.1 uch clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
241 1.6 uch PLUM_POWER_CLKCONT_USBCLK2);
242 1.1 uch break;
243 1.1 uch case PLUM_PWR_SM:
244 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
245 1.1 uch break;
246 1.1 uch case PLUM_PWR_PCC1:
247 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
248 1.1 uch break;
249 1.1 uch case PLUM_PWR_PCC2:
250 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
251 1.1 uch break;
252 1.1 uch }
253 1.1 uch
254 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
255 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
256 1.3 uch #ifdef PLUMPOWERDEBUG
257 1.2 uch plumpower_dump(sc);
258 1.3 uch #endif
259 1.1 uch }
260 1.1 uch
261 1.5 uch #ifdef PLUMPOWERDEBUG
262 1.7 uch #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m)
263 1.7 uch #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m)
264 1.5 uch static void
265 1.5 uch plumpower_dump(struct plumpower_softc *sc)
266 1.1 uch {
267 1.1 uch bus_space_tag_t regt = sc->sc_regt;
268 1.1 uch bus_space_handle_t regh = sc->sc_regh;
269 1.1 uch plumreg_t reg;
270 1.1 uch
271 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
272 1.1 uch printf(" power:");
273 1.1 uch ISPOWERSUPPLY(reg, USBEN);
274 1.1 uch ISPOWERSUPPLY(reg, IO5OE);
275 1.1 uch ISPOWERSUPPLY(reg, LCDOE);
276 1.1 uch ISPOWERSUPPLY(reg, EXTPW2);
277 1.1 uch ISPOWERSUPPLY(reg, EXTPW1);
278 1.1 uch ISPOWERSUPPLY(reg, EXTPW0);
279 1.1 uch ISPOWERSUPPLY(reg, IO5PWR);
280 1.1 uch ISPOWERSUPPLY(reg, BKLIGHT);
281 1.1 uch ISPOWERSUPPLY(reg, LCDPWR);
282 1.1 uch ISPOWERSUPPLY(reg, LCDDSP);
283 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
284 1.1 uch printf("\n clock:");
285 1.1 uch ISCLOCKSUPPLY(reg, USBCLK2);
286 1.1 uch ISCLOCKSUPPLY(reg, USBCLK1);
287 1.1 uch ISCLOCKSUPPLY(reg, IO5CLK);
288 1.1 uch ISCLOCKSUPPLY(reg, SMCLK);
289 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK2);
290 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK1);
291 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
292 1.1 uch printf("\n MCS interface %sebled",
293 1.6 uch reg & PLUM_POWER_INPENA ? "en" : "dis");
294 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
295 1.1 uch printf("\n IO5 reset:%s %s",
296 1.6 uch reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
297 1.6 uch reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
298 1.1 uch printf("\n");
299 1.1 uch }
300 1.5 uch #endif /* PLUMPOWERDEBUG */
301 1.1 uch
302