plumpower.c revision 1.15 1 1.15 andvar /* $NetBSD: plumpower.c,v 1.15 2024/09/07 14:28:19 andvar Exp $ */
2 1.1 uch
3 1.5 uch /*-
4 1.5 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.5 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.5 uch * by UCHIYAMA Yasushi.
9 1.5 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.5 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.5 uch * notice, this list of conditions and the following disclaimer in the
17 1.5 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.5 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.5 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.5 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.5 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.5 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.5 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.5 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.5 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.5 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.5 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.5 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.10 lukem
32 1.10 lukem #include <sys/cdefs.h>
33 1.15 andvar __KERNEL_RCSID(0, "$NetBSD: plumpower.c,v 1.15 2024/09/07 14:28:19 andvar Exp $");
34 1.5 uch
35 1.3 uch #undef PLUMPOWERDEBUG
36 1.1 uch
37 1.1 uch #include <sys/param.h>
38 1.1 uch #include <sys/systm.h>
39 1.1 uch #include <sys/device.h>
40 1.1 uch
41 1.1 uch #include <machine/bus.h>
42 1.1 uch #include <machine/intr.h>
43 1.1 uch
44 1.1 uch #include <hpcmips/tx/tx39var.h>
45 1.1 uch #include <hpcmips/dev/plumvar.h>
46 1.1 uch #include <hpcmips/dev/plumpowervar.h>
47 1.1 uch #include <hpcmips/dev/plumpowerreg.h>
48 1.1 uch
49 1.3 uch #ifdef PLUMPOWERDEBUG
50 1.3 uch int plumpower_debug = 1;
51 1.3 uch #define DPRINTF(arg) if (plumpower_debug) printf arg;
52 1.3 uch #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
53 1.3 uch #else
54 1.3 uch #define DPRINTF(arg)
55 1.3 uch #define DPRINTFN(n, arg)
56 1.3 uch #endif
57 1.3 uch
58 1.13 chs int plumpower_match(device_t, cfdata_t, void *);
59 1.13 chs void plumpower_attach(device_t, device_t, void *);
60 1.1 uch
61 1.1 uch struct plumpower_softc {
62 1.1 uch plum_chipset_tag_t sc_pc;
63 1.1 uch bus_space_tag_t sc_regt;
64 1.1 uch bus_space_handle_t sc_regh;
65 1.1 uch };
66 1.1 uch
67 1.13 chs CFATTACH_DECL_NEW(plumpower, sizeof(struct plumpower_softc),
68 1.9 thorpej plumpower_match, plumpower_attach, NULL, NULL);
69 1.1 uch
70 1.5 uch #ifdef PLUMPOWERDEBUG
71 1.5 uch static void plumpower_dump(struct plumpower_softc *);
72 1.5 uch #endif
73 1.1 uch
74 1.1 uch int
75 1.13 chs plumpower_match(device_t parent, cfdata_t cf, void *aux)
76 1.1 uch {
77 1.1 uch return 2; /* 1st attach group */
78 1.1 uch }
79 1.1 uch
80 1.1 uch void
81 1.13 chs plumpower_attach(device_t parent, device_t self, void *aux)
82 1.1 uch {
83 1.1 uch struct plum_attach_args *pa = aux;
84 1.13 chs struct plumpower_softc *sc = device_private(self);
85 1.1 uch
86 1.1 uch printf("\n");
87 1.1 uch sc->sc_pc = pa->pa_pc;
88 1.1 uch sc->sc_regt = pa->pa_regt;
89 1.1 uch
90 1.1 uch if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
91 1.6 uch PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
92 1.1 uch printf(": register map failed\n");
93 1.1 uch return;
94 1.1 uch }
95 1.1 uch plum_conf_register_power(sc->sc_pc, (void*)sc);
96 1.3 uch #ifdef PLUMPOWERDEBUG
97 1.1 uch plumpower_dump(sc);
98 1.3 uch #endif
99 1.2 uch /* disable all power/clock */
100 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
101 1.6 uch PLUM_POWER_PWRCONT_REG, 0);
102 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
103 1.6 uch PLUM_POWER_CLKCONT_REG, 0);
104 1.2 uch
105 1.2 uch /* enable MCS interface from TX3922 */
106 1.1 uch plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
107 1.6 uch PLUM_POWER_INPENA);
108 1.1 uch }
109 1.1 uch
110 1.1 uch void
111 1.5 uch plum_power_ioreset(plum_chipset_tag_t pc)
112 1.1 uch {
113 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
114 1.1 uch bus_space_tag_t regt = sc->sc_regt;
115 1.1 uch bus_space_handle_t regh = sc->sc_regh;
116 1.1 uch
117 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
118 1.15 andvar PLUM_POWER_RESETC_IO5CL0 |
119 1.6 uch PLUM_POWER_RESETC_IO5CL1);
120 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
121 1.1 uch }
122 1.1 uch
123 1.1 uch void*
124 1.5 uch plum_power_establish(plum_chipset_tag_t pc, int src)
125 1.1 uch {
126 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
127 1.1 uch bus_space_tag_t regt = sc->sc_regt;
128 1.1 uch bus_space_handle_t regh = sc->sc_regh;
129 1.1 uch plumreg_t pwrreg, clkreg;
130 1.1 uch
131 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
132 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
133 1.1 uch
134 1.1 uch switch(src) {
135 1.1 uch default:
136 1.1 uch panic("plum_power_establish: unknown power source");
137 1.1 uch case PLUM_PWR_LCD:
138 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
139 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
140 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
141 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
142 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
143 1.1 uch break;
144 1.1 uch case PLUM_PWR_BKL:
145 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
146 1.1 uch break;
147 1.1 uch case PLUM_PWR_IO5:
148 1.2 uch /* reset I/O bus (High/Low) */
149 1.2 uch plum_power_ioreset(pc);
150 1.2 uch
151 1.2 uch /* supply power */
152 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
153 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
154 1.2 uch
155 1.2 uch /* output enable & supply clock */
156 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
157 1.1 uch clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
158 1.1 uch break;
159 1.1 uch case PLUM_PWR_EXTPW0:
160 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
161 1.1 uch break;
162 1.1 uch case PLUM_PWR_EXTPW1:
163 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
164 1.1 uch break;
165 1.1 uch case PLUM_PWR_EXTPW2:
166 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
167 1.1 uch break;
168 1.1 uch case PLUM_PWR_USB:
169 1.2 uch /* output enable */
170 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_USBEN;
171 1.2 uch /* supply clock to the USB host controller */
172 1.2 uch clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
173 1.4 uch /*
174 1.4 uch * clock supply is adaptively controlled by hardware
175 1.4 uch * (recommended)
176 1.4 uch */
177 1.2 uch clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
178 1.1 uch break;
179 1.1 uch case PLUM_PWR_SM:
180 1.1 uch clkreg |= PLUM_POWER_CLKCONT_SMCLK;
181 1.1 uch break;
182 1.1 uch case PLUM_PWR_PCC1:
183 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
184 1.1 uch break;
185 1.1 uch case PLUM_PWR_PCC2:
186 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
187 1.1 uch break;
188 1.1 uch }
189 1.1 uch
190 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
191 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
192 1.3 uch #ifdef PLUMPOWERDEBUG
193 1.2 uch plumpower_dump(sc);
194 1.3 uch #endif
195 1.1 uch return (void*)src;
196 1.1 uch }
197 1.1 uch
198 1.1 uch void
199 1.5 uch plum_power_disestablish(plum_chipset_tag_t pc, int ph)
200 1.1 uch {
201 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
202 1.1 uch bus_space_tag_t regt = sc->sc_regt;
203 1.1 uch bus_space_handle_t regh = sc->sc_regh;
204 1.1 uch int src = (int)ph;
205 1.1 uch plumreg_t pwrreg, clkreg;
206 1.1 uch
207 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
208 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
209 1.1 uch
210 1.1 uch switch(src) {
211 1.1 uch default:
212 1.1 uch panic("plum_power_disestablish: unknown power source");
213 1.1 uch case PLUM_PWR_LCD:
214 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE;
215 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
216 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP;
217 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
218 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR;
219 1.1 uch break;
220 1.1 uch case PLUM_PWR_BKL:
221 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
222 1.1 uch break;
223 1.1 uch case PLUM_PWR_IO5:
224 1.1 uch pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
225 1.6 uch PLUM_POWER_PWRCONT_IO5OE);
226 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
227 1.1 uch break;
228 1.1 uch case PLUM_PWR_EXTPW0:
229 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
230 1.1 uch break;
231 1.1 uch case PLUM_PWR_EXTPW1:
232 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
233 1.1 uch break;
234 1.1 uch case PLUM_PWR_EXTPW2:
235 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
236 1.1 uch break;
237 1.1 uch case PLUM_PWR_USB:
238 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
239 1.1 uch clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
240 1.6 uch PLUM_POWER_CLKCONT_USBCLK2);
241 1.1 uch break;
242 1.1 uch case PLUM_PWR_SM:
243 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
244 1.1 uch break;
245 1.1 uch case PLUM_PWR_PCC1:
246 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
247 1.1 uch break;
248 1.1 uch case PLUM_PWR_PCC2:
249 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
250 1.1 uch break;
251 1.1 uch }
252 1.1 uch
253 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
254 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
255 1.3 uch #ifdef PLUMPOWERDEBUG
256 1.2 uch plumpower_dump(sc);
257 1.3 uch #endif
258 1.1 uch }
259 1.1 uch
260 1.5 uch #ifdef PLUMPOWERDEBUG
261 1.7 uch #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m)
262 1.7 uch #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m)
263 1.5 uch static void
264 1.5 uch plumpower_dump(struct plumpower_softc *sc)
265 1.1 uch {
266 1.1 uch bus_space_tag_t regt = sc->sc_regt;
267 1.1 uch bus_space_handle_t regh = sc->sc_regh;
268 1.1 uch plumreg_t reg;
269 1.1 uch
270 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
271 1.1 uch printf(" power:");
272 1.1 uch ISPOWERSUPPLY(reg, USBEN);
273 1.1 uch ISPOWERSUPPLY(reg, IO5OE);
274 1.1 uch ISPOWERSUPPLY(reg, LCDOE);
275 1.1 uch ISPOWERSUPPLY(reg, EXTPW2);
276 1.1 uch ISPOWERSUPPLY(reg, EXTPW1);
277 1.1 uch ISPOWERSUPPLY(reg, EXTPW0);
278 1.1 uch ISPOWERSUPPLY(reg, IO5PWR);
279 1.1 uch ISPOWERSUPPLY(reg, BKLIGHT);
280 1.1 uch ISPOWERSUPPLY(reg, LCDPWR);
281 1.1 uch ISPOWERSUPPLY(reg, LCDDSP);
282 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
283 1.1 uch printf("\n clock:");
284 1.1 uch ISCLOCKSUPPLY(reg, USBCLK2);
285 1.1 uch ISCLOCKSUPPLY(reg, USBCLK1);
286 1.1 uch ISCLOCKSUPPLY(reg, IO5CLK);
287 1.1 uch ISCLOCKSUPPLY(reg, SMCLK);
288 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK2);
289 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK1);
290 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
291 1.1 uch printf("\n MCS interface %sebled",
292 1.6 uch reg & PLUM_POWER_INPENA ? "en" : "dis");
293 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
294 1.1 uch printf("\n IO5 reset:%s %s",
295 1.6 uch reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
296 1.6 uch reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
297 1.1 uch printf("\n");
298 1.1 uch }
299 1.5 uch #endif /* PLUMPOWERDEBUG */
300 1.1 uch
301