plumpower.c revision 1.5.2.2
1 1.5.2.2 bouyer /* $NetBSD: plumpower.c,v 1.5.2.2 2000/11/20 20:46:12 bouyer Exp $ */ 2 1.5.2.2 bouyer 3 1.5.2.2 bouyer /*- 4 1.5.2.2 bouyer * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 1.5.2.2 bouyer * All rights reserved. 6 1.5.2.2 bouyer * 7 1.5.2.2 bouyer * This code is derived from software contributed to The NetBSD Foundation 8 1.5.2.2 bouyer * by UCHIYAMA Yasushi. 9 1.5.2.2 bouyer * 10 1.5.2.2 bouyer * Redistribution and use in source and binary forms, with or without 11 1.5.2.2 bouyer * modification, are permitted provided that the following conditions 12 1.5.2.2 bouyer * are met: 13 1.5.2.2 bouyer * 1. Redistributions of source code must retain the above copyright 14 1.5.2.2 bouyer * notice, this list of conditions and the following disclaimer. 15 1.5.2.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright 16 1.5.2.2 bouyer * notice, this list of conditions and the following disclaimer in the 17 1.5.2.2 bouyer * documentation and/or other materials provided with the distribution. 18 1.5.2.2 bouyer * 3. All advertising materials mentioning features or use of this software 19 1.5.2.2 bouyer * must display the following acknowledgement: 20 1.5.2.2 bouyer * This product includes software developed by the NetBSD 21 1.5.2.2 bouyer * Foundation, Inc. and its contributors. 22 1.5.2.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.5.2.2 bouyer * contributors may be used to endorse or promote products derived 24 1.5.2.2 bouyer * from this software without specific prior written permission. 25 1.5.2.2 bouyer * 26 1.5.2.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.5.2.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.5.2.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.5.2.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.5.2.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.5.2.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.5.2.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.5.2.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.5.2.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.5.2.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.5.2.2 bouyer * POSSIBILITY OF SUCH DAMAGE. 37 1.5.2.2 bouyer */ 38 1.5.2.2 bouyer 39 1.5.2.2 bouyer #undef PLUMPOWERDEBUG 40 1.5.2.2 bouyer #include "opt_tx39_debug.h" 41 1.5.2.2 bouyer 42 1.5.2.2 bouyer #include <sys/param.h> 43 1.5.2.2 bouyer #include <sys/systm.h> 44 1.5.2.2 bouyer #include <sys/device.h> 45 1.5.2.2 bouyer #include <sys/malloc.h> 46 1.5.2.2 bouyer 47 1.5.2.2 bouyer #include <machine/bus.h> 48 1.5.2.2 bouyer #include <machine/intr.h> 49 1.5.2.2 bouyer 50 1.5.2.2 bouyer #include <hpcmips/tx/tx39var.h> 51 1.5.2.2 bouyer #include <hpcmips/dev/plumvar.h> 52 1.5.2.2 bouyer #include <hpcmips/dev/plumpowervar.h> 53 1.5.2.2 bouyer #include <hpcmips/dev/plumpowerreg.h> 54 1.5.2.2 bouyer 55 1.5.2.2 bouyer #ifdef PLUMPOWERDEBUG 56 1.5.2.2 bouyer int plumpower_debug = 1; 57 1.5.2.2 bouyer #define DPRINTF(arg) if (plumpower_debug) printf arg; 58 1.5.2.2 bouyer #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg; 59 1.5.2.2 bouyer #else 60 1.5.2.2 bouyer #define DPRINTF(arg) 61 1.5.2.2 bouyer #define DPRINTFN(n, arg) 62 1.5.2.2 bouyer #endif 63 1.5.2.2 bouyer 64 1.5.2.2 bouyer int plumpower_match(struct device *, struct cfdata *, void *); 65 1.5.2.2 bouyer void plumpower_attach(struct device *, struct device *, void *); 66 1.5.2.2 bouyer 67 1.5.2.2 bouyer struct plumpower_softc { 68 1.5.2.2 bouyer struct device sc_dev; 69 1.5.2.2 bouyer plum_chipset_tag_t sc_pc; 70 1.5.2.2 bouyer bus_space_tag_t sc_regt; 71 1.5.2.2 bouyer bus_space_handle_t sc_regh; 72 1.5.2.2 bouyer }; 73 1.5.2.2 bouyer 74 1.5.2.2 bouyer struct cfattach plumpower_ca = { 75 1.5.2.2 bouyer sizeof(struct plumpower_softc), plumpower_match, plumpower_attach 76 1.5.2.2 bouyer }; 77 1.5.2.2 bouyer 78 1.5.2.2 bouyer #ifdef PLUMPOWERDEBUG 79 1.5.2.2 bouyer static void plumpower_dump(struct plumpower_softc *); 80 1.5.2.2 bouyer #endif 81 1.5.2.2 bouyer 82 1.5.2.2 bouyer int 83 1.5.2.2 bouyer plumpower_match(struct device *parent, struct cfdata *cf, void *aux) 84 1.5.2.2 bouyer { 85 1.5.2.2 bouyer return 2; /* 1st attach group */ 86 1.5.2.2 bouyer } 87 1.5.2.2 bouyer 88 1.5.2.2 bouyer void 89 1.5.2.2 bouyer plumpower_attach(struct device *parent, struct device *self, void *aux) 90 1.5.2.2 bouyer { 91 1.5.2.2 bouyer struct plum_attach_args *pa = aux; 92 1.5.2.2 bouyer struct plumpower_softc *sc = (void*)self; 93 1.5.2.2 bouyer 94 1.5.2.2 bouyer printf("\n"); 95 1.5.2.2 bouyer sc->sc_pc = pa->pa_pc; 96 1.5.2.2 bouyer sc->sc_regt = pa->pa_regt; 97 1.5.2.2 bouyer 98 1.5.2.2 bouyer if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE, 99 1.5.2.2 bouyer PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) { 100 1.5.2.2 bouyer printf(": register map failed\n"); 101 1.5.2.2 bouyer return; 102 1.5.2.2 bouyer } 103 1.5.2.2 bouyer plum_conf_register_power(sc->sc_pc, (void*)sc); 104 1.5.2.2 bouyer #ifdef PLUMPOWERDEBUG 105 1.5.2.2 bouyer plumpower_dump(sc); 106 1.5.2.2 bouyer #endif 107 1.5.2.2 bouyer /* disable all power/clock */ 108 1.5.2.2 bouyer plum_conf_write(sc->sc_regt, sc->sc_regh, 109 1.5.2.2 bouyer PLUM_POWER_PWRCONT_REG, 0); 110 1.5.2.2 bouyer plum_conf_write(sc->sc_regt, sc->sc_regh, 111 1.5.2.2 bouyer PLUM_POWER_CLKCONT_REG, 0); 112 1.5.2.2 bouyer 113 1.5.2.2 bouyer /* enable MCS interface from TX3922 */ 114 1.5.2.2 bouyer plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG, 115 1.5.2.2 bouyer PLUM_POWER_INPENA); 116 1.5.2.2 bouyer } 117 1.5.2.2 bouyer 118 1.5.2.2 bouyer void 119 1.5.2.2 bouyer plum_power_ioreset(plum_chipset_tag_t pc) 120 1.5.2.2 bouyer { 121 1.5.2.2 bouyer struct plumpower_softc *sc = pc->pc_powert; 122 1.5.2.2 bouyer bus_space_tag_t regt = sc->sc_regt; 123 1.5.2.2 bouyer bus_space_handle_t regh = sc->sc_regh; 124 1.5.2.2 bouyer 125 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 126 1.5.2.2 bouyer PLUM_POWER_RESETC_IO5CL1 | 127 1.5.2.2 bouyer PLUM_POWER_RESETC_IO5CL1); 128 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0); 129 1.5.2.2 bouyer } 130 1.5.2.2 bouyer 131 1.5.2.2 bouyer void* 132 1.5.2.2 bouyer plum_power_establish(plum_chipset_tag_t pc, int src) 133 1.5.2.2 bouyer { 134 1.5.2.2 bouyer struct plumpower_softc *sc = pc->pc_powert; 135 1.5.2.2 bouyer bus_space_tag_t regt = sc->sc_regt; 136 1.5.2.2 bouyer bus_space_handle_t regh = sc->sc_regh; 137 1.5.2.2 bouyer plumreg_t pwrreg, clkreg; 138 1.5.2.2 bouyer 139 1.5.2.2 bouyer pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 140 1.5.2.2 bouyer clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 141 1.5.2.2 bouyer 142 1.5.2.2 bouyer switch(src) { 143 1.5.2.2 bouyer default: 144 1.5.2.2 bouyer panic("plum_power_establish: unknown power source"); 145 1.5.2.2 bouyer case PLUM_PWR_LCD: 146 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_LCDPWR; 147 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 148 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_LCDDSP; 149 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 150 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_LCDOE; 151 1.5.2.2 bouyer break; 152 1.5.2.2 bouyer case PLUM_PWR_BKL: 153 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT; 154 1.5.2.2 bouyer break; 155 1.5.2.2 bouyer case PLUM_PWR_IO5: 156 1.5.2.2 bouyer /* reset I/O bus (High/Low) */ 157 1.5.2.2 bouyer plum_power_ioreset(pc); 158 1.5.2.2 bouyer 159 1.5.2.2 bouyer /* supply power */ 160 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_IO5PWR; 161 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 162 1.5.2.2 bouyer 163 1.5.2.2 bouyer /* output enable & supply clock */ 164 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_IO5OE; 165 1.5.2.2 bouyer clkreg |= PLUM_POWER_CLKCONT_IO5CLK; 166 1.5.2.2 bouyer break; 167 1.5.2.2 bouyer case PLUM_PWR_EXTPW0: 168 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_EXTPW0; 169 1.5.2.2 bouyer break; 170 1.5.2.2 bouyer case PLUM_PWR_EXTPW1: 171 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_EXTPW1; 172 1.5.2.2 bouyer break; 173 1.5.2.2 bouyer case PLUM_PWR_EXTPW2: 174 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_EXTPW2; 175 1.5.2.2 bouyer break; 176 1.5.2.2 bouyer case PLUM_PWR_USB: 177 1.5.2.2 bouyer /* output enable */ 178 1.5.2.2 bouyer pwrreg |= PLUM_POWER_PWRCONT_USBEN; 179 1.5.2.2 bouyer /* supply clock to the USB host controller */ 180 1.5.2.2 bouyer clkreg |= PLUM_POWER_CLKCONT_USBCLK1; 181 1.5.2.2 bouyer /* 182 1.5.2.2 bouyer * clock supply is adaptively controlled by hardware 183 1.5.2.2 bouyer * (recommended) 184 1.5.2.2 bouyer */ 185 1.5.2.2 bouyer clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2; 186 1.5.2.2 bouyer break; 187 1.5.2.2 bouyer case PLUM_PWR_SM: 188 1.5.2.2 bouyer clkreg |= PLUM_POWER_CLKCONT_SMCLK; 189 1.5.2.2 bouyer break; 190 1.5.2.2 bouyer case PLUM_PWR_PCC1: 191 1.5.2.2 bouyer clkreg |= PLUM_POWER_CLKCONT_PCCCLK1; 192 1.5.2.2 bouyer break; 193 1.5.2.2 bouyer case PLUM_PWR_PCC2: 194 1.5.2.2 bouyer clkreg |= PLUM_POWER_CLKCONT_PCCCLK2; 195 1.5.2.2 bouyer break; 196 1.5.2.2 bouyer } 197 1.5.2.2 bouyer 198 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 199 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 200 1.5.2.2 bouyer #ifdef PLUMPOWERDEBUG 201 1.5.2.2 bouyer plumpower_dump(sc); 202 1.5.2.2 bouyer #endif 203 1.5.2.2 bouyer return (void*)src; 204 1.5.2.2 bouyer } 205 1.5.2.2 bouyer 206 1.5.2.2 bouyer void 207 1.5.2.2 bouyer plum_power_disestablish(plum_chipset_tag_t pc, int ph) 208 1.5.2.2 bouyer { 209 1.5.2.2 bouyer struct plumpower_softc *sc = pc->pc_powert; 210 1.5.2.2 bouyer bus_space_tag_t regt = sc->sc_regt; 211 1.5.2.2 bouyer bus_space_handle_t regh = sc->sc_regh; 212 1.5.2.2 bouyer int src = (int)ph; 213 1.5.2.2 bouyer plumreg_t pwrreg, clkreg; 214 1.5.2.2 bouyer 215 1.5.2.2 bouyer pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 216 1.5.2.2 bouyer clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 217 1.5.2.2 bouyer 218 1.5.2.2 bouyer switch(src) { 219 1.5.2.2 bouyer default: 220 1.5.2.2 bouyer panic("plum_power_disestablish: unknown power source"); 221 1.5.2.2 bouyer case PLUM_PWR_LCD: 222 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE; 223 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 224 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP; 225 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 226 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR; 227 1.5.2.2 bouyer break; 228 1.5.2.2 bouyer case PLUM_PWR_BKL: 229 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT; 230 1.5.2.2 bouyer break; 231 1.5.2.2 bouyer case PLUM_PWR_IO5: 232 1.5.2.2 bouyer pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR | 233 1.5.2.2 bouyer PLUM_POWER_PWRCONT_IO5OE); 234 1.5.2.2 bouyer clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK; 235 1.5.2.2 bouyer break; 236 1.5.2.2 bouyer case PLUM_PWR_EXTPW0: 237 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0; 238 1.5.2.2 bouyer break; 239 1.5.2.2 bouyer case PLUM_PWR_EXTPW1: 240 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1; 241 1.5.2.2 bouyer break; 242 1.5.2.2 bouyer case PLUM_PWR_EXTPW2: 243 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2; 244 1.5.2.2 bouyer break; 245 1.5.2.2 bouyer case PLUM_PWR_USB: 246 1.5.2.2 bouyer pwrreg &= ~PLUM_POWER_PWRCONT_USBEN; 247 1.5.2.2 bouyer clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 | 248 1.5.2.2 bouyer PLUM_POWER_CLKCONT_USBCLK2); 249 1.5.2.2 bouyer break; 250 1.5.2.2 bouyer case PLUM_PWR_SM: 251 1.5.2.2 bouyer clkreg &= ~PLUM_POWER_CLKCONT_SMCLK; 252 1.5.2.2 bouyer break; 253 1.5.2.2 bouyer case PLUM_PWR_PCC1: 254 1.5.2.2 bouyer clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1; 255 1.5.2.2 bouyer break; 256 1.5.2.2 bouyer case PLUM_PWR_PCC2: 257 1.5.2.2 bouyer clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2; 258 1.5.2.2 bouyer break; 259 1.5.2.2 bouyer } 260 1.5.2.2 bouyer 261 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 262 1.5.2.2 bouyer plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 263 1.5.2.2 bouyer #ifdef PLUMPOWERDEBUG 264 1.5.2.2 bouyer plumpower_dump(sc); 265 1.5.2.2 bouyer #endif 266 1.5.2.2 bouyer } 267 1.5.2.2 bouyer 268 1.5.2.2 bouyer #ifdef PLUMPOWERDEBUG 269 1.5.2.2 bouyer #define ISPOWERSUPPLY(r, m) __is_set_print(r, PLUM_POWER_PWRCONT_##m, #m) 270 1.5.2.2 bouyer #define ISCLOCKSUPPLY(r, m) __is_set_print(r, PLUM_POWER_CLKCONT_##m, #m) 271 1.5.2.2 bouyer static void 272 1.5.2.2 bouyer plumpower_dump(struct plumpower_softc *sc) 273 1.5.2.2 bouyer { 274 1.5.2.2 bouyer bus_space_tag_t regt = sc->sc_regt; 275 1.5.2.2 bouyer bus_space_handle_t regh = sc->sc_regh; 276 1.5.2.2 bouyer plumreg_t reg; 277 1.5.2.2 bouyer 278 1.5.2.2 bouyer reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 279 1.5.2.2 bouyer printf(" power:"); 280 1.5.2.2 bouyer ISPOWERSUPPLY(reg, USBEN); 281 1.5.2.2 bouyer ISPOWERSUPPLY(reg, IO5OE); 282 1.5.2.2 bouyer ISPOWERSUPPLY(reg, LCDOE); 283 1.5.2.2 bouyer ISPOWERSUPPLY(reg, EXTPW2); 284 1.5.2.2 bouyer ISPOWERSUPPLY(reg, EXTPW1); 285 1.5.2.2 bouyer ISPOWERSUPPLY(reg, EXTPW0); 286 1.5.2.2 bouyer ISPOWERSUPPLY(reg, IO5PWR); 287 1.5.2.2 bouyer ISPOWERSUPPLY(reg, BKLIGHT); 288 1.5.2.2 bouyer ISPOWERSUPPLY(reg, LCDPWR); 289 1.5.2.2 bouyer ISPOWERSUPPLY(reg, LCDDSP); 290 1.5.2.2 bouyer reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 291 1.5.2.2 bouyer printf("\n clock:"); 292 1.5.2.2 bouyer ISCLOCKSUPPLY(reg, USBCLK2); 293 1.5.2.2 bouyer ISCLOCKSUPPLY(reg, USBCLK1); 294 1.5.2.2 bouyer ISCLOCKSUPPLY(reg, IO5CLK); 295 1.5.2.2 bouyer ISCLOCKSUPPLY(reg, SMCLK); 296 1.5.2.2 bouyer ISCLOCKSUPPLY(reg, PCCCLK2); 297 1.5.2.2 bouyer ISCLOCKSUPPLY(reg, PCCCLK1); 298 1.5.2.2 bouyer reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG); 299 1.5.2.2 bouyer printf("\n MCS interface %sebled", 300 1.5.2.2 bouyer reg & PLUM_POWER_INPENA ? "en" : "dis"); 301 1.5.2.2 bouyer reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG); 302 1.5.2.2 bouyer printf("\n IO5 reset:%s %s", 303 1.5.2.2 bouyer reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "", 304 1.5.2.2 bouyer reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : ""); 305 1.5.2.2 bouyer printf("\n"); 306 1.5.2.2 bouyer } 307 1.5.2.2 bouyer #endif /* PLUMPOWERDEBUG */ 308 1.5.2.2 bouyer 309
Indexes created Wed Oct 15 16:09:53 GMT 2025