plumpower.c revision 1.9 1 1.9 thorpej /* $NetBSD: plumpower.c,v 1.9 2002/10/02 05:26:47 thorpej Exp $ */
2 1.1 uch
3 1.5 uch /*-
4 1.5 uch * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.5 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.5 uch * by UCHIYAMA Yasushi.
9 1.5 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.5 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.5 uch * notice, this list of conditions and the following disclaimer in the
17 1.5 uch * documentation and/or other materials provided with the distribution.
18 1.5 uch * 3. All advertising materials mentioning features or use of this software
19 1.5 uch * must display the following acknowledgement:
20 1.5 uch * This product includes software developed by the NetBSD
21 1.5 uch * Foundation, Inc. and its contributors.
22 1.5 uch * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.5 uch * contributors may be used to endorse or promote products derived
24 1.5 uch * from this software without specific prior written permission.
25 1.1 uch *
26 1.5 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.5 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.5 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.5 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.5 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.5 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.5 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.5 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.5 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.5 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.5 uch * POSSIBILITY OF SUCH DAMAGE.
37 1.1 uch */
38 1.5 uch
39 1.3 uch #undef PLUMPOWERDEBUG
40 1.1 uch
41 1.1 uch #include <sys/param.h>
42 1.1 uch #include <sys/systm.h>
43 1.1 uch #include <sys/device.h>
44 1.1 uch #include <sys/malloc.h>
45 1.1 uch
46 1.1 uch #include <machine/bus.h>
47 1.1 uch #include <machine/intr.h>
48 1.1 uch
49 1.1 uch #include <hpcmips/tx/tx39var.h>
50 1.1 uch #include <hpcmips/dev/plumvar.h>
51 1.1 uch #include <hpcmips/dev/plumpowervar.h>
52 1.1 uch #include <hpcmips/dev/plumpowerreg.h>
53 1.1 uch
54 1.3 uch #ifdef PLUMPOWERDEBUG
55 1.3 uch int plumpower_debug = 1;
56 1.3 uch #define DPRINTF(arg) if (plumpower_debug) printf arg;
57 1.3 uch #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
58 1.3 uch #else
59 1.3 uch #define DPRINTF(arg)
60 1.3 uch #define DPRINTFN(n, arg)
61 1.3 uch #endif
62 1.3 uch
63 1.5 uch int plumpower_match(struct device *, struct cfdata *, void *);
64 1.5 uch void plumpower_attach(struct device *, struct device *, void *);
65 1.1 uch
66 1.1 uch struct plumpower_softc {
67 1.1 uch struct device sc_dev;
68 1.1 uch plum_chipset_tag_t sc_pc;
69 1.1 uch bus_space_tag_t sc_regt;
70 1.1 uch bus_space_handle_t sc_regh;
71 1.1 uch };
72 1.1 uch
73 1.9 thorpej CFATTACH_DECL(plumpower, sizeof(struct plumpower_softc),
74 1.9 thorpej plumpower_match, plumpower_attach, NULL, NULL);
75 1.1 uch
76 1.5 uch #ifdef PLUMPOWERDEBUG
77 1.5 uch static void plumpower_dump(struct plumpower_softc *);
78 1.5 uch #endif
79 1.1 uch
80 1.1 uch int
81 1.5 uch plumpower_match(struct device *parent, struct cfdata *cf, void *aux)
82 1.1 uch {
83 1.1 uch return 2; /* 1st attach group */
84 1.1 uch }
85 1.1 uch
86 1.1 uch void
87 1.5 uch plumpower_attach(struct device *parent, struct device *self, void *aux)
88 1.1 uch {
89 1.1 uch struct plum_attach_args *pa = aux;
90 1.1 uch struct plumpower_softc *sc = (void*)self;
91 1.1 uch
92 1.1 uch printf("\n");
93 1.1 uch sc->sc_pc = pa->pa_pc;
94 1.1 uch sc->sc_regt = pa->pa_regt;
95 1.1 uch
96 1.1 uch if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
97 1.6 uch PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
98 1.1 uch printf(": register map failed\n");
99 1.1 uch return;
100 1.1 uch }
101 1.1 uch plum_conf_register_power(sc->sc_pc, (void*)sc);
102 1.3 uch #ifdef PLUMPOWERDEBUG
103 1.1 uch plumpower_dump(sc);
104 1.3 uch #endif
105 1.2 uch /* disable all power/clock */
106 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
107 1.6 uch PLUM_POWER_PWRCONT_REG, 0);
108 1.2 uch plum_conf_write(sc->sc_regt, sc->sc_regh,
109 1.6 uch PLUM_POWER_CLKCONT_REG, 0);
110 1.2 uch
111 1.2 uch /* enable MCS interface from TX3922 */
112 1.1 uch plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
113 1.6 uch PLUM_POWER_INPENA);
114 1.1 uch }
115 1.1 uch
116 1.1 uch void
117 1.5 uch plum_power_ioreset(plum_chipset_tag_t pc)
118 1.1 uch {
119 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
120 1.1 uch bus_space_tag_t regt = sc->sc_regt;
121 1.1 uch bus_space_handle_t regh = sc->sc_regh;
122 1.1 uch
123 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
124 1.6 uch PLUM_POWER_RESETC_IO5CL1 |
125 1.6 uch PLUM_POWER_RESETC_IO5CL1);
126 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
127 1.1 uch }
128 1.1 uch
129 1.1 uch void*
130 1.5 uch plum_power_establish(plum_chipset_tag_t pc, int src)
131 1.1 uch {
132 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
133 1.1 uch bus_space_tag_t regt = sc->sc_regt;
134 1.1 uch bus_space_handle_t regh = sc->sc_regh;
135 1.1 uch plumreg_t pwrreg, clkreg;
136 1.1 uch
137 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
138 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
139 1.1 uch
140 1.1 uch switch(src) {
141 1.1 uch default:
142 1.1 uch panic("plum_power_establish: unknown power source");
143 1.1 uch case PLUM_PWR_LCD:
144 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
145 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
146 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
147 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
148 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
149 1.1 uch break;
150 1.1 uch case PLUM_PWR_BKL:
151 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
152 1.1 uch break;
153 1.1 uch case PLUM_PWR_IO5:
154 1.2 uch /* reset I/O bus (High/Low) */
155 1.2 uch plum_power_ioreset(pc);
156 1.2 uch
157 1.2 uch /* supply power */
158 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
159 1.2 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
160 1.2 uch
161 1.2 uch /* output enable & supply clock */
162 1.2 uch pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
163 1.1 uch clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
164 1.1 uch break;
165 1.1 uch case PLUM_PWR_EXTPW0:
166 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
167 1.1 uch break;
168 1.1 uch case PLUM_PWR_EXTPW1:
169 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
170 1.1 uch break;
171 1.1 uch case PLUM_PWR_EXTPW2:
172 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
173 1.1 uch break;
174 1.1 uch case PLUM_PWR_USB:
175 1.2 uch /* output enable */
176 1.1 uch pwrreg |= PLUM_POWER_PWRCONT_USBEN;
177 1.2 uch /* supply clock to the USB host controller */
178 1.2 uch clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
179 1.4 uch /*
180 1.4 uch * clock supply is adaptively controlled by hardware
181 1.4 uch * (recommended)
182 1.4 uch */
183 1.2 uch clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
184 1.1 uch break;
185 1.1 uch case PLUM_PWR_SM:
186 1.1 uch clkreg |= PLUM_POWER_CLKCONT_SMCLK;
187 1.1 uch break;
188 1.1 uch case PLUM_PWR_PCC1:
189 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
190 1.1 uch break;
191 1.1 uch case PLUM_PWR_PCC2:
192 1.1 uch clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
193 1.1 uch break;
194 1.1 uch }
195 1.1 uch
196 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
197 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
198 1.3 uch #ifdef PLUMPOWERDEBUG
199 1.2 uch plumpower_dump(sc);
200 1.3 uch #endif
201 1.1 uch return (void*)src;
202 1.1 uch }
203 1.1 uch
204 1.1 uch void
205 1.5 uch plum_power_disestablish(plum_chipset_tag_t pc, int ph)
206 1.1 uch {
207 1.1 uch struct plumpower_softc *sc = pc->pc_powert;
208 1.1 uch bus_space_tag_t regt = sc->sc_regt;
209 1.1 uch bus_space_handle_t regh = sc->sc_regh;
210 1.1 uch int src = (int)ph;
211 1.1 uch plumreg_t pwrreg, clkreg;
212 1.1 uch
213 1.1 uch pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
214 1.1 uch clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
215 1.1 uch
216 1.1 uch switch(src) {
217 1.1 uch default:
218 1.1 uch panic("plum_power_disestablish: unknown power source");
219 1.1 uch case PLUM_PWR_LCD:
220 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE;
221 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
222 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP;
223 1.5 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
224 1.5 uch pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR;
225 1.1 uch break;
226 1.1 uch case PLUM_PWR_BKL:
227 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
228 1.1 uch break;
229 1.1 uch case PLUM_PWR_IO5:
230 1.1 uch pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
231 1.6 uch PLUM_POWER_PWRCONT_IO5OE);
232 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
233 1.1 uch break;
234 1.1 uch case PLUM_PWR_EXTPW0:
235 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
236 1.1 uch break;
237 1.1 uch case PLUM_PWR_EXTPW1:
238 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
239 1.1 uch break;
240 1.1 uch case PLUM_PWR_EXTPW2:
241 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
242 1.1 uch break;
243 1.1 uch case PLUM_PWR_USB:
244 1.1 uch pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
245 1.1 uch clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
246 1.6 uch PLUM_POWER_CLKCONT_USBCLK2);
247 1.1 uch break;
248 1.1 uch case PLUM_PWR_SM:
249 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
250 1.1 uch break;
251 1.1 uch case PLUM_PWR_PCC1:
252 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
253 1.1 uch break;
254 1.1 uch case PLUM_PWR_PCC2:
255 1.1 uch clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
256 1.1 uch break;
257 1.1 uch }
258 1.1 uch
259 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
260 1.1 uch plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
261 1.3 uch #ifdef PLUMPOWERDEBUG
262 1.2 uch plumpower_dump(sc);
263 1.3 uch #endif
264 1.1 uch }
265 1.1 uch
266 1.5 uch #ifdef PLUMPOWERDEBUG
267 1.7 uch #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m)
268 1.7 uch #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m)
269 1.5 uch static void
270 1.5 uch plumpower_dump(struct plumpower_softc *sc)
271 1.1 uch {
272 1.1 uch bus_space_tag_t regt = sc->sc_regt;
273 1.1 uch bus_space_handle_t regh = sc->sc_regh;
274 1.1 uch plumreg_t reg;
275 1.1 uch
276 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
277 1.1 uch printf(" power:");
278 1.1 uch ISPOWERSUPPLY(reg, USBEN);
279 1.1 uch ISPOWERSUPPLY(reg, IO5OE);
280 1.1 uch ISPOWERSUPPLY(reg, LCDOE);
281 1.1 uch ISPOWERSUPPLY(reg, EXTPW2);
282 1.1 uch ISPOWERSUPPLY(reg, EXTPW1);
283 1.1 uch ISPOWERSUPPLY(reg, EXTPW0);
284 1.1 uch ISPOWERSUPPLY(reg, IO5PWR);
285 1.1 uch ISPOWERSUPPLY(reg, BKLIGHT);
286 1.1 uch ISPOWERSUPPLY(reg, LCDPWR);
287 1.1 uch ISPOWERSUPPLY(reg, LCDDSP);
288 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
289 1.1 uch printf("\n clock:");
290 1.1 uch ISCLOCKSUPPLY(reg, USBCLK2);
291 1.1 uch ISCLOCKSUPPLY(reg, USBCLK1);
292 1.1 uch ISCLOCKSUPPLY(reg, IO5CLK);
293 1.1 uch ISCLOCKSUPPLY(reg, SMCLK);
294 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK2);
295 1.1 uch ISCLOCKSUPPLY(reg, PCCCLK1);
296 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
297 1.1 uch printf("\n MCS interface %sebled",
298 1.6 uch reg & PLUM_POWER_INPENA ? "en" : "dis");
299 1.1 uch reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
300 1.1 uch printf("\n IO5 reset:%s %s",
301 1.6 uch reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
302 1.6 uch reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
303 1.1 uch printf("\n");
304 1.1 uch }
305 1.5 uch #endif /* PLUMPOWERDEBUG */
306 1.1 uch
307