plumpower.c revision 1.1
1 /* $NetBSD: plumpower.c,v 1.1 1999/11/21 06:50:26 uch Exp $ */ 2 3 /* 4 * Copyright (c) 1999, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 #include "opt_tx39_debug.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/malloc.h> 35 36 #include <machine/bus.h> 37 #include <machine/intr.h> 38 39 #include <hpcmips/tx/tx39var.h> 40 #include <hpcmips/dev/plumvar.h> 41 #include <hpcmips/dev/plumpowervar.h> 42 #include <hpcmips/dev/plumpowerreg.h> 43 44 int plumpower_match __P((struct device*, struct cfdata*, void*)); 45 void plumpower_attach __P((struct device*, struct device*, void*)); 46 47 struct plumpower_softc { 48 struct device sc_dev; 49 plum_chipset_tag_t sc_pc; 50 bus_space_tag_t sc_regt; 51 bus_space_handle_t sc_regh; 52 }; 53 54 struct cfattach plumpower_ca = { 55 sizeof(struct plumpower_softc), plumpower_match, plumpower_attach 56 }; 57 58 void plumpower_dump __P((struct plumpower_softc*)); 59 60 int 61 plumpower_match(parent, cf, aux) 62 struct device *parent; 63 struct cfdata *cf; 64 void *aux; 65 { 66 return 2; /* 1st attach group */ 67 } 68 69 void 70 plumpower_attach(parent, self, aux) 71 struct device *parent; 72 struct device *self; 73 void *aux; 74 { 75 struct plum_attach_args *pa = aux; 76 struct plumpower_softc *sc = (void*)self; 77 78 printf("\n"); 79 sc->sc_pc = pa->pa_pc; 80 sc->sc_regt = pa->pa_regt; 81 82 if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE, 83 PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) { 84 printf(": register map failed\n"); 85 return; 86 } 87 plum_conf_register_power(sc->sc_pc, (void*)sc); 88 89 #ifdef FULLPOWER 90 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_PWRCONT_REG, ~0); 91 delay(1000*1000); 92 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_CLKCONT_REG, ~0); 93 delay(1000*1000); 94 #endif 95 plumpower_dump(sc); 96 97 /* Enable MCS interface */ 98 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG, 99 PLUM_POWER_INPENA); 100 } 101 102 void 103 plum_power_ioreset(pc) 104 plum_chipset_tag_t pc; 105 { 106 struct plumpower_softc *sc = pc->pc_powert; 107 bus_space_tag_t regt = sc->sc_regt; 108 bus_space_handle_t regh = sc->sc_regh; 109 110 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 111 PLUM_POWER_RESETC_IO5CL1 | 112 PLUM_POWER_RESETC_IO5CL1); 113 delay(100*1000); 114 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0); 115 delay(100*1000); 116 } 117 118 void* 119 plum_power_establish(pc, src) 120 plum_chipset_tag_t pc; 121 int src; 122 { 123 struct plumpower_softc *sc = pc->pc_powert; 124 bus_space_tag_t regt = sc->sc_regt; 125 bus_space_handle_t regh = sc->sc_regh; 126 plumreg_t pwrreg, clkreg; 127 128 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 129 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 130 131 switch(src) { 132 default: 133 panic("plum_power_establish: unknown power source"); 134 case PLUM_PWR_LCD: 135 pwrreg |= (PLUM_POWER_PWRCONT_LCDOE | 136 PLUM_POWER_PWRCONT_LCDPWR | 137 PLUM_POWER_PWRCONT_LCDDSP); 138 break; 139 case PLUM_PWR_BKL: 140 pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT; 141 break; 142 case PLUM_PWR_IO5: 143 pwrreg |= (PLUM_POWER_PWRCONT_IO5PWR | 144 PLUM_POWER_PWRCONT_IO5OE); 145 clkreg |= PLUM_POWER_CLKCONT_IO5CLK; 146 break; 147 case PLUM_PWR_EXTPW0: 148 pwrreg |= PLUM_POWER_PWRCONT_EXTPW0; 149 break; 150 case PLUM_PWR_EXTPW1: 151 pwrreg |= PLUM_POWER_PWRCONT_EXTPW1; 152 break; 153 case PLUM_PWR_EXTPW2: 154 pwrreg |= PLUM_POWER_PWRCONT_EXTPW2; 155 break; 156 case PLUM_PWR_USB: 157 pwrreg |= PLUM_POWER_PWRCONT_USBEN; 158 clkreg |= (PLUM_POWER_CLKCONT_USBCLK1 | 159 PLUM_POWER_CLKCONT_USBCLK2); 160 break; 161 case PLUM_PWR_SM: 162 clkreg |= PLUM_POWER_CLKCONT_SMCLK; 163 break; 164 case PLUM_PWR_PCC1: 165 clkreg |= PLUM_POWER_CLKCONT_PCCCLK1; 166 break; 167 case PLUM_PWR_PCC2: 168 clkreg |= PLUM_POWER_CLKCONT_PCCCLK2; 169 break; 170 } 171 172 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 173 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 174 175 return (void*)src; 176 } 177 178 void 179 plum_power_disestablish(pc, ph) 180 plum_chipset_tag_t pc; 181 int ph; 182 { 183 struct plumpower_softc *sc = pc->pc_powert; 184 bus_space_tag_t regt = sc->sc_regt; 185 bus_space_handle_t regh = sc->sc_regh; 186 int src = (int)ph; 187 plumreg_t pwrreg, clkreg; 188 189 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 190 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 191 192 switch(src) { 193 default: 194 panic("plum_power_disestablish: unknown power source"); 195 case PLUM_PWR_LCD: 196 pwrreg &= ~(PLUM_POWER_PWRCONT_LCDOE | 197 PLUM_POWER_PWRCONT_LCDPWR | 198 PLUM_POWER_PWRCONT_LCDDSP); 199 break; 200 case PLUM_PWR_BKL: 201 pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT; 202 break; 203 case PLUM_PWR_IO5: 204 pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR | 205 PLUM_POWER_PWRCONT_IO5OE); 206 clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK; 207 break; 208 case PLUM_PWR_EXTPW0: 209 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0; 210 break; 211 case PLUM_PWR_EXTPW1: 212 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1; 213 break; 214 case PLUM_PWR_EXTPW2: 215 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2; 216 break; 217 case PLUM_PWR_USB: 218 pwrreg &= ~PLUM_POWER_PWRCONT_USBEN; 219 clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 | 220 PLUM_POWER_CLKCONT_USBCLK2); 221 break; 222 case PLUM_PWR_SM: 223 clkreg &= ~PLUM_POWER_CLKCONT_SMCLK; 224 break; 225 case PLUM_PWR_PCC1: 226 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1; 227 break; 228 case PLUM_PWR_PCC2: 229 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2; 230 break; 231 } 232 233 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 234 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 235 236 } 237 238 #define ISPOWERSUPPLY(r, m) __is_set_print(r, PLUM_POWER_PWRCONT_##m, #m) 239 #define ISCLOCKSUPPLY(r, m) __is_set_print(r, PLUM_POWER_CLKCONT_##m, #m) 240 241 void 242 plumpower_dump(sc) 243 struct plumpower_softc *sc; 244 { 245 bus_space_tag_t regt = sc->sc_regt; 246 bus_space_handle_t regh = sc->sc_regh; 247 plumreg_t reg; 248 249 reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 250 printf(" power:"); 251 ISPOWERSUPPLY(reg, USBEN); 252 ISPOWERSUPPLY(reg, IO5OE); 253 ISPOWERSUPPLY(reg, LCDOE); 254 ISPOWERSUPPLY(reg, EXTPW2); 255 ISPOWERSUPPLY(reg, EXTPW1); 256 ISPOWERSUPPLY(reg, EXTPW0); 257 ISPOWERSUPPLY(reg, IO5PWR); 258 ISPOWERSUPPLY(reg, BKLIGHT); 259 ISPOWERSUPPLY(reg, LCDPWR); 260 ISPOWERSUPPLY(reg, LCDDSP); 261 reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 262 printf("\n clock:"); 263 ISCLOCKSUPPLY(reg, USBCLK2); 264 ISCLOCKSUPPLY(reg, USBCLK1); 265 ISCLOCKSUPPLY(reg, IO5CLK); 266 ISCLOCKSUPPLY(reg, SMCLK); 267 ISCLOCKSUPPLY(reg, PCCCLK2); 268 ISCLOCKSUPPLY(reg, PCCCLK1); 269 reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG); 270 printf("\n MCS interface %sebled", 271 reg & PLUM_POWER_INPENA ? "en" : "dis"); 272 reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG); 273 printf("\n IO5 reset:%s %s", 274 reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "", 275 reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : ""); 276 277 reg = plum_conf_read(regt, regh, PLUM_POWER_TESTMD_REG); 278 printf("\n Test mode set:"); 279 bitdisp(reg); 280 printf("\n"); 281 } 282 283 284
Indexes created Fri Sep 26 20:09:58 GMT 2025