plumpower.c revision 1.13
1 /* $NetBSD: plumpower.c,v 1.13 2012/10/27 17:17:53 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: plumpower.c,v 1.13 2012/10/27 17:17:53 chs Exp $"); 34 35 #undef PLUMPOWERDEBUG 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 42 #include <machine/bus.h> 43 #include <machine/intr.h> 44 45 #include <hpcmips/tx/tx39var.h> 46 #include <hpcmips/dev/plumvar.h> 47 #include <hpcmips/dev/plumpowervar.h> 48 #include <hpcmips/dev/plumpowerreg.h> 49 50 #ifdef PLUMPOWERDEBUG 51 int plumpower_debug = 1; 52 #define DPRINTF(arg) if (plumpower_debug) printf arg; 53 #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg; 54 #else 55 #define DPRINTF(arg) 56 #define DPRINTFN(n, arg) 57 #endif 58 59 int plumpower_match(device_t, cfdata_t, void *); 60 void plumpower_attach(device_t, device_t, void *); 61 62 struct plumpower_softc { 63 plum_chipset_tag_t sc_pc; 64 bus_space_tag_t sc_regt; 65 bus_space_handle_t sc_regh; 66 }; 67 68 CFATTACH_DECL_NEW(plumpower, sizeof(struct plumpower_softc), 69 plumpower_match, plumpower_attach, NULL, NULL); 70 71 #ifdef PLUMPOWERDEBUG 72 static void plumpower_dump(struct plumpower_softc *); 73 #endif 74 75 int 76 plumpower_match(device_t parent, cfdata_t cf, void *aux) 77 { 78 return 2; /* 1st attach group */ 79 } 80 81 void 82 plumpower_attach(device_t parent, device_t self, void *aux) 83 { 84 struct plum_attach_args *pa = aux; 85 struct plumpower_softc *sc = device_private(self); 86 87 printf("\n"); 88 sc->sc_pc = pa->pa_pc; 89 sc->sc_regt = pa->pa_regt; 90 91 if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE, 92 PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) { 93 printf(": register map failed\n"); 94 return; 95 } 96 plum_conf_register_power(sc->sc_pc, (void*)sc); 97 #ifdef PLUMPOWERDEBUG 98 plumpower_dump(sc); 99 #endif 100 /* disable all power/clock */ 101 plum_conf_write(sc->sc_regt, sc->sc_regh, 102 PLUM_POWER_PWRCONT_REG, 0); 103 plum_conf_write(sc->sc_regt, sc->sc_regh, 104 PLUM_POWER_CLKCONT_REG, 0); 105 106 /* enable MCS interface from TX3922 */ 107 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG, 108 PLUM_POWER_INPENA); 109 } 110 111 void 112 plum_power_ioreset(plum_chipset_tag_t pc) 113 { 114 struct plumpower_softc *sc = pc->pc_powert; 115 bus_space_tag_t regt = sc->sc_regt; 116 bus_space_handle_t regh = sc->sc_regh; 117 118 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 119 PLUM_POWER_RESETC_IO5CL1 | 120 PLUM_POWER_RESETC_IO5CL1); 121 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0); 122 } 123 124 void* 125 plum_power_establish(plum_chipset_tag_t pc, int src) 126 { 127 struct plumpower_softc *sc = pc->pc_powert; 128 bus_space_tag_t regt = sc->sc_regt; 129 bus_space_handle_t regh = sc->sc_regh; 130 plumreg_t pwrreg, clkreg; 131 132 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 133 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 134 135 switch(src) { 136 default: 137 panic("plum_power_establish: unknown power source"); 138 case PLUM_PWR_LCD: 139 pwrreg |= PLUM_POWER_PWRCONT_LCDPWR; 140 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 141 pwrreg |= PLUM_POWER_PWRCONT_LCDDSP; 142 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 143 pwrreg |= PLUM_POWER_PWRCONT_LCDOE; 144 break; 145 case PLUM_PWR_BKL: 146 pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT; 147 break; 148 case PLUM_PWR_IO5: 149 /* reset I/O bus (High/Low) */ 150 plum_power_ioreset(pc); 151 152 /* supply power */ 153 pwrreg |= PLUM_POWER_PWRCONT_IO5PWR; 154 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 155 156 /* output enable & supply clock */ 157 pwrreg |= PLUM_POWER_PWRCONT_IO5OE; 158 clkreg |= PLUM_POWER_CLKCONT_IO5CLK; 159 break; 160 case PLUM_PWR_EXTPW0: 161 pwrreg |= PLUM_POWER_PWRCONT_EXTPW0; 162 break; 163 case PLUM_PWR_EXTPW1: 164 pwrreg |= PLUM_POWER_PWRCONT_EXTPW1; 165 break; 166 case PLUM_PWR_EXTPW2: 167 pwrreg |= PLUM_POWER_PWRCONT_EXTPW2; 168 break; 169 case PLUM_PWR_USB: 170 /* output enable */ 171 pwrreg |= PLUM_POWER_PWRCONT_USBEN; 172 /* supply clock to the USB host controller */ 173 clkreg |= PLUM_POWER_CLKCONT_USBCLK1; 174 /* 175 * clock supply is adaptively controlled by hardware 176 * (recommended) 177 */ 178 clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2; 179 break; 180 case PLUM_PWR_SM: 181 clkreg |= PLUM_POWER_CLKCONT_SMCLK; 182 break; 183 case PLUM_PWR_PCC1: 184 clkreg |= PLUM_POWER_CLKCONT_PCCCLK1; 185 break; 186 case PLUM_PWR_PCC2: 187 clkreg |= PLUM_POWER_CLKCONT_PCCCLK2; 188 break; 189 } 190 191 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 192 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 193 #ifdef PLUMPOWERDEBUG 194 plumpower_dump(sc); 195 #endif 196 return (void*)src; 197 } 198 199 void 200 plum_power_disestablish(plum_chipset_tag_t pc, int ph) 201 { 202 struct plumpower_softc *sc = pc->pc_powert; 203 bus_space_tag_t regt = sc->sc_regt; 204 bus_space_handle_t regh = sc->sc_regh; 205 int src = (int)ph; 206 plumreg_t pwrreg, clkreg; 207 208 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 209 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 210 211 switch(src) { 212 default: 213 panic("plum_power_disestablish: unknown power source"); 214 case PLUM_PWR_LCD: 215 pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE; 216 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 217 pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP; 218 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 219 pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR; 220 break; 221 case PLUM_PWR_BKL: 222 pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT; 223 break; 224 case PLUM_PWR_IO5: 225 pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR | 226 PLUM_POWER_PWRCONT_IO5OE); 227 clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK; 228 break; 229 case PLUM_PWR_EXTPW0: 230 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0; 231 break; 232 case PLUM_PWR_EXTPW1: 233 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1; 234 break; 235 case PLUM_PWR_EXTPW2: 236 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2; 237 break; 238 case PLUM_PWR_USB: 239 pwrreg &= ~PLUM_POWER_PWRCONT_USBEN; 240 clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 | 241 PLUM_POWER_CLKCONT_USBCLK2); 242 break; 243 case PLUM_PWR_SM: 244 clkreg &= ~PLUM_POWER_CLKCONT_SMCLK; 245 break; 246 case PLUM_PWR_PCC1: 247 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1; 248 break; 249 case PLUM_PWR_PCC2: 250 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2; 251 break; 252 } 253 254 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 255 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 256 #ifdef PLUMPOWERDEBUG 257 plumpower_dump(sc); 258 #endif 259 } 260 261 #ifdef PLUMPOWERDEBUG 262 #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m) 263 #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m) 264 static void 265 plumpower_dump(struct plumpower_softc *sc) 266 { 267 bus_space_tag_t regt = sc->sc_regt; 268 bus_space_handle_t regh = sc->sc_regh; 269 plumreg_t reg; 270 271 reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 272 printf(" power:"); 273 ISPOWERSUPPLY(reg, USBEN); 274 ISPOWERSUPPLY(reg, IO5OE); 275 ISPOWERSUPPLY(reg, LCDOE); 276 ISPOWERSUPPLY(reg, EXTPW2); 277 ISPOWERSUPPLY(reg, EXTPW1); 278 ISPOWERSUPPLY(reg, EXTPW0); 279 ISPOWERSUPPLY(reg, IO5PWR); 280 ISPOWERSUPPLY(reg, BKLIGHT); 281 ISPOWERSUPPLY(reg, LCDPWR); 282 ISPOWERSUPPLY(reg, LCDDSP); 283 reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 284 printf("\n clock:"); 285 ISCLOCKSUPPLY(reg, USBCLK2); 286 ISCLOCKSUPPLY(reg, USBCLK1); 287 ISCLOCKSUPPLY(reg, IO5CLK); 288 ISCLOCKSUPPLY(reg, SMCLK); 289 ISCLOCKSUPPLY(reg, PCCCLK2); 290 ISCLOCKSUPPLY(reg, PCCCLK1); 291 reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG); 292 printf("\n MCS interface %sebled", 293 reg & PLUM_POWER_INPENA ? "en" : "dis"); 294 reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG); 295 printf("\n IO5 reset:%s %s", 296 reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "", 297 reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : ""); 298 printf("\n"); 299 } 300 #endif /* PLUMPOWERDEBUG */ 301 302
Indexes created Thu Sep 25 08:09:54 GMT 2025