plumpower.c revision 1.3
1 /* $NetBSD: plumpower.c,v 1.3 2000/02/26 15:16:19 uch Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 #undef PLUMPOWERDEBUG 29 #include "opt_tx39_debug.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/malloc.h> 35 36 #include <machine/bus.h> 37 #include <machine/intr.h> 38 39 #include <hpcmips/tx/tx39var.h> 40 #include <hpcmips/dev/plumvar.h> 41 #include <hpcmips/dev/plumpowervar.h> 42 #include <hpcmips/dev/plumpowerreg.h> 43 44 #ifdef PLUMPOWERDEBUG 45 int plumpower_debug = 1; 46 #define DPRINTF(arg) if (plumpower_debug) printf arg; 47 #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg; 48 #else 49 #define DPRINTF(arg) 50 #define DPRINTFN(n, arg) 51 #endif 52 53 int plumpower_match __P((struct device*, struct cfdata*, void*)); 54 void plumpower_attach __P((struct device*, struct device*, void*)); 55 56 struct plumpower_softc { 57 struct device sc_dev; 58 plum_chipset_tag_t sc_pc; 59 bus_space_tag_t sc_regt; 60 bus_space_handle_t sc_regh; 61 }; 62 63 struct cfattach plumpower_ca = { 64 sizeof(struct plumpower_softc), plumpower_match, plumpower_attach 65 }; 66 67 void plumpower_dump __P((struct plumpower_softc*)); 68 69 int 70 plumpower_match(parent, cf, aux) 71 struct device *parent; 72 struct cfdata *cf; 73 void *aux; 74 { 75 return 2; /* 1st attach group */ 76 } 77 78 void 79 plumpower_attach(parent, self, aux) 80 struct device *parent; 81 struct device *self; 82 void *aux; 83 { 84 struct plum_attach_args *pa = aux; 85 struct plumpower_softc *sc = (void*)self; 86 87 printf("\n"); 88 sc->sc_pc = pa->pa_pc; 89 sc->sc_regt = pa->pa_regt; 90 91 if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE, 92 PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) { 93 printf(": register map failed\n"); 94 return; 95 } 96 plum_conf_register_power(sc->sc_pc, (void*)sc); 97 #ifdef PLUMPOWERDEBUG 98 plumpower_dump(sc); 99 #endif 100 /* disable all power/clock */ 101 plum_conf_write(sc->sc_regt, sc->sc_regh, 102 PLUM_POWER_PWRCONT_REG, 0); 103 plum_conf_write(sc->sc_regt, sc->sc_regh, 104 PLUM_POWER_CLKCONT_REG, 0); 105 delay(300 * 1000); 106 107 /* enable MCS interface from TX3922 */ 108 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG, 109 PLUM_POWER_INPENA); 110 } 111 112 void 113 plum_power_ioreset(pc) 114 plum_chipset_tag_t pc; 115 { 116 struct plumpower_softc *sc = pc->pc_powert; 117 bus_space_tag_t regt = sc->sc_regt; 118 bus_space_handle_t regh = sc->sc_regh; 119 120 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 121 PLUM_POWER_RESETC_IO5CL1 | 122 PLUM_POWER_RESETC_IO5CL1); 123 delay(100*1000); 124 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0); 125 delay(100*1000); 126 } 127 128 void* 129 plum_power_establish(pc, src) 130 plum_chipset_tag_t pc; 131 int src; 132 { 133 struct plumpower_softc *sc = pc->pc_powert; 134 bus_space_tag_t regt = sc->sc_regt; 135 bus_space_handle_t regh = sc->sc_regh; 136 plumreg_t pwrreg, clkreg; 137 138 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 139 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 140 141 switch(src) { 142 default: 143 panic("plum_power_establish: unknown power source"); 144 case PLUM_PWR_LCD: 145 pwrreg |= PLUM_POWER_PWRCONT_LCDPWR; 146 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 147 pwrreg |= PLUM_POWER_PWRCONT_LCDDSP; 148 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 149 pwrreg |= PLUM_POWER_PWRCONT_LCDOE; 150 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 151 break; 152 case PLUM_PWR_BKL: 153 pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT; 154 break; 155 case PLUM_PWR_IO5: 156 /* reset I/O bus (High/Low) */ 157 plum_power_ioreset(pc); 158 159 /* supply power */ 160 pwrreg |= PLUM_POWER_PWRCONT_IO5PWR; 161 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 162 delay(300*1000); 163 164 /* output enable & supply clock */ 165 pwrreg |= PLUM_POWER_PWRCONT_IO5OE; 166 clkreg |= PLUM_POWER_CLKCONT_IO5CLK; 167 break; 168 case PLUM_PWR_EXTPW0: 169 pwrreg |= PLUM_POWER_PWRCONT_EXTPW0; 170 break; 171 case PLUM_PWR_EXTPW1: 172 pwrreg |= PLUM_POWER_PWRCONT_EXTPW1; 173 break; 174 case PLUM_PWR_EXTPW2: 175 pwrreg |= PLUM_POWER_PWRCONT_EXTPW2; 176 break; 177 case PLUM_PWR_USB: 178 /* output enable */ 179 pwrreg |= PLUM_POWER_PWRCONT_USBEN; 180 /* supply clock to the USB host controller */ 181 clkreg |= PLUM_POWER_CLKCONT_USBCLK1; 182 /* clock supply is adaptively controlled by hardware */ 183 clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2; 184 break; 185 case PLUM_PWR_SM: 186 clkreg |= PLUM_POWER_CLKCONT_SMCLK; 187 break; 188 case PLUM_PWR_PCC1: 189 clkreg |= PLUM_POWER_CLKCONT_PCCCLK1; 190 break; 191 case PLUM_PWR_PCC2: 192 clkreg |= PLUM_POWER_CLKCONT_PCCCLK2; 193 break; 194 } 195 196 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 197 delay(300*1000); 198 199 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 200 delay(300*1000); 201 #ifdef PLUMPOWERDEBUG 202 plumpower_dump(sc); 203 #endif 204 return (void*)src; 205 } 206 207 void 208 plum_power_disestablish(pc, ph) 209 plum_chipset_tag_t pc; 210 int ph; 211 { 212 struct plumpower_softc *sc = pc->pc_powert; 213 bus_space_tag_t regt = sc->sc_regt; 214 bus_space_handle_t regh = sc->sc_regh; 215 int src = (int)ph; 216 plumreg_t pwrreg, clkreg; 217 218 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 219 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 220 221 switch(src) { 222 default: 223 panic("plum_power_disestablish: unknown power source"); 224 case PLUM_PWR_LCD: 225 pwrreg &= ~(PLUM_POWER_PWRCONT_LCDOE | 226 PLUM_POWER_PWRCONT_LCDPWR | 227 PLUM_POWER_PWRCONT_LCDDSP); 228 break; 229 case PLUM_PWR_BKL: 230 pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT; 231 break; 232 case PLUM_PWR_IO5: 233 pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR | 234 PLUM_POWER_PWRCONT_IO5OE); 235 clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK; 236 break; 237 case PLUM_PWR_EXTPW0: 238 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0; 239 break; 240 case PLUM_PWR_EXTPW1: 241 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1; 242 break; 243 case PLUM_PWR_EXTPW2: 244 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2; 245 break; 246 case PLUM_PWR_USB: 247 pwrreg &= ~PLUM_POWER_PWRCONT_USBEN; 248 clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 | 249 PLUM_POWER_CLKCONT_USBCLK2); 250 break; 251 case PLUM_PWR_SM: 252 clkreg &= ~PLUM_POWER_CLKCONT_SMCLK; 253 break; 254 case PLUM_PWR_PCC1: 255 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1; 256 break; 257 case PLUM_PWR_PCC2: 258 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2; 259 break; 260 } 261 262 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 263 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 264 #ifdef PLUMPOWERDEBUG 265 plumpower_dump(sc); 266 #endif 267 } 268 269 #define ISPOWERSUPPLY(r, m) __is_set_print(r, PLUM_POWER_PWRCONT_##m, #m) 270 #define ISCLOCKSUPPLY(r, m) __is_set_print(r, PLUM_POWER_CLKCONT_##m, #m) 271 272 void 273 plumpower_dump(sc) 274 struct plumpower_softc *sc; 275 { 276 bus_space_tag_t regt = sc->sc_regt; 277 bus_space_handle_t regh = sc->sc_regh; 278 plumreg_t reg; 279 280 reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 281 printf(" power:"); 282 ISPOWERSUPPLY(reg, USBEN); 283 ISPOWERSUPPLY(reg, IO5OE); 284 ISPOWERSUPPLY(reg, LCDOE); 285 ISPOWERSUPPLY(reg, EXTPW2); 286 ISPOWERSUPPLY(reg, EXTPW1); 287 ISPOWERSUPPLY(reg, EXTPW0); 288 ISPOWERSUPPLY(reg, IO5PWR); 289 ISPOWERSUPPLY(reg, BKLIGHT); 290 ISPOWERSUPPLY(reg, LCDPWR); 291 ISPOWERSUPPLY(reg, LCDDSP); 292 reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 293 printf("\n clock:"); 294 ISCLOCKSUPPLY(reg, USBCLK2); 295 ISCLOCKSUPPLY(reg, USBCLK1); 296 ISCLOCKSUPPLY(reg, IO5CLK); 297 ISCLOCKSUPPLY(reg, SMCLK); 298 ISCLOCKSUPPLY(reg, PCCCLK2); 299 ISCLOCKSUPPLY(reg, PCCCLK1); 300 reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG); 301 printf("\n MCS interface %sebled", 302 reg & PLUM_POWER_INPENA ? "en" : "dis"); 303 reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG); 304 printf("\n IO5 reset:%s %s", 305 reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "", 306 reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : ""); 307 printf("\n"); 308 } 309 310 311
Indexes created Wed Sep 24 15:09:51 GMT 2025