plumpower.c revision 1.7
1 /* $NetBSD: plumpower.c,v 1.7 2002/01/29 18:53:11 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #undef PLUMPOWERDEBUG 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 46 #include <machine/bus.h> 47 #include <machine/intr.h> 48 49 #include <hpcmips/tx/tx39var.h> 50 #include <hpcmips/dev/plumvar.h> 51 #include <hpcmips/dev/plumpowervar.h> 52 #include <hpcmips/dev/plumpowerreg.h> 53 54 #ifdef PLUMPOWERDEBUG 55 int plumpower_debug = 1; 56 #define DPRINTF(arg) if (plumpower_debug) printf arg; 57 #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg; 58 #else 59 #define DPRINTF(arg) 60 #define DPRINTFN(n, arg) 61 #endif 62 63 int plumpower_match(struct device *, struct cfdata *, void *); 64 void plumpower_attach(struct device *, struct device *, void *); 65 66 struct plumpower_softc { 67 struct device sc_dev; 68 plum_chipset_tag_t sc_pc; 69 bus_space_tag_t sc_regt; 70 bus_space_handle_t sc_regh; 71 }; 72 73 struct cfattach plumpower_ca = { 74 sizeof(struct plumpower_softc), plumpower_match, plumpower_attach 75 }; 76 77 #ifdef PLUMPOWERDEBUG 78 static void plumpower_dump(struct plumpower_softc *); 79 #endif 80 81 int 82 plumpower_match(struct device *parent, struct cfdata *cf, void *aux) 83 { 84 return 2; /* 1st attach group */ 85 } 86 87 void 88 plumpower_attach(struct device *parent, struct device *self, void *aux) 89 { 90 struct plum_attach_args *pa = aux; 91 struct plumpower_softc *sc = (void*)self; 92 93 printf("\n"); 94 sc->sc_pc = pa->pa_pc; 95 sc->sc_regt = pa->pa_regt; 96 97 if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE, 98 PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) { 99 printf(": register map failed\n"); 100 return; 101 } 102 plum_conf_register_power(sc->sc_pc, (void*)sc); 103 #ifdef PLUMPOWERDEBUG 104 plumpower_dump(sc); 105 #endif 106 /* disable all power/clock */ 107 plum_conf_write(sc->sc_regt, sc->sc_regh, 108 PLUM_POWER_PWRCONT_REG, 0); 109 plum_conf_write(sc->sc_regt, sc->sc_regh, 110 PLUM_POWER_CLKCONT_REG, 0); 111 112 /* enable MCS interface from TX3922 */ 113 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG, 114 PLUM_POWER_INPENA); 115 } 116 117 void 118 plum_power_ioreset(plum_chipset_tag_t pc) 119 { 120 struct plumpower_softc *sc = pc->pc_powert; 121 bus_space_tag_t regt = sc->sc_regt; 122 bus_space_handle_t regh = sc->sc_regh; 123 124 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 125 PLUM_POWER_RESETC_IO5CL1 | 126 PLUM_POWER_RESETC_IO5CL1); 127 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0); 128 } 129 130 void* 131 plum_power_establish(plum_chipset_tag_t pc, int src) 132 { 133 struct plumpower_softc *sc = pc->pc_powert; 134 bus_space_tag_t regt = sc->sc_regt; 135 bus_space_handle_t regh = sc->sc_regh; 136 plumreg_t pwrreg, clkreg; 137 138 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 139 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 140 141 switch(src) { 142 default: 143 panic("plum_power_establish: unknown power source"); 144 case PLUM_PWR_LCD: 145 pwrreg |= PLUM_POWER_PWRCONT_LCDPWR; 146 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 147 pwrreg |= PLUM_POWER_PWRCONT_LCDDSP; 148 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 149 pwrreg |= PLUM_POWER_PWRCONT_LCDOE; 150 break; 151 case PLUM_PWR_BKL: 152 pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT; 153 break; 154 case PLUM_PWR_IO5: 155 /* reset I/O bus (High/Low) */ 156 plum_power_ioreset(pc); 157 158 /* supply power */ 159 pwrreg |= PLUM_POWER_PWRCONT_IO5PWR; 160 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 161 162 /* output enable & supply clock */ 163 pwrreg |= PLUM_POWER_PWRCONT_IO5OE; 164 clkreg |= PLUM_POWER_CLKCONT_IO5CLK; 165 break; 166 case PLUM_PWR_EXTPW0: 167 pwrreg |= PLUM_POWER_PWRCONT_EXTPW0; 168 break; 169 case PLUM_PWR_EXTPW1: 170 pwrreg |= PLUM_POWER_PWRCONT_EXTPW1; 171 break; 172 case PLUM_PWR_EXTPW2: 173 pwrreg |= PLUM_POWER_PWRCONT_EXTPW2; 174 break; 175 case PLUM_PWR_USB: 176 /* output enable */ 177 pwrreg |= PLUM_POWER_PWRCONT_USBEN; 178 /* supply clock to the USB host controller */ 179 clkreg |= PLUM_POWER_CLKCONT_USBCLK1; 180 /* 181 * clock supply is adaptively controlled by hardware 182 * (recommended) 183 */ 184 clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2; 185 break; 186 case PLUM_PWR_SM: 187 clkreg |= PLUM_POWER_CLKCONT_SMCLK; 188 break; 189 case PLUM_PWR_PCC1: 190 clkreg |= PLUM_POWER_CLKCONT_PCCCLK1; 191 break; 192 case PLUM_PWR_PCC2: 193 clkreg |= PLUM_POWER_CLKCONT_PCCCLK2; 194 break; 195 } 196 197 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 198 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 199 #ifdef PLUMPOWERDEBUG 200 plumpower_dump(sc); 201 #endif 202 return (void*)src; 203 } 204 205 void 206 plum_power_disestablish(plum_chipset_tag_t pc, int ph) 207 { 208 struct plumpower_softc *sc = pc->pc_powert; 209 bus_space_tag_t regt = sc->sc_regt; 210 bus_space_handle_t regh = sc->sc_regh; 211 int src = (int)ph; 212 plumreg_t pwrreg, clkreg; 213 214 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 215 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 216 217 switch(src) { 218 default: 219 panic("plum_power_disestablish: unknown power source"); 220 case PLUM_PWR_LCD: 221 pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE; 222 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 223 pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP; 224 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 225 pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR; 226 break; 227 case PLUM_PWR_BKL: 228 pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT; 229 break; 230 case PLUM_PWR_IO5: 231 pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR | 232 PLUM_POWER_PWRCONT_IO5OE); 233 clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK; 234 break; 235 case PLUM_PWR_EXTPW0: 236 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0; 237 break; 238 case PLUM_PWR_EXTPW1: 239 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1; 240 break; 241 case PLUM_PWR_EXTPW2: 242 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2; 243 break; 244 case PLUM_PWR_USB: 245 pwrreg &= ~PLUM_POWER_PWRCONT_USBEN; 246 clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 | 247 PLUM_POWER_CLKCONT_USBCLK2); 248 break; 249 case PLUM_PWR_SM: 250 clkreg &= ~PLUM_POWER_CLKCONT_SMCLK; 251 break; 252 case PLUM_PWR_PCC1: 253 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1; 254 break; 255 case PLUM_PWR_PCC2: 256 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2; 257 break; 258 } 259 260 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 261 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 262 #ifdef PLUMPOWERDEBUG 263 plumpower_dump(sc); 264 #endif 265 } 266 267 #ifdef PLUMPOWERDEBUG 268 #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m) 269 #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m) 270 static void 271 plumpower_dump(struct plumpower_softc *sc) 272 { 273 bus_space_tag_t regt = sc->sc_regt; 274 bus_space_handle_t regh = sc->sc_regh; 275 plumreg_t reg; 276 277 reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 278 printf(" power:"); 279 ISPOWERSUPPLY(reg, USBEN); 280 ISPOWERSUPPLY(reg, IO5OE); 281 ISPOWERSUPPLY(reg, LCDOE); 282 ISPOWERSUPPLY(reg, EXTPW2); 283 ISPOWERSUPPLY(reg, EXTPW1); 284 ISPOWERSUPPLY(reg, EXTPW0); 285 ISPOWERSUPPLY(reg, IO5PWR); 286 ISPOWERSUPPLY(reg, BKLIGHT); 287 ISPOWERSUPPLY(reg, LCDPWR); 288 ISPOWERSUPPLY(reg, LCDDSP); 289 reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 290 printf("\n clock:"); 291 ISCLOCKSUPPLY(reg, USBCLK2); 292 ISCLOCKSUPPLY(reg, USBCLK1); 293 ISCLOCKSUPPLY(reg, IO5CLK); 294 ISCLOCKSUPPLY(reg, SMCLK); 295 ISCLOCKSUPPLY(reg, PCCCLK2); 296 ISCLOCKSUPPLY(reg, PCCCLK1); 297 reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG); 298 printf("\n MCS interface %sebled", 299 reg & PLUM_POWER_INPENA ? "en" : "dis"); 300 reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG); 301 printf("\n IO5 reset:%s %s", 302 reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "", 303 reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : ""); 304 printf("\n"); 305 } 306 #endif /* PLUMPOWERDEBUG */ 307 308
Indexes created Wed Sep 24 05:09:52 GMT 2025