plumpower.c revision 1.9
1 /* $NetBSD: plumpower.c,v 1.9 2002/10/02 05:26:47 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #undef PLUMPOWERDEBUG 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 46 #include <machine/bus.h> 47 #include <machine/intr.h> 48 49 #include <hpcmips/tx/tx39var.h> 50 #include <hpcmips/dev/plumvar.h> 51 #include <hpcmips/dev/plumpowervar.h> 52 #include <hpcmips/dev/plumpowerreg.h> 53 54 #ifdef PLUMPOWERDEBUG 55 int plumpower_debug = 1; 56 #define DPRINTF(arg) if (plumpower_debug) printf arg; 57 #define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg; 58 #else 59 #define DPRINTF(arg) 60 #define DPRINTFN(n, arg) 61 #endif 62 63 int plumpower_match(struct device *, struct cfdata *, void *); 64 void plumpower_attach(struct device *, struct device *, void *); 65 66 struct plumpower_softc { 67 struct device sc_dev; 68 plum_chipset_tag_t sc_pc; 69 bus_space_tag_t sc_regt; 70 bus_space_handle_t sc_regh; 71 }; 72 73 CFATTACH_DECL(plumpower, sizeof(struct plumpower_softc), 74 plumpower_match, plumpower_attach, NULL, NULL); 75 76 #ifdef PLUMPOWERDEBUG 77 static void plumpower_dump(struct plumpower_softc *); 78 #endif 79 80 int 81 plumpower_match(struct device *parent, struct cfdata *cf, void *aux) 82 { 83 return 2; /* 1st attach group */ 84 } 85 86 void 87 plumpower_attach(struct device *parent, struct device *self, void *aux) 88 { 89 struct plum_attach_args *pa = aux; 90 struct plumpower_softc *sc = (void*)self; 91 92 printf("\n"); 93 sc->sc_pc = pa->pa_pc; 94 sc->sc_regt = pa->pa_regt; 95 96 if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE, 97 PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) { 98 printf(": register map failed\n"); 99 return; 100 } 101 plum_conf_register_power(sc->sc_pc, (void*)sc); 102 #ifdef PLUMPOWERDEBUG 103 plumpower_dump(sc); 104 #endif 105 /* disable all power/clock */ 106 plum_conf_write(sc->sc_regt, sc->sc_regh, 107 PLUM_POWER_PWRCONT_REG, 0); 108 plum_conf_write(sc->sc_regt, sc->sc_regh, 109 PLUM_POWER_CLKCONT_REG, 0); 110 111 /* enable MCS interface from TX3922 */ 112 plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG, 113 PLUM_POWER_INPENA); 114 } 115 116 void 117 plum_power_ioreset(plum_chipset_tag_t pc) 118 { 119 struct plumpower_softc *sc = pc->pc_powert; 120 bus_space_tag_t regt = sc->sc_regt; 121 bus_space_handle_t regh = sc->sc_regh; 122 123 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 124 PLUM_POWER_RESETC_IO5CL1 | 125 PLUM_POWER_RESETC_IO5CL1); 126 plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0); 127 } 128 129 void* 130 plum_power_establish(plum_chipset_tag_t pc, int src) 131 { 132 struct plumpower_softc *sc = pc->pc_powert; 133 bus_space_tag_t regt = sc->sc_regt; 134 bus_space_handle_t regh = sc->sc_regh; 135 plumreg_t pwrreg, clkreg; 136 137 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 138 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 139 140 switch(src) { 141 default: 142 panic("plum_power_establish: unknown power source"); 143 case PLUM_PWR_LCD: 144 pwrreg |= PLUM_POWER_PWRCONT_LCDPWR; 145 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 146 pwrreg |= PLUM_POWER_PWRCONT_LCDDSP; 147 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 148 pwrreg |= PLUM_POWER_PWRCONT_LCDOE; 149 break; 150 case PLUM_PWR_BKL: 151 pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT; 152 break; 153 case PLUM_PWR_IO5: 154 /* reset I/O bus (High/Low) */ 155 plum_power_ioreset(pc); 156 157 /* supply power */ 158 pwrreg |= PLUM_POWER_PWRCONT_IO5PWR; 159 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 160 161 /* output enable & supply clock */ 162 pwrreg |= PLUM_POWER_PWRCONT_IO5OE; 163 clkreg |= PLUM_POWER_CLKCONT_IO5CLK; 164 break; 165 case PLUM_PWR_EXTPW0: 166 pwrreg |= PLUM_POWER_PWRCONT_EXTPW0; 167 break; 168 case PLUM_PWR_EXTPW1: 169 pwrreg |= PLUM_POWER_PWRCONT_EXTPW1; 170 break; 171 case PLUM_PWR_EXTPW2: 172 pwrreg |= PLUM_POWER_PWRCONT_EXTPW2; 173 break; 174 case PLUM_PWR_USB: 175 /* output enable */ 176 pwrreg |= PLUM_POWER_PWRCONT_USBEN; 177 /* supply clock to the USB host controller */ 178 clkreg |= PLUM_POWER_CLKCONT_USBCLK1; 179 /* 180 * clock supply is adaptively controlled by hardware 181 * (recommended) 182 */ 183 clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2; 184 break; 185 case PLUM_PWR_SM: 186 clkreg |= PLUM_POWER_CLKCONT_SMCLK; 187 break; 188 case PLUM_PWR_PCC1: 189 clkreg |= PLUM_POWER_CLKCONT_PCCCLK1; 190 break; 191 case PLUM_PWR_PCC2: 192 clkreg |= PLUM_POWER_CLKCONT_PCCCLK2; 193 break; 194 } 195 196 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 197 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 198 #ifdef PLUMPOWERDEBUG 199 plumpower_dump(sc); 200 #endif 201 return (void*)src; 202 } 203 204 void 205 plum_power_disestablish(plum_chipset_tag_t pc, int ph) 206 { 207 struct plumpower_softc *sc = pc->pc_powert; 208 bus_space_tag_t regt = sc->sc_regt; 209 bus_space_handle_t regh = sc->sc_regh; 210 int src = (int)ph; 211 plumreg_t pwrreg, clkreg; 212 213 pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 214 clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 215 216 switch(src) { 217 default: 218 panic("plum_power_disestablish: unknown power source"); 219 case PLUM_PWR_LCD: 220 pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE; 221 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 222 pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP; 223 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 224 pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR; 225 break; 226 case PLUM_PWR_BKL: 227 pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT; 228 break; 229 case PLUM_PWR_IO5: 230 pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR | 231 PLUM_POWER_PWRCONT_IO5OE); 232 clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK; 233 break; 234 case PLUM_PWR_EXTPW0: 235 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0; 236 break; 237 case PLUM_PWR_EXTPW1: 238 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1; 239 break; 240 case PLUM_PWR_EXTPW2: 241 pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2; 242 break; 243 case PLUM_PWR_USB: 244 pwrreg &= ~PLUM_POWER_PWRCONT_USBEN; 245 clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 | 246 PLUM_POWER_CLKCONT_USBCLK2); 247 break; 248 case PLUM_PWR_SM: 249 clkreg &= ~PLUM_POWER_CLKCONT_SMCLK; 250 break; 251 case PLUM_PWR_PCC1: 252 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1; 253 break; 254 case PLUM_PWR_PCC2: 255 clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2; 256 break; 257 } 258 259 plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg); 260 plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg); 261 #ifdef PLUMPOWERDEBUG 262 plumpower_dump(sc); 263 #endif 264 } 265 266 #ifdef PLUMPOWERDEBUG 267 #define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m) 268 #define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m) 269 static void 270 plumpower_dump(struct plumpower_softc *sc) 271 { 272 bus_space_tag_t regt = sc->sc_regt; 273 bus_space_handle_t regh = sc->sc_regh; 274 plumreg_t reg; 275 276 reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG); 277 printf(" power:"); 278 ISPOWERSUPPLY(reg, USBEN); 279 ISPOWERSUPPLY(reg, IO5OE); 280 ISPOWERSUPPLY(reg, LCDOE); 281 ISPOWERSUPPLY(reg, EXTPW2); 282 ISPOWERSUPPLY(reg, EXTPW1); 283 ISPOWERSUPPLY(reg, EXTPW0); 284 ISPOWERSUPPLY(reg, IO5PWR); 285 ISPOWERSUPPLY(reg, BKLIGHT); 286 ISPOWERSUPPLY(reg, LCDPWR); 287 ISPOWERSUPPLY(reg, LCDDSP); 288 reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG); 289 printf("\n clock:"); 290 ISCLOCKSUPPLY(reg, USBCLK2); 291 ISCLOCKSUPPLY(reg, USBCLK1); 292 ISCLOCKSUPPLY(reg, IO5CLK); 293 ISCLOCKSUPPLY(reg, SMCLK); 294 ISCLOCKSUPPLY(reg, PCCCLK2); 295 ISCLOCKSUPPLY(reg, PCCCLK1); 296 reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG); 297 printf("\n MCS interface %sebled", 298 reg & PLUM_POWER_INPENA ? "en" : "dis"); 299 reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG); 300 printf("\n IO5 reset:%s %s", 301 reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "", 302 reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : ""); 303 printf("\n"); 304 } 305 #endif /* PLUMPOWERDEBUG */ 306 307
Indexes created Fri Sep 26 08:10:20 GMT 2025