plumvideo.c revision 1.14
1 /* $NetBSD: plumvideo.c,v 1.14 2000/10/04 13:53:55 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #define PLUMVIDEODEBUG 40 #include "opt_tx39_debug.h" 41 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <sys/ioctl.h> 48 #include <sys/buf.h> 49 #include <uvm/uvm_extern.h> 50 51 #include <dev/cons.h> /* consdev */ 52 53 #include <machine/bus.h> 54 #include <machine/intr.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/dev/plumvar.h> 59 #include <hpcmips/dev/plumicuvar.h> 60 #include <hpcmips/dev/plumpowervar.h> 61 #include <hpcmips/dev/plumvideoreg.h> 62 63 #include <machine/bootinfo.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/rasops/rasops.h> 67 #include <arch/hpcmips/dev/video_subr.h> 68 69 #include <dev/wscons/wsconsio.h> 70 #include <arch/hpcmips/dev/hpcfbvar.h> 71 #include <arch/hpcmips/dev/hpcfbio.h> 72 73 #ifdef PLUMVIDEODEBUG 74 int plumvideo_debug = 1; 75 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 76 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 77 #else 78 #define DPRINTF(arg) 79 #define DPRINTFN(n, arg) 80 #endif 81 82 struct plumvideo_softc { 83 struct device sc_dev; 84 tx_chipset_tag_t sc_tc; 85 plum_chipset_tag_t sc_pc; 86 87 void *sc_powerhook; /* power management hook */ 88 89 /* control register */ 90 bus_space_tag_t sc_regt; 91 bus_space_handle_t sc_regh; 92 /* frame buffer */ 93 bus_space_tag_t sc_fbiot; 94 bus_space_handle_t sc_fbioh; 95 /* clut buffer (8bpp only) */ 96 bus_space_tag_t sc_clutiot; 97 bus_space_handle_t sc_clutioh; 98 /* bitblt */ 99 bus_space_tag_t sc_bitbltt; 100 bus_space_handle_t sc_bitblth; 101 102 struct video_chip sc_chip; 103 struct hpcfb_fbconf sc_fbconf; 104 struct hpcfb_dspconf sc_dspconf; 105 }; 106 107 int plumvideo_match(struct device*, struct cfdata*, void*); 108 void plumvideo_attach(struct device*, struct device*, void*); 109 110 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 111 paddr_t plumvideo_mmap(void *, off_t, int); 112 113 struct cfattach plumvideo_ca = { 114 sizeof(struct plumvideo_softc), plumvideo_match, plumvideo_attach 115 }; 116 117 struct hpcfb_accessops plumvideo_ha = { 118 plumvideo_ioctl, plumvideo_mmap 119 }; 120 121 int plumvideo_power(void *, int, long, void *); 122 123 int plumvideo_init(struct plumvideo_softc *, int *); 124 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 125 126 void plumvideo_clut_default(struct plumvideo_softc *); 127 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 128 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 129 void __plumvideo_clut_access(struct plumvideo_softc *, 130 void (*)(bus_space_tag_t, bus_space_handle_t)); 131 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 132 133 #ifdef PLUMVIDEODEBUG 134 void plumvideo_dump(struct plumvideo_softc*); 135 #endif 136 137 #define ON 1 138 #define OFF 0 139 140 int 141 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 142 { 143 /* 144 * VRAM area also uses as UHOSTC shared RAM. 145 */ 146 return (2); /* 1st attach group */ 147 } 148 149 void 150 plumvideo_attach(struct device *parent, struct device *self, void *aux) 151 { 152 struct plum_attach_args *pa = aux; 153 struct plumvideo_softc *sc = (void*)self; 154 struct hpcfb_attach_args ha; 155 int console, reverse_flag; 156 157 sc->sc_pc = pa->pa_pc; 158 sc->sc_regt = pa->pa_regt; 159 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 160 161 printf(": "); 162 163 /* map register area */ 164 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 165 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 166 printf("register map failed\n"); 167 return; 168 } 169 170 /* power control */ 171 #ifndef PLUMVIDEODEBUG 172 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) 173 plumvideo_power(sc, 0, 0, (void *)PWR_SUSPEND); 174 else 175 #endif 176 plumvideo_power(sc, 0, 0, (void *)PWR_RESUME); 177 /* Add a hard power hook to power saving */ 178 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 179 CONFIG_HOOK_PMEVENT_HARDPOWER, 180 CONFIG_HOOK_SHARE, 181 plumvideo_power, sc); 182 if (sc->sc_powerhook == 0) 183 printf("WARNING unable to establish hard power hook"); 184 185 /* 186 * Initialize LCD controller 187 * map V-RAM area. 188 * reinstall bootinfo structure. 189 * some OHCI shared-buffer hack. XXX 190 */ 191 if (plumvideo_init(sc, &reverse_flag) != 0) 192 return; 193 194 printf("\n"); 195 196 /* Attach frame buffer device */ 197 plumvideo_hpcfbinit(sc, reverse_flag); 198 199 #ifdef PLUMVIDEODEBUG 200 if (plumvideo_debug > 1) 201 plumvideo_dump(sc); 202 /* attach debug draw routine (debugging use) */ 203 video_attach_drawfunc(&sc->sc_chip); 204 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 205 #endif /* PLUMVIDEODEBUG */ 206 207 console = cn_tab ? 0 : 1; 208 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 209 panic("plumvideo_attach: can't init fb console"); 210 } 211 212 ha.ha_console = console; 213 ha.ha_accessops = &plumvideo_ha; 214 ha.ha_accessctx = sc; 215 ha.ha_curfbconf = 0; 216 ha.ha_nfbconf = 1; 217 ha.ha_fbconflist = &sc->sc_fbconf; 218 ha.ha_curdspconf = 0; 219 ha.ha_ndspconf = 1; 220 ha.ha_dspconflist = &sc->sc_dspconf; 221 222 config_found(self, &ha, hpcfbprint); 223 } 224 225 void 226 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 227 { 228 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 229 struct video_chip *chip = &sc->sc_chip; 230 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 231 int height = chip->vc_fbheight; 232 int width = chip->vc_fbwidth; 233 int depth = chip->vc_fbdepth; 234 235 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 236 237 fb->hf_conf_index = 0; /* configuration index */ 238 fb->hf_nconfs = 1; /* how many configurations */ 239 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 240 /* frame buffer name */ 241 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 242 /* configuration name */ 243 fb->hf_height = height; 244 fb->hf_width = width; 245 fb->hf_baseaddr = mips_ptob(mips_btop(fbvaddr)); 246 fb->hf_offset = (u_long)fbvaddr - fb->hf_baseaddr; 247 /* frame buffer start offset */ 248 fb->hf_bytes_per_line = (width * depth) / NBBY; 249 fb->hf_nplanes = 1; 250 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 251 252 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 253 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 254 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 255 if (reverse_flag) 256 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 257 258 switch (depth) { 259 default: 260 panic("plumvideo_hpcfbinit: not supported color depth\n"); 261 /* NOTREACHED */ 262 case 16: 263 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 264 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 265 fb->hf_pack_width = 16; 266 fb->hf_pixels_per_pack = 1; 267 fb->hf_pixel_width = 16; 268 269 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 270 /* reserved for future use */ 271 fb->hf_u.hf_rgb.hf_flags = 0; 272 273 fb->hf_u.hf_rgb.hf_red_width = 5; 274 fb->hf_u.hf_rgb.hf_red_shift = 11; 275 fb->hf_u.hf_rgb.hf_green_width = 6; 276 fb->hf_u.hf_rgb.hf_green_shift = 5; 277 fb->hf_u.hf_rgb.hf_blue_width = 5; 278 fb->hf_u.hf_rgb.hf_blue_shift = 0; 279 fb->hf_u.hf_rgb.hf_alpha_width = 0; 280 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 281 break; 282 283 case 8: 284 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 285 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 286 fb->hf_pack_width = 8; 287 fb->hf_pixels_per_pack = 1; 288 fb->hf_pixel_width = 8; 289 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 290 /* reserved for future use */ 291 fb->hf_u.hf_indexed.hf_flags = 0; 292 break; 293 } 294 } 295 296 int 297 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 298 { 299 struct { 300 int reverse, normal; 301 } ctype[] = { 302 { BIFB_D2_M2L_3, BIFB_D2_M2L_0 }, 303 { BIFB_D2_M2L_3x2, BIFB_D2_M2L_0x2 }, 304 { BIFB_D8_FF, BIFB_D8_00 }, 305 { BIFB_D16_FFFF, BIFB_D16_0000, }, 306 { -1, -1 } /* terminator */ 307 }, *ctypep; 308 struct video_chip *chip = &sc->sc_chip; 309 bus_space_tag_t regt = sc->sc_regt; 310 bus_space_handle_t regh = sc->sc_regh; 311 plumreg_t reg; 312 size_t vram_size; 313 int bpp, width, height, vram_pitch; 314 u_int16_t fbtype; 315 316 chip->vc_v = sc->sc_pc->pc_tc; 317 #if notyet 318 /* map BitBlt area */ 319 if (bus_space_map(sc->sc_bitbltt, 320 PLUM_VIDEO_BITBLT_IOBASE, 321 PLUM_VIDEO_BITBLT_IOSIZE, 0, 322 &sc->sc_bitblth)) { 323 printf(": BitBlt map failed\n"); 324 return (1); 325 } 326 #endif 327 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 328 329 /* check reverse color */ 330 fbtype = bootinfo->fb_type; 331 for (ctypep = ctype; ctypep->normal != -1 ; ctypep++) { 332 if (fbtype == ctypep->normal) { 333 *reverse = 0; 334 goto fbtype_found; 335 } else if (fbtype == ctypep->reverse) { 336 *reverse = 1; 337 goto fbtype_found; 338 } 339 } 340 printf(": unknown frame buffer type 0x%04x. attach failed.\n", fbtype); 341 return (1); 342 fbtype_found: 343 344 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 345 case PLUM_VIDEO_PLGMD_16BPP: 346 #if NPLUMOHCI > 0 /* reserve V-RAM for USB OHCI */ 347 /* FALLTHROUGH */ 348 #else 349 bpp = 16; 350 break; 351 #endif 352 default: 353 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 354 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 355 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 356 reg |= PLUM_VIDEO_PLGMD_8BPP; 357 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 358 #if notyet 359 /* change BitBlt color depth */ 360 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 361 #endif 362 /* FALLTHROUGH */ 363 case PLUM_VIDEO_PLGMD_8BPP: 364 bpp = 8; 365 break; 366 } 367 chip->vc_fbdepth = bpp; 368 369 /* 370 * Get display size from WindowsCE setted. 371 */ 372 chip->vc_fbwidth = width = bootinfo->fb_width = 373 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 374 chip->vc_fbheight = height = bootinfo->fb_height = 375 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 376 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 377 378 /* 379 * set line byte length to bootinfo and LCD controller. 380 */ 381 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 382 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 383 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 384 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 385 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 386 387 /* 388 * boot messages and map CLUT(if any). 389 */ 390 printf("display mode: "); 391 switch (bpp) { 392 default: 393 printf("disabled "); 394 break; 395 case 8: 396 printf("8bpp "); 397 /* map CLUT area */ 398 if (bus_space_map(sc->sc_clutiot, 399 PLUM_VIDEO_CLUT_LCD_IOBASE, 400 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 401 &sc->sc_clutioh)) { 402 printf(": CLUT map failed\n"); 403 return (1); 404 } 405 /* install default CLUT */ 406 plumvideo_clut_default(sc); 407 break; 408 case 16: 409 printf("16bpp "); 410 break; 411 } 412 413 /* 414 * calcurate frame buffer size. 415 */ 416 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 417 vram_size = (width * height * bpp) / NBBY; 418 vram_size = mips_round_page(vram_size); 419 chip->vc_fbsize = vram_size; 420 421 /* 422 * map V-RAM area. 423 */ 424 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 425 vram_size, 0, &sc->sc_fbioh)) { 426 printf(": V-RAM map failed\n"); 427 return (1); 428 } 429 430 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 431 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 432 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 433 434 return (0); 435 } 436 437 int 438 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 439 { 440 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 441 struct hpcfb_fbconf *fbconf; 442 struct hpcfb_dspconf *dspconf; 443 struct wsdisplay_cmap *cmap; 444 u_int8_t *r, *g, *b; 445 u_int32_t *rgb; 446 int idx, cnt, error; 447 448 switch (cmd) { 449 case WSDISPLAYIO_GETCMAP: 450 cmap = (struct wsdisplay_cmap*)data; 451 cnt = cmap->count; 452 idx = cmap->index; 453 454 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 455 sc->sc_fbconf.hf_pack_width != 8 || 456 !LEGAL_CLUT_INDEX(idx) || 457 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 458 return (EINVAL); 459 } 460 461 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 462 !uvm_useracc(cmap->green, cnt, B_WRITE) || 463 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 464 return (EFAULT); 465 } 466 467 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 468 if (error != 0) { 469 cmap_work_free(r, g, b, rgb); 470 return (ENOMEM); 471 } 472 plumvideo_clut_get(sc, rgb, idx, cnt); 473 rgb24_decompose(rgb, r, g, b, cnt); 474 475 copyout(r, cmap->red, cnt); 476 copyout(g, cmap->green,cnt); 477 copyout(b, cmap->blue, cnt); 478 479 cmap_work_free(r, g, b, rgb); 480 481 return (0); 482 483 case WSDISPLAYIO_PUTCMAP: 484 cmap = (struct wsdisplay_cmap*)data; 485 cnt = cmap->count; 486 idx = cmap->index; 487 488 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 489 sc->sc_fbconf.hf_pack_width != 8 || 490 !LEGAL_CLUT_INDEX(idx) || 491 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 492 return (EINVAL); 493 } 494 495 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 496 !uvm_useracc(cmap->green, cnt, B_WRITE) || 497 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 498 return (EFAULT); 499 } 500 501 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 502 if (error != 0) { 503 cmap_work_free(r, g, b, rgb); 504 return (ENOMEM); 505 } 506 rgb24_compose(rgb, r, g, b, cnt); 507 plumvideo_clut_set(sc, rgb, idx, cnt); 508 509 cmap_work_free(r, g, b, rgb); 510 511 return (0); 512 513 case HPCFBIO_GCONF: 514 fbconf = (struct hpcfb_fbconf *)data; 515 if (fbconf->hf_conf_index != 0 && 516 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 517 return (EINVAL); 518 } 519 *fbconf = sc->sc_fbconf; /* structure assignment */ 520 return (0); 521 522 case HPCFBIO_SCONF: 523 fbconf = (struct hpcfb_fbconf *)data; 524 if (fbconf->hf_conf_index != 0 && 525 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 526 return (EINVAL); 527 } 528 /* 529 * nothing to do because we have only one configration 530 */ 531 return (0); 532 533 case HPCFBIO_GDSPCONF: 534 dspconf = (struct hpcfb_dspconf *)data; 535 if ((dspconf->hd_unit_index != 0 && 536 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 537 (dspconf->hd_conf_index != 0 && 538 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 539 return (EINVAL); 540 } 541 *dspconf = sc->sc_dspconf; /* structure assignment */ 542 return (0); 543 544 case HPCFBIO_SDSPCONF: 545 dspconf = (struct hpcfb_dspconf *)data; 546 if ((dspconf->hd_unit_index != 0 && 547 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 548 (dspconf->hd_conf_index != 0 && 549 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 550 return (EINVAL); 551 } 552 /* 553 * nothing to do 554 * because we have only one unit and one configration 555 */ 556 return (0); 557 558 case HPCFBIO_GOP: 559 case HPCFBIO_SOP: 560 /* XXX not implemented yet */ 561 return (EINVAL); 562 } 563 564 return (ENOTTY); 565 } 566 567 paddr_t 568 plumvideo_mmap(void *ctx, off_t offset, int prot) 569 { 570 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 571 572 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 573 sc->sc_fbconf.hf_offset) < offset) { 574 return (-1); 575 } 576 577 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 578 } 579 580 void 581 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 582 int cnt) 583 { 584 static void __plumvideo_clut_get(bus_space_tag_t, 585 bus_space_handle_t); 586 static void __plumvideo_clut_get(iot, ioh) 587 bus_space_tag_t iot; 588 bus_space_handle_t ioh; 589 { 590 int i; 591 592 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 593 *rgb++ = bus_space_read_4(iot, ioh, beg) & 594 0x00ffffff; 595 } 596 } 597 598 KASSERT(rgb); 599 KASSERT(LEGAL_CLUT_INDEX(beg)); 600 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 601 __plumvideo_clut_access(sc, __plumvideo_clut_get); 602 } 603 604 void 605 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 606 int cnt) 607 { 608 static void __plumvideo_clut_set(bus_space_tag_t, 609 bus_space_handle_t); 610 static void __plumvideo_clut_set(iot, ioh) 611 bus_space_tag_t iot; 612 bus_space_handle_t ioh; 613 { 614 int i; 615 616 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 617 bus_space_write_4(iot, ioh, beg, 618 *rgb++ & 0x00ffffff); 619 } 620 } 621 622 KASSERT(rgb); 623 KASSERT(LEGAL_CLUT_INDEX(beg)); 624 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 625 __plumvideo_clut_access(sc, __plumvideo_clut_set); 626 } 627 628 void 629 plumvideo_clut_default(struct plumvideo_softc *sc) 630 { 631 static void __plumvideo_clut_default(bus_space_tag_t, 632 bus_space_handle_t); 633 static void __plumvideo_clut_default(iot, ioh) 634 bus_space_tag_t iot; 635 bus_space_handle_t ioh; 636 { 637 const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 638 const u_int32_t ansi_color[16] = { 639 0x000000, 0xff0000, 0x00ff00, 0xffff00, 640 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 641 0x000000, 0x800000, 0x008000, 0x808000, 642 0x000080, 0x800080, 0x008080, 0x808080, 643 }; 644 int i, r, g, b; 645 646 /* ANSI escape sequence */ 647 for (i = 0; i < 16; i++) { 648 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 649 } 650 /* 16 - 31, gray scale */ 651 for ( ; i < 32; i++) { 652 int j = (i - 16) * 17; 653 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 654 } 655 /* 32 - 247, RGB color */ 656 for (r = 0; r < 6; r++) { 657 for (g = 0; g < 6; g++) { 658 for (b = 0; b < 6; b++) { 659 bus_space_write_4(iot, ioh, i << 2, 660 RGB24(compo6[r], 661 compo6[g], 662 compo6[b])); 663 i++; 664 } 665 } 666 } 667 /* 248 - 245, just white */ 668 for ( ; i < 256; i++) { 669 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 670 } 671 } 672 673 __plumvideo_clut_access(sc, __plumvideo_clut_default); 674 } 675 676 void 677 __plumvideo_clut_access(struct plumvideo_softc *sc, void (*palette_func) 678 (bus_space_tag_t, bus_space_handle_t)) 679 { 680 bus_space_tag_t regt = sc->sc_regt; 681 bus_space_handle_t regh = sc->sc_regh; 682 plumreg_t val, gmode; 683 684 /* display off */ 685 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 686 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 687 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 688 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 689 690 /* palette access disable */ 691 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 692 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 693 694 /* change palette mode to CPU */ 695 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 696 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 697 698 /* palette access */ 699 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh); 700 701 /* change palette mode to Display */ 702 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 703 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 704 705 /* palette access enable */ 706 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 707 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 708 709 /* display on */ 710 val |= gmode; 711 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 712 } 713 714 /* !!! */ 715 static void 716 _flush_cache() 717 { 718 MachFlushCache(); 719 } 720 721 int 722 plumvideo_power(void *ctx, int type, long id, void *msg) 723 { 724 struct plumvideo_softc *sc = ctx; 725 plum_chipset_tag_t pc = sc->sc_pc; 726 bus_space_tag_t regt = sc->sc_regt; 727 bus_space_handle_t regh = sc->sc_regh; 728 int why = (int)msg; 729 730 switch (why) { 731 case PWR_RESUME: 732 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 733 /* power on */ 734 /* LCD power on and display on */ 735 plum_power_establish(pc, PLUM_PWR_LCD); 736 /* back-light on */ 737 plum_power_establish(pc, PLUM_PWR_BKL); 738 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 739 PLUM_VIDEO_PLLUM_MAX); 740 break; 741 case PWR_SUSPEND: 742 /* FALLTHROUGH */ 743 case PWR_STANDBY: 744 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 745 /* back-light off */ 746 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 747 PLUM_VIDEO_PLLUM_MIN); 748 plum_power_disestablish(pc, PLUM_PWR_BKL); 749 /* power down */ 750 plum_power_disestablish(pc, PLUM_PWR_LCD); 751 break; 752 } 753 754 return 0; 755 } 756 757 #ifdef PLUMVIDEODEBUG 758 void 759 plumvideo_dump(struct plumvideo_softc *sc) 760 { 761 bus_space_tag_t regt = sc->sc_regt; 762 bus_space_handle_t regh = sc->sc_regh; 763 764 plumreg_t reg; 765 int i; 766 767 for (i = 0; i < 0x160; i += 4) { 768 reg = plum_conf_read(regt, regh, i); 769 printf("0x%03x %08x", i, reg); 770 bitdisp(reg); 771 } 772 } 773 #endif /* PLUMVIDEODEBUG */ 774
Indexes created Sat Sep 27 14:09:57 GMT 2025