plumvideo.c revision 1.17
1 /* $NetBSD: plumvideo.c,v 1.17 2001/02/22 18:38:01 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #undef PLUMVIDEODEBUG 40 #include "opt_tx39_debug.h" 41 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <sys/ioctl.h> 48 #include <sys/buf.h> 49 #include <uvm/uvm_extern.h> 50 51 #include <dev/cons.h> /* consdev */ 52 53 #include <machine/bus.h> 54 #include <machine/intr.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/dev/plumvar.h> 59 #include <hpcmips/dev/plumicuvar.h> 60 #include <hpcmips/dev/plumpowervar.h> 61 #include <hpcmips/dev/plumvideoreg.h> 62 63 #include <machine/bootinfo.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/rasops/rasops.h> 67 #include <dev/hpc/video_subr.h> 68 69 #include <dev/wscons/wsconsio.h> 70 #include <dev/hpc/hpcfbvar.h> 71 #include <dev/hpc/hpcfbio.h> 72 73 #ifdef PLUMVIDEODEBUG 74 int plumvideo_debug = 1; 75 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 76 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 77 #else 78 #define DPRINTF(arg) 79 #define DPRINTFN(n, arg) 80 #endif 81 82 struct plumvideo_softc { 83 struct device sc_dev; 84 tx_chipset_tag_t sc_tc; 85 plum_chipset_tag_t sc_pc; 86 87 void *sc_powerhook; /* power management hook */ 88 int sc_console; 89 90 /* control register */ 91 bus_space_tag_t sc_regt; 92 bus_space_handle_t sc_regh; 93 /* frame buffer */ 94 bus_space_tag_t sc_fbiot; 95 bus_space_handle_t sc_fbioh; 96 /* clut buffer (8bpp only) */ 97 bus_space_tag_t sc_clutiot; 98 bus_space_handle_t sc_clutioh; 99 /* bitblt */ 100 bus_space_tag_t sc_bitbltt; 101 bus_space_handle_t sc_bitblth; 102 103 struct video_chip sc_chip; 104 struct hpcfb_fbconf sc_fbconf; 105 struct hpcfb_dspconf sc_dspconf; 106 }; 107 108 int plumvideo_match(struct device*, struct cfdata*, void*); 109 void plumvideo_attach(struct device*, struct device*, void*); 110 111 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 112 paddr_t plumvideo_mmap(void *, off_t, int); 113 114 struct cfattach plumvideo_ca = { 115 sizeof(struct plumvideo_softc), plumvideo_match, plumvideo_attach 116 }; 117 118 struct hpcfb_accessops plumvideo_ha = { 119 plumvideo_ioctl, plumvideo_mmap 120 }; 121 122 int plumvideo_power(void *, int, long, void *); 123 124 int plumvideo_init(struct plumvideo_softc *, int *); 125 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 126 127 void plumvideo_clut_default(struct plumvideo_softc *); 128 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 129 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 130 void __plumvideo_clut_access(struct plumvideo_softc *, 131 void (*)(bus_space_tag_t, bus_space_handle_t)); 132 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 133 134 #ifdef PLUMVIDEODEBUG 135 void plumvideo_dump(struct plumvideo_softc*); 136 #endif 137 138 #define ON 1 139 #define OFF 0 140 141 int 142 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 143 { 144 /* 145 * VRAM area also uses as UHOSTC shared RAM. 146 */ 147 return (2); /* 1st attach group */ 148 } 149 150 void 151 plumvideo_attach(struct device *parent, struct device *self, void *aux) 152 { 153 struct plum_attach_args *pa = aux; 154 struct plumvideo_softc *sc = (void*)self; 155 struct hpcfb_attach_args ha; 156 int console, reverse_flag; 157 158 sc->sc_console = console = cn_tab ? 0 : 1; 159 sc->sc_pc = pa->pa_pc; 160 sc->sc_regt = pa->pa_regt; 161 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 162 163 printf(": "); 164 165 /* map register area */ 166 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 167 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 168 printf("register map failed\n"); 169 return; 170 } 171 172 /* power control */ 173 plumvideo_power(sc, 0, 0, 174 (void *)(console ? PWR_RESUME : PWR_SUSPEND)); 175 /* Add a hard power hook to power saving */ 176 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 177 CONFIG_HOOK_PMEVENT_HARDPOWER, 178 CONFIG_HOOK_SHARE, 179 plumvideo_power, sc); 180 if (sc->sc_powerhook == 0) 181 printf("WARNING unable to establish hard power hook"); 182 183 /* 184 * Initialize LCD controller 185 * map V-RAM area. 186 * reinstall bootinfo structure. 187 * some OHCI shared-buffer hack. XXX 188 */ 189 if (plumvideo_init(sc, &reverse_flag) != 0) 190 return; 191 192 printf("\n"); 193 194 /* Attach frame buffer device */ 195 plumvideo_hpcfbinit(sc, reverse_flag); 196 197 #ifdef PLUMVIDEODEBUG 198 if (plumvideo_debug > 0) 199 plumvideo_dump(sc); 200 /* attach debug draw routine (debugging use) */ 201 video_attach_drawfunc(&sc->sc_chip); 202 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 203 #endif /* PLUMVIDEODEBUG */ 204 205 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 206 panic("plumvideo_attach: can't init fb console"); 207 } 208 209 ha.ha_console = console; 210 ha.ha_accessops = &plumvideo_ha; 211 ha.ha_accessctx = sc; 212 ha.ha_curfbconf = 0; 213 ha.ha_nfbconf = 1; 214 ha.ha_fbconflist = &sc->sc_fbconf; 215 ha.ha_curdspconf = 0; 216 ha.ha_ndspconf = 1; 217 ha.ha_dspconflist = &sc->sc_dspconf; 218 219 config_found(self, &ha, hpcfbprint); 220 } 221 222 void 223 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 224 { 225 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 226 struct video_chip *chip = &sc->sc_chip; 227 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 228 int height = chip->vc_fbheight; 229 int width = chip->vc_fbwidth; 230 int depth = chip->vc_fbdepth; 231 232 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 233 234 fb->hf_conf_index = 0; /* configuration index */ 235 fb->hf_nconfs = 1; /* how many configurations */ 236 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 237 /* frame buffer name */ 238 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 239 /* configuration name */ 240 fb->hf_height = height; 241 fb->hf_width = width; 242 fb->hf_baseaddr = (u_long)fbvaddr; 243 fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); 244 /* frame buffer start offset */ 245 fb->hf_bytes_per_line = (width * depth) / NBBY; 246 fb->hf_nplanes = 1; 247 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 248 249 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 250 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 251 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 252 if (reverse_flag) 253 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 254 255 switch (depth) { 256 default: 257 panic("plumvideo_hpcfbinit: not supported color depth\n"); 258 /* NOTREACHED */ 259 case 16: 260 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 261 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 262 fb->hf_pack_width = 16; 263 fb->hf_pixels_per_pack = 1; 264 fb->hf_pixel_width = 16; 265 266 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 267 /* reserved for future use */ 268 fb->hf_u.hf_rgb.hf_flags = 0; 269 270 fb->hf_u.hf_rgb.hf_red_width = 5; 271 fb->hf_u.hf_rgb.hf_red_shift = 11; 272 fb->hf_u.hf_rgb.hf_green_width = 6; 273 fb->hf_u.hf_rgb.hf_green_shift = 5; 274 fb->hf_u.hf_rgb.hf_blue_width = 5; 275 fb->hf_u.hf_rgb.hf_blue_shift = 0; 276 fb->hf_u.hf_rgb.hf_alpha_width = 0; 277 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 278 break; 279 280 case 8: 281 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 282 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 283 fb->hf_pack_width = 8; 284 fb->hf_pixels_per_pack = 1; 285 fb->hf_pixel_width = 8; 286 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 287 /* reserved for future use */ 288 fb->hf_u.hf_indexed.hf_flags = 0; 289 break; 290 } 291 } 292 293 int 294 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 295 { 296 struct video_chip *chip = &sc->sc_chip; 297 bus_space_tag_t regt = sc->sc_regt; 298 bus_space_handle_t regh = sc->sc_regh; 299 plumreg_t reg; 300 size_t vram_size; 301 int bpp, width, height, vram_pitch; 302 303 *reverse = video_reverse_color(); 304 chip->vc_v = sc->sc_pc->pc_tc; 305 #if notyet 306 /* map BitBlt area */ 307 if (bus_space_map(sc->sc_bitbltt, 308 PLUM_VIDEO_BITBLT_IOBASE, 309 PLUM_VIDEO_BITBLT_IOSIZE, 0, 310 &sc->sc_bitblth)) { 311 printf(": BitBlt map failed\n"); 312 return (1); 313 } 314 #endif 315 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 316 317 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 318 case PLUM_VIDEO_PLGMD_16BPP: 319 #if NPLUMOHCI > 0 /* reserve V-RAM area for USB OHCI */ 320 /* FALLTHROUGH */ 321 #else 322 bpp = 16; 323 break; 324 #endif 325 default: 326 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 327 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 328 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 329 reg |= PLUM_VIDEO_PLGMD_8BPP; 330 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 331 #if notyet 332 /* change BitBlt color depth */ 333 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 334 #endif 335 /* FALLTHROUGH */ 336 case PLUM_VIDEO_PLGMD_8BPP: 337 bpp = 8; 338 break; 339 } 340 chip->vc_fbdepth = bpp; 341 342 /* 343 * Get display size from WindowsCE setted. 344 */ 345 chip->vc_fbwidth = width = bootinfo->fb_width = 346 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 347 chip->vc_fbheight = height = bootinfo->fb_height = 348 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 349 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 350 351 /* 352 * set line byte length to bootinfo and LCD controller. 353 */ 354 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 355 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 356 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 357 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 358 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 359 360 /* 361 * boot messages and map CLUT(if any). 362 */ 363 printf("display mode: "); 364 switch (bpp) { 365 default: 366 printf("disabled "); 367 break; 368 case 8: 369 printf("8bpp "); 370 /* map CLUT area */ 371 if (bus_space_map(sc->sc_clutiot, 372 PLUM_VIDEO_CLUT_LCD_IOBASE, 373 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 374 &sc->sc_clutioh)) { 375 printf(": CLUT map failed\n"); 376 return (1); 377 } 378 /* install default CLUT */ 379 plumvideo_clut_default(sc); 380 break; 381 case 16: 382 printf("16bpp "); 383 break; 384 } 385 386 /* 387 * calcurate frame buffer size. 388 */ 389 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 390 vram_size = (width * height * bpp) / NBBY; 391 vram_size = mips_round_page(vram_size); 392 chip->vc_fbsize = vram_size; 393 394 /* 395 * map V-RAM area. 396 */ 397 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 398 vram_size, 0, &sc->sc_fbioh)) { 399 printf(": V-RAM map failed\n"); 400 return (1); 401 } 402 403 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 404 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 405 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 406 407 return (0); 408 } 409 410 int 411 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 412 { 413 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 414 struct hpcfb_fbconf *fbconf; 415 struct hpcfb_dspconf *dspconf; 416 struct wsdisplay_cmap *cmap; 417 u_int8_t *r, *g, *b; 418 u_int32_t *rgb; 419 int idx, cnt, error; 420 421 switch (cmd) { 422 case WSDISPLAYIO_GETCMAP: 423 cmap = (struct wsdisplay_cmap*)data; 424 cnt = cmap->count; 425 idx = cmap->index; 426 427 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 428 sc->sc_fbconf.hf_pack_width != 8 || 429 !LEGAL_CLUT_INDEX(idx) || 430 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 431 return (EINVAL); 432 } 433 434 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 435 !uvm_useracc(cmap->green, cnt, B_WRITE) || 436 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 437 return (EFAULT); 438 } 439 440 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 441 if (error != 0) { 442 cmap_work_free(r, g, b, rgb); 443 return (ENOMEM); 444 } 445 plumvideo_clut_get(sc, rgb, idx, cnt); 446 rgb24_decompose(rgb, r, g, b, cnt); 447 448 copyout(r, cmap->red, cnt); 449 copyout(g, cmap->green,cnt); 450 copyout(b, cmap->blue, cnt); 451 452 cmap_work_free(r, g, b, rgb); 453 454 return (0); 455 456 case WSDISPLAYIO_PUTCMAP: 457 cmap = (struct wsdisplay_cmap*)data; 458 cnt = cmap->count; 459 idx = cmap->index; 460 461 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 462 sc->sc_fbconf.hf_pack_width != 8 || 463 !LEGAL_CLUT_INDEX(idx) || 464 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 465 return (EINVAL); 466 } 467 468 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 469 !uvm_useracc(cmap->green, cnt, B_WRITE) || 470 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 471 return (EFAULT); 472 } 473 474 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 475 if (error != 0) { 476 cmap_work_free(r, g, b, rgb); 477 return (ENOMEM); 478 } 479 rgb24_compose(rgb, r, g, b, cnt); 480 plumvideo_clut_set(sc, rgb, idx, cnt); 481 482 cmap_work_free(r, g, b, rgb); 483 484 return (0); 485 486 case HPCFBIO_GCONF: 487 fbconf = (struct hpcfb_fbconf *)data; 488 if (fbconf->hf_conf_index != 0 && 489 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 490 return (EINVAL); 491 } 492 *fbconf = sc->sc_fbconf; /* structure assignment */ 493 return (0); 494 495 case HPCFBIO_SCONF: 496 fbconf = (struct hpcfb_fbconf *)data; 497 if (fbconf->hf_conf_index != 0 && 498 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 499 return (EINVAL); 500 } 501 /* 502 * nothing to do because we have only one configration 503 */ 504 return (0); 505 506 case HPCFBIO_GDSPCONF: 507 dspconf = (struct hpcfb_dspconf *)data; 508 if ((dspconf->hd_unit_index != 0 && 509 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 510 (dspconf->hd_conf_index != 0 && 511 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 512 return (EINVAL); 513 } 514 *dspconf = sc->sc_dspconf; /* structure assignment */ 515 return (0); 516 517 case HPCFBIO_SDSPCONF: 518 dspconf = (struct hpcfb_dspconf *)data; 519 if ((dspconf->hd_unit_index != 0 && 520 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 521 (dspconf->hd_conf_index != 0 && 522 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 523 return (EINVAL); 524 } 525 /* 526 * nothing to do 527 * because we have only one unit and one configration 528 */ 529 return (0); 530 531 case HPCFBIO_GOP: 532 case HPCFBIO_SOP: 533 /* XXX not implemented yet */ 534 return (EINVAL); 535 } 536 537 return (ENOTTY); 538 } 539 540 paddr_t 541 plumvideo_mmap(void *ctx, off_t offset, int prot) 542 { 543 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 544 545 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 546 sc->sc_fbconf.hf_offset) < offset) { 547 return (-1); 548 } 549 550 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 551 } 552 553 void 554 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 555 int cnt) 556 { 557 static void __plumvideo_clut_get(bus_space_tag_t, 558 bus_space_handle_t); 559 static void __plumvideo_clut_get(iot, ioh) 560 bus_space_tag_t iot; 561 bus_space_handle_t ioh; 562 { 563 int i; 564 565 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 566 *rgb++ = bus_space_read_4(iot, ioh, beg) & 567 0x00ffffff; 568 } 569 } 570 571 KASSERT(rgb); 572 KASSERT(LEGAL_CLUT_INDEX(beg)); 573 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 574 __plumvideo_clut_access(sc, __plumvideo_clut_get); 575 } 576 577 void 578 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 579 int cnt) 580 { 581 static void __plumvideo_clut_set(bus_space_tag_t, 582 bus_space_handle_t); 583 static void __plumvideo_clut_set(iot, ioh) 584 bus_space_tag_t iot; 585 bus_space_handle_t ioh; 586 { 587 int i; 588 589 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 590 bus_space_write_4(iot, ioh, beg, 591 *rgb++ & 0x00ffffff); 592 } 593 } 594 595 KASSERT(rgb); 596 KASSERT(LEGAL_CLUT_INDEX(beg)); 597 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 598 __plumvideo_clut_access(sc, __plumvideo_clut_set); 599 } 600 601 void 602 plumvideo_clut_default(struct plumvideo_softc *sc) 603 { 604 static void __plumvideo_clut_default(bus_space_tag_t, 605 bus_space_handle_t); 606 static void __plumvideo_clut_default(iot, ioh) 607 bus_space_tag_t iot; 608 bus_space_handle_t ioh; 609 { 610 const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 611 const u_int32_t ansi_color[16] = { 612 0x000000, 0xff0000, 0x00ff00, 0xffff00, 613 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 614 0x000000, 0x800000, 0x008000, 0x808000, 615 0x000080, 0x800080, 0x008080, 0x808080, 616 }; 617 int i, r, g, b; 618 619 /* ANSI escape sequence */ 620 for (i = 0; i < 16; i++) { 621 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 622 } 623 /* 16 - 31, gray scale */ 624 for ( ; i < 32; i++) { 625 int j = (i - 16) * 17; 626 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 627 } 628 /* 32 - 247, RGB color */ 629 for (r = 0; r < 6; r++) { 630 for (g = 0; g < 6; g++) { 631 for (b = 0; b < 6; b++) { 632 bus_space_write_4(iot, ioh, i << 2, 633 RGB24(compo6[r], 634 compo6[g], 635 compo6[b])); 636 i++; 637 } 638 } 639 } 640 /* 248 - 245, just white */ 641 for ( ; i < 256; i++) { 642 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 643 } 644 } 645 646 __plumvideo_clut_access(sc, __plumvideo_clut_default); 647 } 648 649 void 650 __plumvideo_clut_access(struct plumvideo_softc *sc, void (*palette_func) 651 (bus_space_tag_t, bus_space_handle_t)) 652 { 653 bus_space_tag_t regt = sc->sc_regt; 654 bus_space_handle_t regh = sc->sc_regh; 655 plumreg_t val, gmode; 656 657 /* display off */ 658 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 659 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 660 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 661 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 662 663 /* palette access disable */ 664 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 665 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 666 667 /* change palette mode to CPU */ 668 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 669 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 670 671 /* palette access */ 672 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh); 673 674 /* change palette mode to Display */ 675 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 676 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 677 678 /* palette access enable */ 679 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 680 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 681 682 /* display on */ 683 val |= gmode; 684 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 685 } 686 687 /* !!! */ 688 static void 689 _flush_cache() 690 { 691 MachFlushCache(); 692 } 693 694 int 695 plumvideo_power(void *ctx, int type, long id, void *msg) 696 { 697 struct plumvideo_softc *sc = ctx; 698 plum_chipset_tag_t pc = sc->sc_pc; 699 bus_space_tag_t regt = sc->sc_regt; 700 bus_space_handle_t regh = sc->sc_regh; 701 int why = (int)msg; 702 703 switch (why) { 704 case PWR_RESUME: 705 if (!sc->sc_console) 706 return 0; /* serial console */ 707 708 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 709 /* power on */ 710 /* LCD power on and display on */ 711 plum_power_establish(pc, PLUM_PWR_LCD); 712 /* back-light on */ 713 plum_power_establish(pc, PLUM_PWR_BKL); 714 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 715 PLUM_VIDEO_PLLUM_MAX); 716 break; 717 case PWR_SUSPEND: 718 /* FALLTHROUGH */ 719 case PWR_STANDBY: 720 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 721 /* back-light off */ 722 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 723 PLUM_VIDEO_PLLUM_MIN); 724 plum_power_disestablish(pc, PLUM_PWR_BKL); 725 /* power down */ 726 plum_power_disestablish(pc, PLUM_PWR_LCD); 727 break; 728 } 729 730 return 0; 731 } 732 733 #ifdef PLUMVIDEODEBUG 734 void 735 plumvideo_dump(struct plumvideo_softc *sc) 736 { 737 bus_space_tag_t regt = sc->sc_regt; 738 bus_space_handle_t regh = sc->sc_regh; 739 740 plumreg_t reg; 741 int i; 742 743 for (i = 0; i < 0x160; i += 4) { 744 reg = plum_conf_read(regt, regh, i); 745 printf("0x%03x %08x", i, reg); 746 bitdisp(reg); 747 } 748 } 749 #endif /* PLUMVIDEODEBUG */ 750
Indexes created Fri Sep 26 08:10:20 GMT 2025