plumvideo.c revision 1.19
1 /* $NetBSD: plumvideo.c,v 1.19 2001/07/22 09:56:41 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #undef PLUMVIDEODEBUG 40 #include "opt_tx39_debug.h" 41 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <sys/ioctl.h> 48 #include <sys/buf.h> 49 #include <uvm/uvm_extern.h> 50 51 #include <dev/cons.h> /* consdev */ 52 53 #include <machine/bus.h> 54 #include <machine/intr.h> 55 #include <machine/config_hook.h> 56 57 #include <hpcmips/tx/tx39var.h> 58 #include <hpcmips/dev/plumvar.h> 59 #include <hpcmips/dev/plumicuvar.h> 60 #include <hpcmips/dev/plumpowervar.h> 61 #include <hpcmips/dev/plumvideoreg.h> 62 63 #include <machine/bootinfo.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/rasops/rasops.h> 67 #include <dev/hpc/video_subr.h> 68 69 #include <dev/wscons/wsconsio.h> 70 #include <dev/hpc/hpcfbvar.h> 71 #include <dev/hpc/hpcfbio.h> 72 73 #ifdef PLUMVIDEODEBUG 74 int plumvideo_debug = 1; 75 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 76 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 77 #else 78 #define DPRINTF(arg) 79 #define DPRINTFN(n, arg) 80 #endif 81 82 struct plumvideo_softc { 83 struct device sc_dev; 84 tx_chipset_tag_t sc_tc; 85 plum_chipset_tag_t sc_pc; 86 87 void *sc_powerhook; /* power management hook */ 88 int sc_console; 89 90 /* control register */ 91 bus_space_tag_t sc_regt; 92 bus_space_handle_t sc_regh; 93 /* frame buffer */ 94 bus_space_tag_t sc_fbiot; 95 bus_space_handle_t sc_fbioh; 96 /* clut buffer (8bpp only) */ 97 bus_space_tag_t sc_clutiot; 98 bus_space_handle_t sc_clutioh; 99 /* bitblt */ 100 bus_space_tag_t sc_bitbltt; 101 bus_space_handle_t sc_bitblth; 102 103 struct video_chip sc_chip; 104 struct hpcfb_fbconf sc_fbconf; 105 struct hpcfb_dspconf sc_dspconf; 106 }; 107 108 int plumvideo_match(struct device*, struct cfdata*, void*); 109 void plumvideo_attach(struct device*, struct device*, void*); 110 111 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 112 paddr_t plumvideo_mmap(void *, off_t, int); 113 114 struct cfattach plumvideo_ca = { 115 sizeof(struct plumvideo_softc), plumvideo_match, plumvideo_attach 116 }; 117 118 struct hpcfb_accessops plumvideo_ha = { 119 plumvideo_ioctl, plumvideo_mmap 120 }; 121 122 int plumvideo_power(void *, int, long, void *); 123 124 int plumvideo_init(struct plumvideo_softc *, int *); 125 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 126 127 void plumvideo_clut_default(struct plumvideo_softc *); 128 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 129 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 130 void __plumvideo_clut_access(struct plumvideo_softc *, 131 void (*)(bus_space_tag_t, bus_space_handle_t)); 132 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 133 134 #ifdef PLUMVIDEODEBUG 135 void plumvideo_dump(struct plumvideo_softc*); 136 #endif 137 138 #define ON 1 139 #define OFF 0 140 141 int 142 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 143 { 144 /* 145 * VRAM area also uses as UHOSTC shared RAM. 146 */ 147 return (2); /* 1st attach group */ 148 } 149 150 void 151 plumvideo_attach(struct device *parent, struct device *self, void *aux) 152 { 153 struct plum_attach_args *pa = aux; 154 struct plumvideo_softc *sc = (void*)self; 155 struct hpcfb_attach_args ha; 156 int console, reverse_flag; 157 158 sc->sc_console = console = cn_tab ? 0 : 1; 159 sc->sc_pc = pa->pa_pc; 160 sc->sc_regt = pa->pa_regt; 161 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 162 163 printf(": "); 164 165 /* map register area */ 166 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 167 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 168 printf("register map failed\n"); 169 return; 170 } 171 172 /* power control */ 173 plumvideo_power(sc, 0, 0, 174 (void *)(console ? PWR_RESUME : PWR_SUSPEND)); 175 /* Add a hard power hook to power saving */ 176 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 177 CONFIG_HOOK_PMEVENT_HARDPOWER, 178 CONFIG_HOOK_SHARE, 179 plumvideo_power, sc); 180 if (sc->sc_powerhook == 0) 181 printf("WARNING unable to establish hard power hook"); 182 183 /* 184 * Initialize LCD controller 185 * map V-RAM area. 186 * reinstall bootinfo structure. 187 * some OHCI shared-buffer hack. XXX 188 */ 189 if (plumvideo_init(sc, &reverse_flag) != 0) 190 return; 191 192 printf("\n"); 193 194 /* Attach frame buffer device */ 195 plumvideo_hpcfbinit(sc, reverse_flag); 196 197 #ifdef PLUMVIDEODEBUG 198 if (plumvideo_debug > 0) 199 plumvideo_dump(sc); 200 /* attach debug draw routine (debugging use) */ 201 video_attach_drawfunc(&sc->sc_chip); 202 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 203 #endif /* PLUMVIDEODEBUG */ 204 205 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 206 panic("plumvideo_attach: can't init fb console"); 207 } 208 209 ha.ha_console = console; 210 ha.ha_accessops = &plumvideo_ha; 211 ha.ha_accessctx = sc; 212 ha.ha_curfbconf = 0; 213 ha.ha_nfbconf = 1; 214 ha.ha_fbconflist = &sc->sc_fbconf; 215 ha.ha_curdspconf = 0; 216 ha.ha_ndspconf = 1; 217 ha.ha_dspconflist = &sc->sc_dspconf; 218 219 config_found(self, &ha, hpcfbprint); 220 } 221 222 void 223 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 224 { 225 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 226 struct video_chip *chip = &sc->sc_chip; 227 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 228 int height = chip->vc_fbheight; 229 int width = chip->vc_fbwidth; 230 int depth = chip->vc_fbdepth; 231 232 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 233 234 fb->hf_conf_index = 0; /* configuration index */ 235 fb->hf_nconfs = 1; /* how many configurations */ 236 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 237 /* frame buffer name */ 238 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 239 /* configuration name */ 240 fb->hf_height = height; 241 fb->hf_width = width; 242 fb->hf_baseaddr = (u_long)fbvaddr; 243 fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); 244 /* frame buffer start offset */ 245 fb->hf_bytes_per_line = (width * depth) / NBBY; 246 fb->hf_nplanes = 1; 247 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 248 249 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 250 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 251 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 252 if (reverse_flag) 253 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 254 255 switch (depth) { 256 default: 257 panic("plumvideo_hpcfbinit: not supported color depth\n"); 258 /* NOTREACHED */ 259 case 16: 260 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 261 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 262 fb->hf_order_flags = HPCFB_REVORDER_BYTE; 263 fb->hf_pack_width = 16; 264 fb->hf_pixels_per_pack = 1; 265 fb->hf_pixel_width = 16; 266 267 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 268 /* reserved for future use */ 269 fb->hf_u.hf_rgb.hf_flags = 0; 270 271 fb->hf_u.hf_rgb.hf_red_width = 5; 272 fb->hf_u.hf_rgb.hf_red_shift = 11; 273 fb->hf_u.hf_rgb.hf_green_width = 6; 274 fb->hf_u.hf_rgb.hf_green_shift = 5; 275 fb->hf_u.hf_rgb.hf_blue_width = 5; 276 fb->hf_u.hf_rgb.hf_blue_shift = 0; 277 fb->hf_u.hf_rgb.hf_alpha_width = 0; 278 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 279 break; 280 281 case 8: 282 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 283 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 284 fb->hf_pack_width = 8; 285 fb->hf_pixels_per_pack = 1; 286 fb->hf_pixel_width = 8; 287 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 288 /* reserved for future use */ 289 fb->hf_u.hf_indexed.hf_flags = 0; 290 break; 291 } 292 } 293 294 int 295 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 296 { 297 struct video_chip *chip = &sc->sc_chip; 298 bus_space_tag_t regt = sc->sc_regt; 299 bus_space_handle_t regh = sc->sc_regh; 300 plumreg_t reg; 301 size_t vram_size; 302 int bpp, width, height, vram_pitch; 303 304 *reverse = video_reverse_color(); 305 chip->vc_v = sc->sc_pc->pc_tc; 306 #if notyet 307 /* map BitBlt area */ 308 if (bus_space_map(sc->sc_bitbltt, 309 PLUM_VIDEO_BITBLT_IOBASE, 310 PLUM_VIDEO_BITBLT_IOSIZE, 0, 311 &sc->sc_bitblth)) { 312 printf(": BitBlt map failed\n"); 313 return (1); 314 } 315 #endif 316 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 317 318 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 319 case PLUM_VIDEO_PLGMD_16BPP: 320 #if NPLUMOHCI > 0 /* reserve V-RAM area for USB OHCI */ 321 /* FALLTHROUGH */ 322 #else 323 bpp = 16; 324 break; 325 #endif 326 default: 327 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 328 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 329 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 330 reg |= PLUM_VIDEO_PLGMD_8BPP; 331 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 332 #if notyet 333 /* change BitBlt color depth */ 334 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 335 #endif 336 /* FALLTHROUGH */ 337 case PLUM_VIDEO_PLGMD_8BPP: 338 bpp = 8; 339 break; 340 } 341 chip->vc_fbdepth = bpp; 342 343 /* 344 * Get display size from WindowsCE setted. 345 */ 346 chip->vc_fbwidth = width = bootinfo->fb_width = 347 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 348 chip->vc_fbheight = height = bootinfo->fb_height = 349 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 350 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 351 352 /* 353 * set line byte length to bootinfo and LCD controller. 354 */ 355 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 356 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 357 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 358 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 359 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 360 361 /* 362 * boot messages and map CLUT(if any). 363 */ 364 printf("display mode: "); 365 switch (bpp) { 366 default: 367 printf("disabled "); 368 break; 369 case 8: 370 printf("8bpp "); 371 /* map CLUT area */ 372 if (bus_space_map(sc->sc_clutiot, 373 PLUM_VIDEO_CLUT_LCD_IOBASE, 374 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 375 &sc->sc_clutioh)) { 376 printf(": CLUT map failed\n"); 377 return (1); 378 } 379 /* install default CLUT */ 380 plumvideo_clut_default(sc); 381 break; 382 case 16: 383 printf("16bpp "); 384 break; 385 } 386 387 /* 388 * calcurate frame buffer size. 389 */ 390 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 391 vram_size = (width * height * bpp) / NBBY; 392 vram_size = mips_round_page(vram_size); 393 chip->vc_fbsize = vram_size; 394 395 /* 396 * map V-RAM area. 397 */ 398 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 399 vram_size, 0, &sc->sc_fbioh)) { 400 printf(": V-RAM map failed\n"); 401 return (1); 402 } 403 404 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 405 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 406 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 407 408 return (0); 409 } 410 411 int 412 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 413 { 414 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 415 struct hpcfb_fbconf *fbconf; 416 struct hpcfb_dspconf *dspconf; 417 struct wsdisplay_cmap *cmap; 418 u_int8_t *r, *g, *b; 419 u_int32_t *rgb; 420 int idx, cnt, error; 421 422 switch (cmd) { 423 case WSDISPLAYIO_GETCMAP: 424 cmap = (struct wsdisplay_cmap*)data; 425 cnt = cmap->count; 426 idx = cmap->index; 427 428 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 429 sc->sc_fbconf.hf_pack_width != 8 || 430 !LEGAL_CLUT_INDEX(idx) || 431 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 432 return (EINVAL); 433 } 434 435 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 436 !uvm_useracc(cmap->green, cnt, B_WRITE) || 437 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 438 return (EFAULT); 439 } 440 441 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 442 if (error != 0) { 443 cmap_work_free(r, g, b, rgb); 444 return (ENOMEM); 445 } 446 plumvideo_clut_get(sc, rgb, idx, cnt); 447 rgb24_decompose(rgb, r, g, b, cnt); 448 449 copyout(r, cmap->red, cnt); 450 copyout(g, cmap->green,cnt); 451 copyout(b, cmap->blue, cnt); 452 453 cmap_work_free(r, g, b, rgb); 454 455 return (0); 456 457 case WSDISPLAYIO_PUTCMAP: 458 cmap = (struct wsdisplay_cmap*)data; 459 cnt = cmap->count; 460 idx = cmap->index; 461 462 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 463 sc->sc_fbconf.hf_pack_width != 8 || 464 !LEGAL_CLUT_INDEX(idx) || 465 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 466 return (EINVAL); 467 } 468 469 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 470 !uvm_useracc(cmap->green, cnt, B_WRITE) || 471 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 472 return (EFAULT); 473 } 474 475 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 476 if (error != 0) { 477 cmap_work_free(r, g, b, rgb); 478 return (ENOMEM); 479 } 480 copyin(cmap->red, r, cnt); 481 copyin(cmap->green, g, cnt); 482 copyin(cmap->blue, b, cnt); 483 rgb24_compose(rgb, r, g, b, cnt); 484 plumvideo_clut_set(sc, rgb, idx, cnt); 485 486 cmap_work_free(r, g, b, rgb); 487 488 return (0); 489 490 case HPCFBIO_GCONF: 491 fbconf = (struct hpcfb_fbconf *)data; 492 if (fbconf->hf_conf_index != 0 && 493 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 494 return (EINVAL); 495 } 496 *fbconf = sc->sc_fbconf; /* structure assignment */ 497 return (0); 498 499 case HPCFBIO_SCONF: 500 fbconf = (struct hpcfb_fbconf *)data; 501 if (fbconf->hf_conf_index != 0 && 502 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 503 return (EINVAL); 504 } 505 /* 506 * nothing to do because we have only one configration 507 */ 508 return (0); 509 510 case HPCFBIO_GDSPCONF: 511 dspconf = (struct hpcfb_dspconf *)data; 512 if ((dspconf->hd_unit_index != 0 && 513 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 514 (dspconf->hd_conf_index != 0 && 515 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 516 return (EINVAL); 517 } 518 *dspconf = sc->sc_dspconf; /* structure assignment */ 519 return (0); 520 521 case HPCFBIO_SDSPCONF: 522 dspconf = (struct hpcfb_dspconf *)data; 523 if ((dspconf->hd_unit_index != 0 && 524 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 525 (dspconf->hd_conf_index != 0 && 526 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 527 return (EINVAL); 528 } 529 /* 530 * nothing to do 531 * because we have only one unit and one configration 532 */ 533 return (0); 534 535 case HPCFBIO_GOP: 536 case HPCFBIO_SOP: 537 /* XXX not implemented yet */ 538 return (EINVAL); 539 } 540 541 return (ENOTTY); 542 } 543 544 paddr_t 545 plumvideo_mmap(void *ctx, off_t offset, int prot) 546 { 547 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 548 549 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 550 sc->sc_fbconf.hf_offset) < offset) { 551 return (-1); 552 } 553 554 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 555 } 556 557 void 558 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 559 int cnt) 560 { 561 static void __plumvideo_clut_get(bus_space_tag_t, 562 bus_space_handle_t); 563 static void __plumvideo_clut_get(iot, ioh) 564 bus_space_tag_t iot; 565 bus_space_handle_t ioh; 566 { 567 int i; 568 569 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 570 *rgb++ = bus_space_read_4(iot, ioh, beg) & 571 0x00ffffff; 572 } 573 } 574 575 KASSERT(rgb); 576 KASSERT(LEGAL_CLUT_INDEX(beg)); 577 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 578 __plumvideo_clut_access(sc, __plumvideo_clut_get); 579 } 580 581 void 582 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 583 int cnt) 584 { 585 static void __plumvideo_clut_set(bus_space_tag_t, 586 bus_space_handle_t); 587 static void __plumvideo_clut_set(iot, ioh) 588 bus_space_tag_t iot; 589 bus_space_handle_t ioh; 590 { 591 int i; 592 593 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 594 bus_space_write_4(iot, ioh, beg, 595 *rgb++ & 0x00ffffff); 596 } 597 } 598 599 KASSERT(rgb); 600 KASSERT(LEGAL_CLUT_INDEX(beg)); 601 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 602 __plumvideo_clut_access(sc, __plumvideo_clut_set); 603 } 604 605 void 606 plumvideo_clut_default(struct plumvideo_softc *sc) 607 { 608 static void __plumvideo_clut_default(bus_space_tag_t, 609 bus_space_handle_t); 610 static void __plumvideo_clut_default(iot, ioh) 611 bus_space_tag_t iot; 612 bus_space_handle_t ioh; 613 { 614 const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 615 const u_int32_t ansi_color[16] = { 616 0x000000, 0xff0000, 0x00ff00, 0xffff00, 617 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 618 0x000000, 0x800000, 0x008000, 0x808000, 619 0x000080, 0x800080, 0x008080, 0x808080, 620 }; 621 int i, r, g, b; 622 623 /* ANSI escape sequence */ 624 for (i = 0; i < 16; i++) { 625 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 626 } 627 /* 16 - 31, gray scale */ 628 for ( ; i < 32; i++) { 629 int j = (i - 16) * 17; 630 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 631 } 632 /* 32 - 247, RGB color */ 633 for (r = 0; r < 6; r++) { 634 for (g = 0; g < 6; g++) { 635 for (b = 0; b < 6; b++) { 636 bus_space_write_4(iot, ioh, i << 2, 637 RGB24(compo6[r], 638 compo6[g], 639 compo6[b])); 640 i++; 641 } 642 } 643 } 644 /* 248 - 245, just white */ 645 for ( ; i < 256; i++) { 646 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 647 } 648 } 649 650 __plumvideo_clut_access(sc, __plumvideo_clut_default); 651 } 652 653 void 654 __plumvideo_clut_access(struct plumvideo_softc *sc, void (*palette_func) 655 (bus_space_tag_t, bus_space_handle_t)) 656 { 657 bus_space_tag_t regt = sc->sc_regt; 658 bus_space_handle_t regh = sc->sc_regh; 659 plumreg_t val, gmode; 660 661 /* display off */ 662 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 663 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 664 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 665 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 666 667 /* palette access disable */ 668 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 669 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 670 671 /* change palette mode to CPU */ 672 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 673 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 674 675 /* palette access */ 676 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh); 677 678 /* change palette mode to Display */ 679 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 680 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 681 682 /* palette access enable */ 683 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 684 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 685 686 /* display on */ 687 val |= gmode; 688 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 689 } 690 691 /* !!! */ 692 static void 693 _flush_cache() 694 { 695 MachFlushCache(); 696 } 697 698 int 699 plumvideo_power(void *ctx, int type, long id, void *msg) 700 { 701 struct plumvideo_softc *sc = ctx; 702 plum_chipset_tag_t pc = sc->sc_pc; 703 bus_space_tag_t regt = sc->sc_regt; 704 bus_space_handle_t regh = sc->sc_regh; 705 int why = (int)msg; 706 707 switch (why) { 708 case PWR_RESUME: 709 if (!sc->sc_console) 710 return 0; /* serial console */ 711 712 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 713 /* power on */ 714 /* LCD power on and display on */ 715 plum_power_establish(pc, PLUM_PWR_LCD); 716 /* back-light on */ 717 plum_power_establish(pc, PLUM_PWR_BKL); 718 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 719 PLUM_VIDEO_PLLUM_MAX); 720 break; 721 case PWR_SUSPEND: 722 /* FALLTHROUGH */ 723 case PWR_STANDBY: 724 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 725 /* back-light off */ 726 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 727 PLUM_VIDEO_PLLUM_MIN); 728 plum_power_disestablish(pc, PLUM_PWR_BKL); 729 /* power down */ 730 plum_power_disestablish(pc, PLUM_PWR_LCD); 731 break; 732 } 733 734 return 0; 735 } 736 737 #ifdef PLUMVIDEODEBUG 738 void 739 plumvideo_dump(struct plumvideo_softc *sc) 740 { 741 bus_space_tag_t regt = sc->sc_regt; 742 bus_space_handle_t regh = sc->sc_regh; 743 744 plumreg_t reg; 745 int i; 746 747 for (i = 0; i < 0x160; i += 4) { 748 reg = plum_conf_read(regt, regh, i); 749 printf("0x%03x %08x", i, reg); 750 bitdisp(reg); 751 } 752 } 753 #endif /* PLUMVIDEODEBUG */ 754
Indexes created Sat Sep 27 22:09:54 GMT 2025