plumvideo.c revision 1.25
1 /* $NetBSD: plumvideo.c,v 1.25 2002/03/06 15:01:05 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #undef PLUMVIDEODEBUG 40 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 41 #include "bivideo.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <sys/ioctl.h> 48 #include <sys/buf.h> 49 #include <uvm/uvm_extern.h> 50 51 #include <dev/cons.h> /* consdev */ 52 53 #include <mips/cache.h> 54 55 #include <machine/bus.h> 56 #include <machine/intr.h> 57 #include <machine/config_hook.h> 58 59 #include <hpcmips/tx/tx39var.h> 60 #include <hpcmips/dev/plumvar.h> 61 #include <hpcmips/dev/plumicuvar.h> 62 #include <hpcmips/dev/plumpowervar.h> 63 #include <hpcmips/dev/plumvideoreg.h> 64 65 #include <machine/bootinfo.h> 66 67 #include <dev/wscons/wsdisplayvar.h> 68 #include <dev/rasops/rasops.h> 69 #include <dev/hpc/video_subr.h> 70 71 #include <dev/wscons/wsconsio.h> 72 #include <dev/hpc/hpcfbvar.h> 73 #include <dev/hpc/hpcfbio.h> 74 #if NBIVIDEO > 0 75 #include <dev/hpc/bivideovar.h> 76 #endif 77 78 #ifdef PLUMVIDEODEBUG 79 int plumvideo_debug = 1; 80 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 81 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 82 #else 83 #define DPRINTF(arg) 84 #define DPRINTFN(n, arg) 85 #endif 86 87 struct plumvideo_softc { 88 struct device sc_dev; 89 tx_chipset_tag_t sc_tc; 90 plum_chipset_tag_t sc_pc; 91 92 void *sc_powerhook; /* power management hook */ 93 int sc_console; 94 95 /* control register */ 96 bus_space_tag_t sc_regt; 97 bus_space_handle_t sc_regh; 98 /* frame buffer */ 99 bus_space_tag_t sc_fbiot; 100 bus_space_handle_t sc_fbioh; 101 /* clut buffer (8bpp only) */ 102 bus_space_tag_t sc_clutiot; 103 bus_space_handle_t sc_clutioh; 104 /* bitblt */ 105 bus_space_tag_t sc_bitbltt; 106 bus_space_handle_t sc_bitblth; 107 108 struct video_chip sc_chip; 109 struct hpcfb_fbconf sc_fbconf; 110 struct hpcfb_dspconf sc_dspconf; 111 }; 112 113 int plumvideo_match(struct device*, struct cfdata*, void*); 114 void plumvideo_attach(struct device*, struct device*, void*); 115 116 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 117 paddr_t plumvideo_mmap(void *, off_t, int); 118 119 struct cfattach plumvideo_ca = { 120 sizeof(struct plumvideo_softc), plumvideo_match, plumvideo_attach 121 }; 122 123 struct hpcfb_accessops plumvideo_ha = { 124 plumvideo_ioctl, plumvideo_mmap 125 }; 126 127 int plumvideo_power(void *, int, long, void *); 128 129 int plumvideo_init(struct plumvideo_softc *, int *); 130 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 131 132 void plumvideo_clut_default(struct plumvideo_softc *); 133 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 134 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 135 void __plumvideo_clut_access(struct plumvideo_softc *, 136 void (*)(bus_space_tag_t, bus_space_handle_t)); 137 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 138 139 #ifdef PLUMVIDEODEBUG 140 void plumvideo_dump(struct plumvideo_softc*); 141 #endif 142 143 #define ON 1 144 #define OFF 0 145 146 int 147 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 148 { 149 /* 150 * VRAM area also uses as UHOSTC shared RAM. 151 */ 152 return (2); /* 1st attach group */ 153 } 154 155 void 156 plumvideo_attach(struct device *parent, struct device *self, void *aux) 157 { 158 struct plum_attach_args *pa = aux; 159 struct plumvideo_softc *sc = (void*)self; 160 struct hpcfb_attach_args ha; 161 int console, reverse_flag; 162 163 sc->sc_console = console = cn_tab ? 0 : 1; 164 sc->sc_pc = pa->pa_pc; 165 sc->sc_regt = pa->pa_regt; 166 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 167 168 printf(": "); 169 170 /* map register area */ 171 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 172 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 173 printf("register map failed\n"); 174 return; 175 } 176 177 /* power control */ 178 plumvideo_power(sc, 0, 0, 179 (void *)(console ? PWR_RESUME : PWR_SUSPEND)); 180 /* Add a hard power hook to power saving */ 181 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 182 CONFIG_HOOK_PMEVENT_HARDPOWER, 183 CONFIG_HOOK_SHARE, 184 plumvideo_power, sc); 185 if (sc->sc_powerhook == 0) 186 printf("WARNING unable to establish hard power hook"); 187 188 /* 189 * Initialize LCD controller 190 * map V-RAM area. 191 * reinstall bootinfo structure. 192 * some OHCI shared-buffer hack. XXX 193 */ 194 if (plumvideo_init(sc, &reverse_flag) != 0) 195 return; 196 197 printf("\n"); 198 199 /* Attach frame buffer device */ 200 plumvideo_hpcfbinit(sc, reverse_flag); 201 202 #ifdef PLUMVIDEODEBUG 203 if (plumvideo_debug > 0) 204 plumvideo_dump(sc); 205 /* attach debug draw routine (debugging use) */ 206 video_attach_drawfunc(&sc->sc_chip); 207 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 208 #endif /* PLUMVIDEODEBUG */ 209 210 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 211 panic("plumvideo_attach: can't init fb console"); 212 } 213 214 ha.ha_console = console; 215 ha.ha_accessops = &plumvideo_ha; 216 ha.ha_accessctx = sc; 217 ha.ha_curfbconf = 0; 218 ha.ha_nfbconf = 1; 219 ha.ha_fbconflist = &sc->sc_fbconf; 220 ha.ha_curdspconf = 0; 221 ha.ha_ndspconf = 1; 222 ha.ha_dspconflist = &sc->sc_dspconf; 223 224 config_found(self, &ha, hpcfbprint); 225 #if NBIVIDEO > 0 226 /* bivideo is no longer need */ 227 bivideo_dont_attach = 1; 228 #endif /* NBIVIDEO > 0 */ 229 } 230 231 void 232 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 233 { 234 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 235 struct video_chip *chip = &sc->sc_chip; 236 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 237 int height = chip->vc_fbheight; 238 int width = chip->vc_fbwidth; 239 int depth = chip->vc_fbdepth; 240 241 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 242 243 fb->hf_conf_index = 0; /* configuration index */ 244 fb->hf_nconfs = 1; /* how many configurations */ 245 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 246 /* frame buffer name */ 247 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 248 /* configuration name */ 249 fb->hf_height = height; 250 fb->hf_width = width; 251 fb->hf_baseaddr = (u_long)fbvaddr; 252 fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); 253 /* frame buffer start offset */ 254 fb->hf_bytes_per_line = (width * depth) / NBBY; 255 fb->hf_nplanes = 1; 256 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 257 258 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 259 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 260 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 261 if (reverse_flag) 262 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 263 264 switch (depth) { 265 default: 266 panic("plumvideo_hpcfbinit: not supported color depth\n"); 267 /* NOTREACHED */ 268 case 16: 269 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 270 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 271 fb->hf_order_flags = HPCFB_REVORDER_WORD; 272 fb->hf_pack_width = 16; 273 fb->hf_pixels_per_pack = 1; 274 fb->hf_pixel_width = 16; 275 276 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 277 /* reserved for future use */ 278 fb->hf_u.hf_rgb.hf_flags = 0; 279 280 fb->hf_u.hf_rgb.hf_red_width = 5; 281 fb->hf_u.hf_rgb.hf_red_shift = 11; 282 fb->hf_u.hf_rgb.hf_green_width = 6; 283 fb->hf_u.hf_rgb.hf_green_shift = 5; 284 fb->hf_u.hf_rgb.hf_blue_width = 5; 285 fb->hf_u.hf_rgb.hf_blue_shift = 0; 286 fb->hf_u.hf_rgb.hf_alpha_width = 0; 287 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 288 break; 289 290 case 8: 291 fb->hf_order_flags = HPCFB_REVORDER_BYTE | HPCFB_REVORDER_WORD; 292 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 293 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 294 fb->hf_pack_width = 8; 295 fb->hf_pixels_per_pack = 1; 296 fb->hf_pixel_width = 8; 297 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 298 /* reserved for future use */ 299 fb->hf_u.hf_indexed.hf_flags = 0; 300 break; 301 } 302 } 303 304 int 305 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 306 { 307 struct video_chip *chip = &sc->sc_chip; 308 bus_space_tag_t regt = sc->sc_regt; 309 bus_space_handle_t regh = sc->sc_regh; 310 plumreg_t reg; 311 size_t vram_size; 312 int bpp, width, height, vram_pitch; 313 314 *reverse = video_reverse_color(); 315 chip->vc_v = sc->sc_pc->pc_tc; 316 #if notyet 317 /* map BitBlt area */ 318 if (bus_space_map(sc->sc_bitbltt, 319 PLUM_VIDEO_BITBLT_IOBASE, 320 PLUM_VIDEO_BITBLT_IOSIZE, 0, 321 &sc->sc_bitblth)) { 322 printf(": BitBlt map failed\n"); 323 return (1); 324 } 325 #endif 326 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 327 328 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 329 case PLUM_VIDEO_PLGMD_16BPP: 330 #if NPLUMOHCI > 0 /* reserve V-RAM area for USB OHCI */ 331 /* FALLTHROUGH */ 332 #else 333 bpp = 16; 334 break; 335 #endif 336 default: 337 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 338 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 339 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 340 reg |= PLUM_VIDEO_PLGMD_8BPP; 341 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 342 #if notyet 343 /* change BitBlt color depth */ 344 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 345 #endif 346 /* FALLTHROUGH */ 347 case PLUM_VIDEO_PLGMD_8BPP: 348 bpp = 8; 349 break; 350 } 351 chip->vc_fbdepth = bpp; 352 353 /* 354 * Get display size from WindowsCE setted. 355 */ 356 chip->vc_fbwidth = width = bootinfo->fb_width = 357 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 358 chip->vc_fbheight = height = bootinfo->fb_height = 359 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 360 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 361 362 /* 363 * set line byte length to bootinfo and LCD controller. 364 */ 365 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 366 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 367 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 368 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 369 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 370 371 /* 372 * boot messages and map CLUT(if any). 373 */ 374 printf("display mode: "); 375 switch (bpp) { 376 default: 377 printf("disabled "); 378 break; 379 case 8: 380 printf("8bpp "); 381 /* map CLUT area */ 382 if (bus_space_map(sc->sc_clutiot, 383 PLUM_VIDEO_CLUT_LCD_IOBASE, 384 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 385 &sc->sc_clutioh)) { 386 printf(": CLUT map failed\n"); 387 return (1); 388 } 389 /* install default CLUT */ 390 plumvideo_clut_default(sc); 391 break; 392 case 16: 393 printf("16bpp "); 394 break; 395 } 396 397 /* 398 * calcurate frame buffer size. 399 */ 400 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 401 vram_size = (width * height * bpp) / NBBY; 402 vram_size = mips_round_page(vram_size); 403 chip->vc_fbsize = vram_size; 404 405 /* 406 * map V-RAM area. 407 */ 408 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 409 vram_size, 0, &sc->sc_fbioh)) { 410 printf(": V-RAM map failed\n"); 411 return (1); 412 } 413 414 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 415 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 416 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 417 418 return (0); 419 } 420 421 int 422 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 423 { 424 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 425 struct hpcfb_fbconf *fbconf; 426 struct hpcfb_dspconf *dspconf; 427 struct wsdisplay_cmap *cmap; 428 u_int8_t *r, *g, *b; 429 u_int32_t *rgb; 430 int idx, error; 431 size_t cnt; 432 433 switch (cmd) { 434 case WSDISPLAYIO_GETCMAP: 435 cmap = (struct wsdisplay_cmap*)data; 436 cnt = cmap->count; 437 idx = cmap->index; 438 439 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 440 sc->sc_fbconf.hf_pack_width != 8 || 441 !LEGAL_CLUT_INDEX(idx) || 442 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 443 return (EINVAL); 444 } 445 446 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 447 !uvm_useracc(cmap->green, cnt, B_WRITE) || 448 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 449 return (EFAULT); 450 } 451 452 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 453 if (error != 0) { 454 cmap_work_free(r, g, b, rgb); 455 return (ENOMEM); 456 } 457 plumvideo_clut_get(sc, rgb, idx, cnt); 458 rgb24_decompose(rgb, r, g, b, cnt); 459 460 copyout(r, cmap->red, cnt); 461 copyout(g, cmap->green,cnt); 462 copyout(b, cmap->blue, cnt); 463 464 cmap_work_free(r, g, b, rgb); 465 466 return (0); 467 468 case WSDISPLAYIO_PUTCMAP: 469 cmap = (struct wsdisplay_cmap*)data; 470 cnt = cmap->count; 471 idx = cmap->index; 472 473 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 474 sc->sc_fbconf.hf_pack_width != 8 || 475 !LEGAL_CLUT_INDEX(idx) || 476 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 477 return (EINVAL); 478 } 479 480 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 481 !uvm_useracc(cmap->green, cnt, B_WRITE) || 482 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 483 return (EFAULT); 484 } 485 486 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 487 if (error != 0) { 488 cmap_work_free(r, g, b, rgb); 489 return (ENOMEM); 490 } 491 copyin(cmap->red, r, cnt); 492 copyin(cmap->green, g, cnt); 493 copyin(cmap->blue, b, cnt); 494 rgb24_compose(rgb, r, g, b, cnt); 495 plumvideo_clut_set(sc, rgb, idx, cnt); 496 497 cmap_work_free(r, g, b, rgb); 498 499 return (0); 500 501 case HPCFBIO_GCONF: 502 fbconf = (struct hpcfb_fbconf *)data; 503 if (fbconf->hf_conf_index != 0 && 504 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 505 return (EINVAL); 506 } 507 *fbconf = sc->sc_fbconf; /* structure assignment */ 508 return (0); 509 510 case HPCFBIO_SCONF: 511 fbconf = (struct hpcfb_fbconf *)data; 512 if (fbconf->hf_conf_index != 0 && 513 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 514 return (EINVAL); 515 } 516 /* 517 * nothing to do because we have only one configration 518 */ 519 return (0); 520 521 case HPCFBIO_GDSPCONF: 522 dspconf = (struct hpcfb_dspconf *)data; 523 if ((dspconf->hd_unit_index != 0 && 524 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 525 (dspconf->hd_conf_index != 0 && 526 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 527 return (EINVAL); 528 } 529 *dspconf = sc->sc_dspconf; /* structure assignment */ 530 return (0); 531 532 case HPCFBIO_SDSPCONF: 533 dspconf = (struct hpcfb_dspconf *)data; 534 if ((dspconf->hd_unit_index != 0 && 535 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 536 (dspconf->hd_conf_index != 0 && 537 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 538 return (EINVAL); 539 } 540 /* 541 * nothing to do 542 * because we have only one unit and one configration 543 */ 544 return (0); 545 546 case HPCFBIO_GOP: 547 case HPCFBIO_SOP: 548 /* XXX not implemented yet */ 549 return (EINVAL); 550 } 551 552 return (ENOTTY); 553 } 554 555 paddr_t 556 plumvideo_mmap(void *ctx, off_t offset, int prot) 557 { 558 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 559 560 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 561 sc->sc_fbconf.hf_offset) < offset) { 562 return (-1); 563 } 564 565 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 566 } 567 568 void 569 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 570 int cnt) 571 { 572 static void __plumvideo_clut_get(bus_space_tag_t, 573 bus_space_handle_t); 574 static void __plumvideo_clut_get(iot, ioh) 575 bus_space_tag_t iot; 576 bus_space_handle_t ioh; 577 { 578 int i; 579 580 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 581 *rgb++ = bus_space_read_4(iot, ioh, beg) & 582 0x00ffffff; 583 } 584 } 585 586 KASSERT(rgb); 587 KASSERT(LEGAL_CLUT_INDEX(beg)); 588 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 589 __plumvideo_clut_access(sc, __plumvideo_clut_get); 590 } 591 592 void 593 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 594 int cnt) 595 { 596 static void __plumvideo_clut_set(bus_space_tag_t, 597 bus_space_handle_t); 598 static void __plumvideo_clut_set(iot, ioh) 599 bus_space_tag_t iot; 600 bus_space_handle_t ioh; 601 { 602 int i; 603 604 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 605 bus_space_write_4(iot, ioh, beg, 606 *rgb++ & 0x00ffffff); 607 } 608 } 609 610 KASSERT(rgb); 611 KASSERT(LEGAL_CLUT_INDEX(beg)); 612 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 613 __plumvideo_clut_access(sc, __plumvideo_clut_set); 614 } 615 616 void 617 plumvideo_clut_default(struct plumvideo_softc *sc) 618 { 619 static void __plumvideo_clut_default(bus_space_tag_t, 620 bus_space_handle_t); 621 static void __plumvideo_clut_default(iot, ioh) 622 bus_space_tag_t iot; 623 bus_space_handle_t ioh; 624 { 625 const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 626 const u_int32_t ansi_color[16] = { 627 0x000000, 0xff0000, 0x00ff00, 0xffff00, 628 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 629 0x000000, 0x800000, 0x008000, 0x808000, 630 0x000080, 0x800080, 0x008080, 0x808080, 631 }; 632 int i, r, g, b; 633 634 /* ANSI escape sequence */ 635 for (i = 0; i < 16; i++) { 636 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 637 } 638 /* 16 - 31, gray scale */ 639 for ( ; i < 32; i++) { 640 int j = (i - 16) * 17; 641 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 642 } 643 /* 32 - 247, RGB color */ 644 for (r = 0; r < 6; r++) { 645 for (g = 0; g < 6; g++) { 646 for (b = 0; b < 6; b++) { 647 bus_space_write_4(iot, ioh, i << 2, 648 RGB24(compo6[r], 649 compo6[g], 650 compo6[b])); 651 i++; 652 } 653 } 654 } 655 /* 248 - 245, just white */ 656 for ( ; i < 256; i++) { 657 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 658 } 659 } 660 661 __plumvideo_clut_access(sc, __plumvideo_clut_default); 662 } 663 664 void 665 __plumvideo_clut_access(struct plumvideo_softc *sc, void (*palette_func) 666 (bus_space_tag_t, bus_space_handle_t)) 667 { 668 bus_space_tag_t regt = sc->sc_regt; 669 bus_space_handle_t regh = sc->sc_regh; 670 plumreg_t val, gmode; 671 672 /* display off */ 673 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 674 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 675 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 676 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 677 678 /* palette access disable */ 679 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 680 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 681 682 /* change palette mode to CPU */ 683 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 684 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 685 686 /* palette access */ 687 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh); 688 689 /* change palette mode to Display */ 690 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 691 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 692 693 /* palette access enable */ 694 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 695 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 696 697 /* display on */ 698 val |= gmode; 699 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 700 } 701 702 /* !!! */ 703 static void 704 _flush_cache() 705 { 706 mips_dcache_wbinv_all(); 707 mips_icache_sync_all(); 708 } 709 710 int 711 plumvideo_power(void *ctx, int type, long id, void *msg) 712 { 713 struct plumvideo_softc *sc = ctx; 714 plum_chipset_tag_t pc = sc->sc_pc; 715 bus_space_tag_t regt = sc->sc_regt; 716 bus_space_handle_t regh = sc->sc_regh; 717 int why = (int)msg; 718 719 switch (why) { 720 case PWR_RESUME: 721 if (!sc->sc_console) 722 return (0); /* serial console */ 723 724 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 725 /* power on */ 726 /* LCD power on and display on */ 727 plum_power_establish(pc, PLUM_PWR_LCD); 728 /* back-light on */ 729 plum_power_establish(pc, PLUM_PWR_BKL); 730 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 731 PLUM_VIDEO_PLLUM_MAX); 732 break; 733 case PWR_SUSPEND: 734 /* FALLTHROUGH */ 735 case PWR_STANDBY: 736 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 737 /* back-light off */ 738 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 739 PLUM_VIDEO_PLLUM_MIN); 740 plum_power_disestablish(pc, PLUM_PWR_BKL); 741 /* power down */ 742 plum_power_disestablish(pc, PLUM_PWR_LCD); 743 break; 744 } 745 746 return (0); 747 } 748 749 #ifdef PLUMVIDEODEBUG 750 void 751 plumvideo_dump(struct plumvideo_softc *sc) 752 { 753 bus_space_tag_t regt = sc->sc_regt; 754 bus_space_handle_t regh = sc->sc_regh; 755 756 plumreg_t reg; 757 int i; 758 759 for (i = 0; i < 0x160; i += 4) { 760 reg = plum_conf_read(regt, regh, i); 761 printf("0x%03x %08x", i, reg); 762 dbg_bit_print(reg); 763 } 764 } 765 #endif /* PLUMVIDEODEBUG */ 766
Indexes created Mon Sep 29 21:09:56 GMT 2025