plumvideo.c revision 1.28
1 /* $NetBSD: plumvideo.c,v 1.28 2002/06/08 16:02:02 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #undef PLUMVIDEODEBUG 40 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 41 #include "bivideo.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <sys/ioctl.h> 48 #include <sys/buf.h> 49 #include <uvm/uvm_extern.h> 50 51 #include <dev/cons.h> /* consdev */ 52 53 #include <mips/cache.h> 54 55 #include <machine/bus.h> 56 #include <machine/intr.h> 57 #include <machine/config_hook.h> 58 59 #include <hpcmips/tx/tx39var.h> 60 #include <hpcmips/dev/plumvar.h> 61 #include <hpcmips/dev/plumicuvar.h> 62 #include <hpcmips/dev/plumpowervar.h> 63 #include <hpcmips/dev/plumvideoreg.h> 64 65 #include <machine/bootinfo.h> 66 67 #include <dev/wscons/wsdisplayvar.h> 68 #include <dev/rasops/rasops.h> 69 #include <dev/hpc/video_subr.h> 70 71 #include <dev/wscons/wsconsio.h> 72 #include <dev/hpc/hpcfbvar.h> 73 #include <dev/hpc/hpcfbio.h> 74 #if NBIVIDEO > 0 75 #include <dev/hpc/bivideovar.h> 76 #endif 77 78 #ifdef PLUMVIDEODEBUG 79 int plumvideo_debug = 1; 80 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 81 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 82 #else 83 #define DPRINTF(arg) 84 #define DPRINTFN(n, arg) 85 #endif 86 87 struct plumvideo_softc { 88 struct device sc_dev; 89 tx_chipset_tag_t sc_tc; 90 plum_chipset_tag_t sc_pc; 91 92 void *sc_powerhook; /* power management hook */ 93 int sc_console; 94 95 /* control register */ 96 bus_space_tag_t sc_regt; 97 bus_space_handle_t sc_regh; 98 /* frame buffer */ 99 bus_space_tag_t sc_fbiot; 100 bus_space_handle_t sc_fbioh; 101 /* clut buffer (8bpp only) */ 102 bus_space_tag_t sc_clutiot; 103 bus_space_handle_t sc_clutioh; 104 /* bitblt */ 105 bus_space_tag_t sc_bitbltt; 106 bus_space_handle_t sc_bitblth; 107 108 struct video_chip sc_chip; 109 struct hpcfb_fbconf sc_fbconf; 110 struct hpcfb_dspconf sc_dspconf; 111 }; 112 113 int plumvideo_match(struct device*, struct cfdata*, void*); 114 void plumvideo_attach(struct device*, struct device*, void*); 115 116 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 117 paddr_t plumvideo_mmap(void *, off_t, int); 118 119 struct cfattach plumvideo_ca = { 120 sizeof(struct plumvideo_softc), plumvideo_match, plumvideo_attach 121 }; 122 123 struct hpcfb_accessops plumvideo_ha = { 124 plumvideo_ioctl, plumvideo_mmap 125 }; 126 127 int plumvideo_power(void *, int, long, void *); 128 129 int plumvideo_init(struct plumvideo_softc *, int *); 130 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 131 132 void plumvideo_clut_default(struct plumvideo_softc *); 133 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 134 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 135 void __plumvideo_clut_access(struct plumvideo_softc *, 136 void (*)(bus_space_tag_t, bus_space_handle_t)); 137 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 138 139 #ifdef PLUMVIDEODEBUG 140 void plumvideo_dump(struct plumvideo_softc*); 141 #endif 142 143 #define ON 1 144 #define OFF 0 145 146 int 147 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 148 { 149 /* 150 * VRAM area also uses as UHOSTC shared RAM. 151 */ 152 return (2); /* 1st attach group */ 153 } 154 155 void 156 plumvideo_attach(struct device *parent, struct device *self, void *aux) 157 { 158 struct plum_attach_args *pa = aux; 159 struct plumvideo_softc *sc = (void*)self; 160 struct hpcfb_attach_args ha; 161 int console, reverse_flag; 162 163 sc->sc_console = console = cn_tab ? 0 : 1; 164 sc->sc_pc = pa->pa_pc; 165 sc->sc_regt = pa->pa_regt; 166 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 167 168 printf(": "); 169 170 /* map register area */ 171 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 172 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 173 printf("register map failed\n"); 174 return; 175 } 176 177 /* power control */ 178 plumvideo_power(sc, 0, 0, 179 (void *)(console ? PWR_RESUME : PWR_SUSPEND)); 180 /* Add a hard power hook to power saving */ 181 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 182 CONFIG_HOOK_PMEVENT_HARDPOWER, 183 CONFIG_HOOK_SHARE, 184 plumvideo_power, sc); 185 if (sc->sc_powerhook == 0) 186 printf("WARNING unable to establish hard power hook"); 187 188 /* 189 * Initialize LCD controller 190 * map V-RAM area. 191 * reinstall bootinfo structure. 192 * some OHCI shared-buffer hack. XXX 193 */ 194 if (plumvideo_init(sc, &reverse_flag) != 0) 195 return; 196 197 printf("\n"); 198 199 /* Attach frame buffer device */ 200 plumvideo_hpcfbinit(sc, reverse_flag); 201 202 #ifdef PLUMVIDEODEBUG 203 if (plumvideo_debug > 0) 204 plumvideo_dump(sc); 205 /* attach debug draw routine (debugging use) */ 206 video_attach_drawfunc(&sc->sc_chip); 207 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 208 #endif /* PLUMVIDEODEBUG */ 209 210 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 211 panic("plumvideo_attach: can't init fb console"); 212 } 213 214 ha.ha_console = console; 215 ha.ha_accessops = &plumvideo_ha; 216 ha.ha_accessctx = sc; 217 ha.ha_curfbconf = 0; 218 ha.ha_nfbconf = 1; 219 ha.ha_fbconflist = &sc->sc_fbconf; 220 ha.ha_curdspconf = 0; 221 ha.ha_ndspconf = 1; 222 ha.ha_dspconflist = &sc->sc_dspconf; 223 224 config_found(self, &ha, hpcfbprint); 225 #if NBIVIDEO > 0 226 /* bivideo is no longer need */ 227 bivideo_dont_attach = 1; 228 #endif /* NBIVIDEO > 0 */ 229 } 230 231 void 232 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 233 { 234 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 235 struct video_chip *chip = &sc->sc_chip; 236 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 237 int height = chip->vc_fbheight; 238 int width = chip->vc_fbwidth; 239 int depth = chip->vc_fbdepth; 240 241 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 242 243 fb->hf_conf_index = 0; /* configuration index */ 244 fb->hf_nconfs = 1; /* how many configurations */ 245 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 246 /* frame buffer name */ 247 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 248 /* configuration name */ 249 fb->hf_height = height; 250 fb->hf_width = width; 251 fb->hf_baseaddr = (u_long)fbvaddr; 252 fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); 253 /* frame buffer start offset */ 254 fb->hf_bytes_per_line = (width * depth) / NBBY; 255 fb->hf_nplanes = 1; 256 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 257 258 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 259 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 260 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 261 if (reverse_flag) 262 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 263 264 switch (depth) { 265 default: 266 panic("plumvideo_hpcfbinit: not supported color depth\n"); 267 /* NOTREACHED */ 268 case 16: 269 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 270 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 271 fb->hf_pack_width = 16; 272 fb->hf_pixels_per_pack = 1; 273 fb->hf_pixel_width = 16; 274 275 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 276 /* reserved for future use */ 277 fb->hf_u.hf_rgb.hf_flags = 0; 278 279 fb->hf_u.hf_rgb.hf_red_width = 5; 280 fb->hf_u.hf_rgb.hf_red_shift = 11; 281 fb->hf_u.hf_rgb.hf_green_width = 6; 282 fb->hf_u.hf_rgb.hf_green_shift = 5; 283 fb->hf_u.hf_rgb.hf_blue_width = 5; 284 fb->hf_u.hf_rgb.hf_blue_shift = 0; 285 fb->hf_u.hf_rgb.hf_alpha_width = 0; 286 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 287 break; 288 289 case 8: 290 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 291 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 292 fb->hf_pack_width = 8; 293 fb->hf_pixels_per_pack = 1; 294 fb->hf_pixel_width = 8; 295 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 296 /* reserved for future use */ 297 fb->hf_u.hf_indexed.hf_flags = 0; 298 break; 299 } 300 } 301 302 int 303 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 304 { 305 struct video_chip *chip = &sc->sc_chip; 306 bus_space_tag_t regt = sc->sc_regt; 307 bus_space_handle_t regh = sc->sc_regh; 308 plumreg_t reg; 309 size_t vram_size; 310 int bpp, width, height, vram_pitch; 311 312 *reverse = video_reverse_color(); 313 chip->vc_v = sc->sc_pc->pc_tc; 314 #if notyet 315 /* map BitBlt area */ 316 if (bus_space_map(sc->sc_bitbltt, 317 PLUM_VIDEO_BITBLT_IOBASE, 318 PLUM_VIDEO_BITBLT_IOSIZE, 0, 319 &sc->sc_bitblth)) { 320 printf(": BitBlt map failed\n"); 321 return (1); 322 } 323 #endif 324 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 325 326 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 327 case PLUM_VIDEO_PLGMD_16BPP: 328 #if NPLUMOHCI > 0 /* reserve V-RAM area for USB OHCI */ 329 /* FALLTHROUGH */ 330 #else 331 bpp = 16; 332 break; 333 #endif 334 default: 335 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 336 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 337 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 338 reg |= PLUM_VIDEO_PLGMD_8BPP; 339 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 340 #if notyet 341 /* change BitBlt color depth */ 342 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 343 #endif 344 /* FALLTHROUGH */ 345 case PLUM_VIDEO_PLGMD_8BPP: 346 bpp = 8; 347 break; 348 } 349 chip->vc_fbdepth = bpp; 350 351 /* 352 * Get display size from WindowsCE setted. 353 */ 354 chip->vc_fbwidth = width = bootinfo->fb_width = 355 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 356 chip->vc_fbheight = height = bootinfo->fb_height = 357 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 358 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 359 360 /* 361 * set line byte length to bootinfo and LCD controller. 362 */ 363 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 364 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 365 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 366 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 367 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 368 369 /* 370 * boot messages and map CLUT(if any). 371 */ 372 printf("display mode: "); 373 switch (bpp) { 374 default: 375 printf("disabled "); 376 break; 377 case 8: 378 printf("8bpp "); 379 /* map CLUT area */ 380 if (bus_space_map(sc->sc_clutiot, 381 PLUM_VIDEO_CLUT_LCD_IOBASE, 382 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 383 &sc->sc_clutioh)) { 384 printf(": CLUT map failed\n"); 385 return (1); 386 } 387 /* install default CLUT */ 388 plumvideo_clut_default(sc); 389 break; 390 case 16: 391 printf("16bpp "); 392 break; 393 } 394 395 /* 396 * calcurate frame buffer size. 397 */ 398 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 399 vram_size = (width * height * bpp) / NBBY; 400 vram_size = mips_round_page(vram_size); 401 chip->vc_fbsize = vram_size; 402 403 /* 404 * map V-RAM area. 405 */ 406 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 407 vram_size, 0, &sc->sc_fbioh)) { 408 printf(": V-RAM map failed\n"); 409 return (1); 410 } 411 412 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 413 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 414 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 415 416 return (0); 417 } 418 419 int 420 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 421 { 422 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 423 struct hpcfb_fbconf *fbconf; 424 struct hpcfb_dspconf *dspconf; 425 struct wsdisplay_cmap *cmap; 426 u_int8_t *r, *g, *b; 427 u_int32_t *rgb; 428 int idx, error; 429 size_t cnt; 430 431 switch (cmd) { 432 case WSDISPLAYIO_GETCMAP: 433 cmap = (struct wsdisplay_cmap*)data; 434 cnt = cmap->count; 435 idx = cmap->index; 436 437 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 438 sc->sc_fbconf.hf_pack_width != 8 || 439 !LEGAL_CLUT_INDEX(idx) || 440 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 441 return (EINVAL); 442 } 443 444 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 445 !uvm_useracc(cmap->green, cnt, B_WRITE) || 446 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 447 return (EFAULT); 448 } 449 450 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 451 if (error != 0) { 452 cmap_work_free(r, g, b, rgb); 453 return (ENOMEM); 454 } 455 plumvideo_clut_get(sc, rgb, idx, cnt); 456 rgb24_decompose(rgb, r, g, b, cnt); 457 458 copyout(r, cmap->red, cnt); 459 copyout(g, cmap->green,cnt); 460 copyout(b, cmap->blue, cnt); 461 462 cmap_work_free(r, g, b, rgb); 463 464 return (0); 465 466 case WSDISPLAYIO_PUTCMAP: 467 cmap = (struct wsdisplay_cmap*)data; 468 cnt = cmap->count; 469 idx = cmap->index; 470 471 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 472 sc->sc_fbconf.hf_pack_width != 8 || 473 !LEGAL_CLUT_INDEX(idx) || 474 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 475 return (EINVAL); 476 } 477 478 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 479 !uvm_useracc(cmap->green, cnt, B_WRITE) || 480 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 481 return (EFAULT); 482 } 483 484 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 485 if (error != 0) { 486 cmap_work_free(r, g, b, rgb); 487 return (ENOMEM); 488 } 489 copyin(cmap->red, r, cnt); 490 copyin(cmap->green, g, cnt); 491 copyin(cmap->blue, b, cnt); 492 rgb24_compose(rgb, r, g, b, cnt); 493 plumvideo_clut_set(sc, rgb, idx, cnt); 494 495 cmap_work_free(r, g, b, rgb); 496 497 return (0); 498 499 case HPCFBIO_GCONF: 500 fbconf = (struct hpcfb_fbconf *)data; 501 if (fbconf->hf_conf_index != 0 && 502 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 503 return (EINVAL); 504 } 505 *fbconf = sc->sc_fbconf; /* structure assignment */ 506 return (0); 507 508 case HPCFBIO_SCONF: 509 fbconf = (struct hpcfb_fbconf *)data; 510 if (fbconf->hf_conf_index != 0 && 511 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 512 return (EINVAL); 513 } 514 /* 515 * nothing to do because we have only one configration 516 */ 517 return (0); 518 519 case HPCFBIO_GDSPCONF: 520 dspconf = (struct hpcfb_dspconf *)data; 521 if ((dspconf->hd_unit_index != 0 && 522 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 523 (dspconf->hd_conf_index != 0 && 524 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 525 return (EINVAL); 526 } 527 *dspconf = sc->sc_dspconf; /* structure assignment */ 528 return (0); 529 530 case HPCFBIO_SDSPCONF: 531 dspconf = (struct hpcfb_dspconf *)data; 532 if ((dspconf->hd_unit_index != 0 && 533 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 534 (dspconf->hd_conf_index != 0 && 535 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 536 return (EINVAL); 537 } 538 /* 539 * nothing to do 540 * because we have only one unit and one configration 541 */ 542 return (0); 543 544 case HPCFBIO_GOP: 545 case HPCFBIO_SOP: 546 /* XXX not implemented yet */ 547 return (EINVAL); 548 } 549 550 return (EPASSTHROUGH); 551 } 552 553 paddr_t 554 plumvideo_mmap(void *ctx, off_t offset, int prot) 555 { 556 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 557 558 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 559 sc->sc_fbconf.hf_offset) < offset) { 560 return (-1); 561 } 562 563 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 564 } 565 566 void 567 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 568 int cnt) 569 { 570 static void __plumvideo_clut_get(bus_space_tag_t, 571 bus_space_handle_t); 572 static void __plumvideo_clut_get(iot, ioh) 573 bus_space_tag_t iot; 574 bus_space_handle_t ioh; 575 { 576 int i; 577 578 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 579 *rgb++ = bus_space_read_4(iot, ioh, beg) & 580 0x00ffffff; 581 } 582 } 583 584 KASSERT(rgb); 585 KASSERT(LEGAL_CLUT_INDEX(beg)); 586 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 587 __plumvideo_clut_access(sc, __plumvideo_clut_get); 588 } 589 590 void 591 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 592 int cnt) 593 { 594 static void __plumvideo_clut_set(bus_space_tag_t, 595 bus_space_handle_t); 596 static void __plumvideo_clut_set(iot, ioh) 597 bus_space_tag_t iot; 598 bus_space_handle_t ioh; 599 { 600 int i; 601 602 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 603 bus_space_write_4(iot, ioh, beg, 604 *rgb++ & 0x00ffffff); 605 } 606 } 607 608 KASSERT(rgb); 609 KASSERT(LEGAL_CLUT_INDEX(beg)); 610 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 611 __plumvideo_clut_access(sc, __plumvideo_clut_set); 612 } 613 614 void 615 plumvideo_clut_default(struct plumvideo_softc *sc) 616 { 617 static void __plumvideo_clut_default(bus_space_tag_t, 618 bus_space_handle_t); 619 static void __plumvideo_clut_default(iot, ioh) 620 bus_space_tag_t iot; 621 bus_space_handle_t ioh; 622 { 623 static const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 624 static const u_int32_t ansi_color[16] = { 625 0x000000, 0xff0000, 0x00ff00, 0xffff00, 626 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 627 0x000000, 0x800000, 0x008000, 0x808000, 628 0x000080, 0x800080, 0x008080, 0x808080, 629 }; 630 int i, r, g, b; 631 632 /* ANSI escape sequence */ 633 for (i = 0; i < 16; i++) { 634 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 635 } 636 /* 16 - 31, gray scale */ 637 for ( ; i < 32; i++) { 638 int j = (i - 16) * 17; 639 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 640 } 641 /* 32 - 247, RGB color */ 642 for (r = 0; r < 6; r++) { 643 for (g = 0; g < 6; g++) { 644 for (b = 0; b < 6; b++) { 645 bus_space_write_4(iot, ioh, i << 2, 646 RGB24(compo6[r], 647 compo6[g], 648 compo6[b])); 649 i++; 650 } 651 } 652 } 653 /* 248 - 245, just white */ 654 for ( ; i < 256; i++) { 655 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 656 } 657 } 658 659 __plumvideo_clut_access(sc, __plumvideo_clut_default); 660 } 661 662 void 663 __plumvideo_clut_access(struct plumvideo_softc *sc, void (*palette_func) 664 (bus_space_tag_t, bus_space_handle_t)) 665 { 666 bus_space_tag_t regt = sc->sc_regt; 667 bus_space_handle_t regh = sc->sc_regh; 668 plumreg_t val, gmode; 669 670 /* display off */ 671 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 672 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 673 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 674 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 675 676 /* palette access disable */ 677 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 678 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 679 680 /* change palette mode to CPU */ 681 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 682 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 683 684 /* palette access */ 685 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh); 686 687 /* change palette mode to Display */ 688 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 689 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 690 691 /* palette access enable */ 692 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 693 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 694 695 /* display on */ 696 val |= gmode; 697 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 698 } 699 700 /* !!! */ 701 static void 702 _flush_cache() 703 { 704 mips_dcache_wbinv_all(); 705 mips_icache_sync_all(); 706 } 707 708 int 709 plumvideo_power(void *ctx, int type, long id, void *msg) 710 { 711 struct plumvideo_softc *sc = ctx; 712 plum_chipset_tag_t pc = sc->sc_pc; 713 bus_space_tag_t regt = sc->sc_regt; 714 bus_space_handle_t regh = sc->sc_regh; 715 int why = (int)msg; 716 717 switch (why) { 718 case PWR_RESUME: 719 if (!sc->sc_console) 720 return (0); /* serial console */ 721 722 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 723 /* power on */ 724 /* LCD power on and display on */ 725 plum_power_establish(pc, PLUM_PWR_LCD); 726 /* back-light on */ 727 plum_power_establish(pc, PLUM_PWR_BKL); 728 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 729 PLUM_VIDEO_PLLUM_MAX); 730 break; 731 case PWR_SUSPEND: 732 /* FALLTHROUGH */ 733 case PWR_STANDBY: 734 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 735 /* back-light off */ 736 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 737 PLUM_VIDEO_PLLUM_MIN); 738 plum_power_disestablish(pc, PLUM_PWR_BKL); 739 /* power down */ 740 plum_power_disestablish(pc, PLUM_PWR_LCD); 741 break; 742 } 743 744 return (0); 745 } 746 747 #ifdef PLUMVIDEODEBUG 748 void 749 plumvideo_dump(struct plumvideo_softc *sc) 750 { 751 bus_space_tag_t regt = sc->sc_regt; 752 bus_space_handle_t regh = sc->sc_regh; 753 754 plumreg_t reg; 755 int i; 756 757 for (i = 0; i < 0x160; i += 4) { 758 reg = plum_conf_read(regt, regh, i); 759 printf("0x%03x %08x", i, reg); 760 dbg_bit_print(reg); 761 } 762 } 763 #endif /* PLUMVIDEODEBUG */ 764
Indexes created Sun Sep 28 16:09:52 GMT 2025