plumvideo.c revision 1.33
1 /* $NetBSD: plumvideo.c,v 1.33 2003/10/25 18:56:48 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: plumvideo.c,v 1.33 2003/10/25 18:56:48 mycroft Exp $"); 41 42 #undef PLUMVIDEODEBUG 43 44 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 45 #include "bivideo.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 51 #include <sys/ioctl.h> 52 #include <sys/buf.h> 53 #include <uvm/uvm_extern.h> 54 55 #include <dev/cons.h> /* consdev */ 56 57 #include <mips/cache.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 #include <machine/config_hook.h> 62 63 #include <hpcmips/tx/tx39var.h> 64 #include <hpcmips/dev/plumvar.h> 65 #include <hpcmips/dev/plumicuvar.h> 66 #include <hpcmips/dev/plumpowervar.h> 67 #include <hpcmips/dev/plumvideoreg.h> 68 69 #include <machine/bootinfo.h> 70 71 #include <dev/wscons/wsdisplayvar.h> 72 #include <dev/rasops/rasops.h> 73 #include <dev/hpc/video_subr.h> 74 75 #include <dev/wscons/wsconsio.h> 76 #include <dev/hpc/hpcfbvar.h> 77 #include <dev/hpc/hpcfbio.h> 78 #if NBIVIDEO > 0 79 #include <dev/hpc/bivideovar.h> 80 #endif 81 82 #ifdef PLUMVIDEODEBUG 83 int plumvideo_debug = 1; 84 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 85 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 86 #else 87 #define DPRINTF(arg) 88 #define DPRINTFN(n, arg) 89 #endif 90 91 struct plumvideo_softc { 92 struct device sc_dev; 93 tx_chipset_tag_t sc_tc; 94 plum_chipset_tag_t sc_pc; 95 96 void *sc_powerhook; /* power management hook */ 97 int sc_console; 98 99 /* control register */ 100 bus_space_tag_t sc_regt; 101 bus_space_handle_t sc_regh; 102 /* frame buffer */ 103 bus_space_tag_t sc_fbiot; 104 bus_space_handle_t sc_fbioh; 105 /* clut buffer (8bpp only) */ 106 bus_space_tag_t sc_clutiot; 107 bus_space_handle_t sc_clutioh; 108 /* bitblt */ 109 bus_space_tag_t sc_bitbltt; 110 bus_space_handle_t sc_bitblth; 111 112 struct video_chip sc_chip; 113 struct hpcfb_fbconf sc_fbconf; 114 struct hpcfb_dspconf sc_dspconf; 115 }; 116 117 int plumvideo_match(struct device*, struct cfdata*, void*); 118 void plumvideo_attach(struct device*, struct device*, void*); 119 120 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 121 paddr_t plumvideo_mmap(void *, off_t, int); 122 123 CFATTACH_DECL(plumvideo, sizeof(struct plumvideo_softc), 124 plumvideo_match, plumvideo_attach, NULL, NULL); 125 126 struct hpcfb_accessops plumvideo_ha = { 127 plumvideo_ioctl, plumvideo_mmap 128 }; 129 130 int plumvideo_power(void *, int, long, void *); 131 132 int plumvideo_init(struct plumvideo_softc *, int *); 133 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 134 135 void plumvideo_clut_default(struct plumvideo_softc *); 136 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 137 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 138 void __plumvideo_clut_access(struct plumvideo_softc *, u_int32_t *, int, int, 139 void (*)(bus_space_tag_t, bus_space_handle_t, u_int32_t *, int, int)); 140 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 141 142 #ifdef PLUMVIDEODEBUG 143 void plumvideo_dump(struct plumvideo_softc*); 144 #endif 145 146 #define ON 1 147 #define OFF 0 148 149 int 150 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 151 { 152 /* 153 * VRAM area also uses as UHOSTC shared RAM. 154 */ 155 return (2); /* 1st attach group */ 156 } 157 158 void 159 plumvideo_attach(struct device *parent, struct device *self, void *aux) 160 { 161 struct plum_attach_args *pa = aux; 162 struct plumvideo_softc *sc = (void*)self; 163 struct hpcfb_attach_args ha; 164 int console, reverse_flag; 165 166 sc->sc_console = console = cn_tab ? 0 : 1; 167 sc->sc_pc = pa->pa_pc; 168 sc->sc_regt = pa->pa_regt; 169 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 170 171 printf(": "); 172 173 /* map register area */ 174 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 175 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 176 printf("register map failed\n"); 177 return; 178 } 179 180 /* power control */ 181 plumvideo_power(sc, 0, 0, 182 (void *)(console ? PWR_RESUME : PWR_SUSPEND)); 183 /* Add a hard power hook to power saving */ 184 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 185 CONFIG_HOOK_PMEVENT_HARDPOWER, 186 CONFIG_HOOK_SHARE, 187 plumvideo_power, sc); 188 if (sc->sc_powerhook == 0) 189 printf("WARNING unable to establish hard power hook"); 190 191 /* 192 * Initialize LCD controller 193 * map V-RAM area. 194 * reinstall bootinfo structure. 195 * some OHCI shared-buffer hack. XXX 196 */ 197 if (plumvideo_init(sc, &reverse_flag) != 0) 198 return; 199 200 printf("\n"); 201 202 /* Attach frame buffer device */ 203 plumvideo_hpcfbinit(sc, reverse_flag); 204 205 #ifdef PLUMVIDEODEBUG 206 if (plumvideo_debug > 0) 207 plumvideo_dump(sc); 208 /* attach debug draw routine (debugging use) */ 209 video_attach_drawfunc(&sc->sc_chip); 210 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 211 #endif /* PLUMVIDEODEBUG */ 212 213 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 214 panic("plumvideo_attach: can't init fb console"); 215 } 216 217 ha.ha_console = console; 218 ha.ha_accessops = &plumvideo_ha; 219 ha.ha_accessctx = sc; 220 ha.ha_curfbconf = 0; 221 ha.ha_nfbconf = 1; 222 ha.ha_fbconflist = &sc->sc_fbconf; 223 ha.ha_curdspconf = 0; 224 ha.ha_ndspconf = 1; 225 ha.ha_dspconflist = &sc->sc_dspconf; 226 227 config_found(self, &ha, hpcfbprint); 228 #if NBIVIDEO > 0 229 /* bivideo is no longer need */ 230 bivideo_dont_attach = 1; 231 #endif /* NBIVIDEO > 0 */ 232 } 233 234 void 235 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 236 { 237 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 238 struct video_chip *chip = &sc->sc_chip; 239 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 240 int height = chip->vc_fbheight; 241 int width = chip->vc_fbwidth; 242 int depth = chip->vc_fbdepth; 243 244 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 245 246 fb->hf_conf_index = 0; /* configuration index */ 247 fb->hf_nconfs = 1; /* how many configurations */ 248 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 249 /* frame buffer name */ 250 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 251 /* configuration name */ 252 fb->hf_height = height; 253 fb->hf_width = width; 254 fb->hf_baseaddr = (u_long)fbvaddr; 255 fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); 256 /* frame buffer start offset */ 257 fb->hf_bytes_per_line = (width * depth) / NBBY; 258 fb->hf_nplanes = 1; 259 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 260 261 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 262 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 263 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 264 if (reverse_flag) 265 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 266 267 switch (depth) { 268 default: 269 panic("plumvideo_hpcfbinit: not supported color depth"); 270 /* NOTREACHED */ 271 case 16: 272 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 273 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 274 fb->hf_pack_width = 16; 275 fb->hf_pixels_per_pack = 1; 276 fb->hf_pixel_width = 16; 277 278 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 279 /* reserved for future use */ 280 fb->hf_u.hf_rgb.hf_flags = 0; 281 282 fb->hf_u.hf_rgb.hf_red_width = 5; 283 fb->hf_u.hf_rgb.hf_red_shift = 11; 284 fb->hf_u.hf_rgb.hf_green_width = 6; 285 fb->hf_u.hf_rgb.hf_green_shift = 5; 286 fb->hf_u.hf_rgb.hf_blue_width = 5; 287 fb->hf_u.hf_rgb.hf_blue_shift = 0; 288 fb->hf_u.hf_rgb.hf_alpha_width = 0; 289 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 290 break; 291 292 case 8: 293 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 294 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 295 fb->hf_pack_width = 8; 296 fb->hf_pixels_per_pack = 1; 297 fb->hf_pixel_width = 8; 298 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 299 /* reserved for future use */ 300 fb->hf_u.hf_indexed.hf_flags = 0; 301 break; 302 } 303 } 304 305 int 306 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 307 { 308 struct video_chip *chip = &sc->sc_chip; 309 bus_space_tag_t regt = sc->sc_regt; 310 bus_space_handle_t regh = sc->sc_regh; 311 plumreg_t reg; 312 size_t vram_size; 313 int bpp, width, height, vram_pitch; 314 315 *reverse = video_reverse_color(); 316 chip->vc_v = sc->sc_pc->pc_tc; 317 #if notyet 318 /* map BitBlt area */ 319 if (bus_space_map(sc->sc_bitbltt, 320 PLUM_VIDEO_BITBLT_IOBASE, 321 PLUM_VIDEO_BITBLT_IOSIZE, 0, 322 &sc->sc_bitblth)) { 323 printf(": BitBlt map failed\n"); 324 return (1); 325 } 326 #endif 327 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 328 329 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 330 case PLUM_VIDEO_PLGMD_16BPP: 331 #if NPLUMOHCI > 0 /* reserve V-RAM area for USB OHCI */ 332 /* FALLTHROUGH */ 333 #else 334 bpp = 16; 335 break; 336 #endif 337 default: 338 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 339 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 340 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 341 reg |= PLUM_VIDEO_PLGMD_8BPP; 342 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 343 #if notyet 344 /* change BitBlt color depth */ 345 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 346 #endif 347 /* FALLTHROUGH */ 348 case PLUM_VIDEO_PLGMD_8BPP: 349 bpp = 8; 350 break; 351 } 352 chip->vc_fbdepth = bpp; 353 354 /* 355 * Get display size from WindowsCE setted. 356 */ 357 chip->vc_fbwidth = width = bootinfo->fb_width = 358 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 359 chip->vc_fbheight = height = bootinfo->fb_height = 360 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 361 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 362 363 /* 364 * set line byte length to bootinfo and LCD controller. 365 */ 366 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 367 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 368 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 369 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 370 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 371 372 /* 373 * boot messages and map CLUT(if any). 374 */ 375 printf("display mode: "); 376 switch (bpp) { 377 default: 378 printf("disabled "); 379 break; 380 case 8: 381 printf("8bpp "); 382 /* map CLUT area */ 383 if (bus_space_map(sc->sc_clutiot, 384 PLUM_VIDEO_CLUT_LCD_IOBASE, 385 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 386 &sc->sc_clutioh)) { 387 printf(": CLUT map failed\n"); 388 return (1); 389 } 390 /* install default CLUT */ 391 plumvideo_clut_default(sc); 392 break; 393 case 16: 394 printf("16bpp "); 395 break; 396 } 397 398 /* 399 * calcurate frame buffer size. 400 */ 401 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 402 vram_size = (width * height * bpp) / NBBY; 403 vram_size = mips_round_page(vram_size); 404 chip->vc_fbsize = vram_size; 405 406 /* 407 * map V-RAM area. 408 */ 409 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 410 vram_size, 0, &sc->sc_fbioh)) { 411 printf(": V-RAM map failed\n"); 412 return (1); 413 } 414 415 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 416 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 417 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 418 419 return (0); 420 } 421 422 int 423 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 424 { 425 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 426 struct hpcfb_fbconf *fbconf; 427 struct hpcfb_dspconf *dspconf; 428 struct wsdisplay_cmap *cmap; 429 u_int8_t *r, *g, *b; 430 u_int32_t *rgb; 431 int idx, error; 432 size_t cnt; 433 434 switch (cmd) { 435 case WSDISPLAYIO_GETCMAP: 436 cmap = (struct wsdisplay_cmap*)data; 437 cnt = cmap->count; 438 idx = cmap->index; 439 440 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 441 sc->sc_fbconf.hf_pack_width != 8 || 442 !LEGAL_CLUT_INDEX(idx) || 443 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 444 return (EINVAL); 445 } 446 447 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 448 !uvm_useracc(cmap->green, cnt, B_WRITE) || 449 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 450 return (EFAULT); 451 } 452 453 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 454 if (error != 0) { 455 cmap_work_free(r, g, b, rgb); 456 return (ENOMEM); 457 } 458 plumvideo_clut_get(sc, rgb, idx, cnt); 459 rgb24_decompose(rgb, r, g, b, cnt); 460 461 copyout(r, cmap->red, cnt); 462 copyout(g, cmap->green,cnt); 463 copyout(b, cmap->blue, cnt); 464 465 cmap_work_free(r, g, b, rgb); 466 467 return (0); 468 469 case WSDISPLAYIO_PUTCMAP: 470 cmap = (struct wsdisplay_cmap*)data; 471 cnt = cmap->count; 472 idx = cmap->index; 473 474 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 475 sc->sc_fbconf.hf_pack_width != 8 || 476 !LEGAL_CLUT_INDEX(idx) || 477 !LEGAL_CLUT_INDEX(idx + cnt -1)) { 478 return (EINVAL); 479 } 480 481 if (!uvm_useracc(cmap->red, cnt, B_WRITE) || 482 !uvm_useracc(cmap->green, cnt, B_WRITE) || 483 !uvm_useracc(cmap->blue, cnt, B_WRITE)) { 484 return (EFAULT); 485 } 486 487 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 488 if (error != 0) { 489 cmap_work_free(r, g, b, rgb); 490 return (ENOMEM); 491 } 492 copyin(cmap->red, r, cnt); 493 copyin(cmap->green, g, cnt); 494 copyin(cmap->blue, b, cnt); 495 rgb24_compose(rgb, r, g, b, cnt); 496 plumvideo_clut_set(sc, rgb, idx, cnt); 497 498 cmap_work_free(r, g, b, rgb); 499 500 return (0); 501 502 case HPCFBIO_GCONF: 503 fbconf = (struct hpcfb_fbconf *)data; 504 if (fbconf->hf_conf_index != 0 && 505 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 506 return (EINVAL); 507 } 508 *fbconf = sc->sc_fbconf; /* structure assignment */ 509 return (0); 510 511 case HPCFBIO_SCONF: 512 fbconf = (struct hpcfb_fbconf *)data; 513 if (fbconf->hf_conf_index != 0 && 514 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 515 return (EINVAL); 516 } 517 /* 518 * nothing to do because we have only one configration 519 */ 520 return (0); 521 522 case HPCFBIO_GDSPCONF: 523 dspconf = (struct hpcfb_dspconf *)data; 524 if ((dspconf->hd_unit_index != 0 && 525 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 526 (dspconf->hd_conf_index != 0 && 527 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 528 return (EINVAL); 529 } 530 *dspconf = sc->sc_dspconf; /* structure assignment */ 531 return (0); 532 533 case HPCFBIO_SDSPCONF: 534 dspconf = (struct hpcfb_dspconf *)data; 535 if ((dspconf->hd_unit_index != 0 && 536 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 537 (dspconf->hd_conf_index != 0 && 538 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 539 return (EINVAL); 540 } 541 /* 542 * nothing to do 543 * because we have only one unit and one configration 544 */ 545 return (0); 546 547 case HPCFBIO_GOP: 548 case HPCFBIO_SOP: 549 /* XXX not implemented yet */ 550 return (EINVAL); 551 } 552 553 return (EPASSTHROUGH); 554 } 555 556 paddr_t 557 plumvideo_mmap(void *ctx, off_t offset, int prot) 558 { 559 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 560 561 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 562 sc->sc_fbconf.hf_offset) < offset) { 563 return (-1); 564 } 565 566 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 567 } 568 569 static void __plumvideo_clut_get(bus_space_tag_t, bus_space_handle_t, 570 u_int32_t *, int, int); 571 static void __plumvideo_clut_get(bus_space_tag_t iot, bus_space_handle_t ioh, 572 u_int32_t *rgb, int beg, int cnt) 573 { 574 int i; 575 576 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 577 *rgb++ = bus_space_read_4(iot, ioh, beg) & 578 0x00ffffff; 579 } 580 } 581 582 void 583 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 584 int cnt) 585 { 586 KASSERT(rgb); 587 KASSERT(LEGAL_CLUT_INDEX(beg)); 588 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 589 __plumvideo_clut_access(sc, rgb, beg, cnt, __plumvideo_clut_get); 590 } 591 592 static void __plumvideo_clut_set(bus_space_tag_t, bus_space_handle_t, 593 u_int32_t *, int, int); 594 static void __plumvideo_clut_set(bus_space_tag_t iot, bus_space_handle_t ioh, 595 u_int32_t *rgb, int beg, int cnt) 596 { 597 int i; 598 599 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 600 bus_space_write_4(iot, ioh, beg, 601 *rgb++ & 0x00ffffff); 602 } 603 } 604 605 void 606 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 607 int cnt) 608 { 609 KASSERT(rgb); 610 KASSERT(LEGAL_CLUT_INDEX(beg)); 611 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 612 __plumvideo_clut_access(sc, rgb, beg, cnt, __plumvideo_clut_set); 613 } 614 615 static void __plumvideo_clut_default(bus_space_tag_t, bus_space_handle_t, 616 u_int32_t *, int, int); 617 static void __plumvideo_clut_default(bus_space_tag_t iot, bus_space_handle_t ioh, 618 u_int32_t *rgb, int beg, int cnt) 619 { 620 static const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 621 static const u_int32_t ansi_color[16] = { 622 0x000000, 0xff0000, 0x00ff00, 0xffff00, 623 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 624 0x000000, 0x800000, 0x008000, 0x808000, 625 0x000080, 0x800080, 0x008080, 0x808080, 626 }; 627 int i, r, g, b; 628 629 /* ANSI escape sequence */ 630 for (i = 0; i < 16; i++) { 631 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 632 } 633 /* 16 - 31, gray scale */ 634 for ( ; i < 32; i++) { 635 int j = (i - 16) * 17; 636 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 637 } 638 /* 32 - 247, RGB color */ 639 for (r = 0; r < 6; r++) { 640 for (g = 0; g < 6; g++) { 641 for (b = 0; b < 6; b++) { 642 bus_space_write_4(iot, ioh, i << 2, 643 RGB24(compo6[r], 644 compo6[g], 645 compo6[b])); 646 i++; 647 } 648 } 649 } 650 /* 248 - 245, just white */ 651 for ( ; i < 256; i++) { 652 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 653 } 654 } 655 656 void 657 plumvideo_clut_default(struct plumvideo_softc *sc) 658 { 659 __plumvideo_clut_access(sc, NULL, 0, 256, __plumvideo_clut_default); 660 } 661 662 void 663 __plumvideo_clut_access(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 664 int cnt, void (*palette_func)(bus_space_tag_t, bus_space_handle_t, 665 u_int32_t *, int, int)) 666 { 667 bus_space_tag_t regt = sc->sc_regt; 668 bus_space_handle_t regh = sc->sc_regh; 669 plumreg_t val, gmode; 670 671 /* display off */ 672 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 673 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 674 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 675 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 676 677 /* palette access disable */ 678 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 679 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 680 681 /* change palette mode to CPU */ 682 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 683 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 684 685 /* palette access */ 686 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh, rgb, beg, cnt); 687 688 /* change palette mode to Display */ 689 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 690 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 691 692 /* palette access enable */ 693 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 694 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 695 696 /* display on */ 697 val |= gmode; 698 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 699 } 700 701 /* !!! */ 702 static void 703 _flush_cache() 704 { 705 mips_dcache_wbinv_all(); 706 mips_icache_sync_all(); 707 } 708 709 int 710 plumvideo_power(void *ctx, int type, long id, void *msg) 711 { 712 struct plumvideo_softc *sc = ctx; 713 plum_chipset_tag_t pc = sc->sc_pc; 714 bus_space_tag_t regt = sc->sc_regt; 715 bus_space_handle_t regh = sc->sc_regh; 716 int why = (int)msg; 717 718 switch (why) { 719 case PWR_RESUME: 720 if (!sc->sc_console) 721 return (0); /* serial console */ 722 723 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 724 /* power on */ 725 /* LCD power on and display on */ 726 plum_power_establish(pc, PLUM_PWR_LCD); 727 /* back-light on */ 728 plum_power_establish(pc, PLUM_PWR_BKL); 729 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 730 PLUM_VIDEO_PLLUM_MAX); 731 break; 732 case PWR_SUSPEND: 733 /* FALLTHROUGH */ 734 case PWR_STANDBY: 735 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 736 /* back-light off */ 737 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 738 PLUM_VIDEO_PLLUM_MIN); 739 plum_power_disestablish(pc, PLUM_PWR_BKL); 740 /* power down */ 741 plum_power_disestablish(pc, PLUM_PWR_LCD); 742 break; 743 } 744 745 return (0); 746 } 747 748 #ifdef PLUMVIDEODEBUG 749 void 750 plumvideo_dump(struct plumvideo_softc *sc) 751 { 752 bus_space_tag_t regt = sc->sc_regt; 753 bus_space_handle_t regh = sc->sc_regh; 754 755 plumreg_t reg; 756 int i; 757 758 for (i = 0; i < 0x160; i += 4) { 759 reg = plum_conf_read(regt, regh, i); 760 printf("0x%03x %08x", i, reg); 761 dbg_bit_print(reg); 762 } 763 } 764 #endif /* PLUMVIDEODEBUG */ 765
Indexes created Mon Sep 29 21:09:56 GMT 2025