plumvideo.c revision 1.35
1 /* $NetBSD: plumvideo.c,v 1.35 2004/12/12 21:03:06 abs Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: plumvideo.c,v 1.35 2004/12/12 21:03:06 abs Exp $"); 41 42 #undef PLUMVIDEODEBUG 43 44 #include "plumohci.h" /* Plum2 OHCI shared memory allocated on V-RAM */ 45 #include "bivideo.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/device.h> 50 51 #include <sys/ioctl.h> 52 #include <sys/buf.h> 53 #include <uvm/uvm_extern.h> 54 55 #include <dev/cons.h> /* consdev */ 56 57 #include <mips/cache.h> 58 59 #include <machine/bus.h> 60 #include <machine/intr.h> 61 #include <machine/config_hook.h> 62 63 #include <hpcmips/tx/tx39var.h> 64 #include <hpcmips/dev/plumvar.h> 65 #include <hpcmips/dev/plumicuvar.h> 66 #include <hpcmips/dev/plumpowervar.h> 67 #include <hpcmips/dev/plumvideoreg.h> 68 69 #include <machine/bootinfo.h> 70 71 #include <dev/wscons/wsdisplayvar.h> 72 #include <dev/rasops/rasops.h> 73 #include <dev/hpc/video_subr.h> 74 75 #include <dev/wscons/wsconsio.h> 76 #include <dev/hpc/hpcfbvar.h> 77 #include <dev/hpc/hpcfbio.h> 78 #if NBIVIDEO > 0 79 #include <dev/hpc/bivideovar.h> 80 #endif 81 82 #ifdef PLUMVIDEODEBUG 83 int plumvideo_debug = 1; 84 #define DPRINTF(arg) if (plumvideo_debug) printf arg; 85 #define DPRINTFN(n, arg) if (plumvideo_debug > (n)) printf arg; 86 #else 87 #define DPRINTF(arg) 88 #define DPRINTFN(n, arg) 89 #endif 90 91 struct plumvideo_softc { 92 struct device sc_dev; 93 tx_chipset_tag_t sc_tc; 94 plum_chipset_tag_t sc_pc; 95 96 void *sc_powerhook; /* power management hook */ 97 int sc_console; 98 99 /* control register */ 100 bus_space_tag_t sc_regt; 101 bus_space_handle_t sc_regh; 102 /* frame buffer */ 103 bus_space_tag_t sc_fbiot; 104 bus_space_handle_t sc_fbioh; 105 /* clut buffer (8bpp only) */ 106 bus_space_tag_t sc_clutiot; 107 bus_space_handle_t sc_clutioh; 108 /* bitblt */ 109 bus_space_tag_t sc_bitbltt; 110 bus_space_handle_t sc_bitblth; 111 112 struct video_chip sc_chip; 113 struct hpcfb_fbconf sc_fbconf; 114 struct hpcfb_dspconf sc_dspconf; 115 }; 116 117 int plumvideo_match(struct device*, struct cfdata*, void*); 118 void plumvideo_attach(struct device*, struct device*, void*); 119 120 int plumvideo_ioctl(void *, u_long, caddr_t, int, struct proc *); 121 paddr_t plumvideo_mmap(void *, off_t, int); 122 123 CFATTACH_DECL(plumvideo, sizeof(struct plumvideo_softc), 124 plumvideo_match, plumvideo_attach, NULL, NULL); 125 126 struct hpcfb_accessops plumvideo_ha = { 127 plumvideo_ioctl, plumvideo_mmap 128 }; 129 130 int plumvideo_power(void *, int, long, void *); 131 132 int plumvideo_init(struct plumvideo_softc *, int *); 133 void plumvideo_hpcfbinit(struct plumvideo_softc *, int); 134 135 void plumvideo_clut_default(struct plumvideo_softc *); 136 void plumvideo_clut_set(struct plumvideo_softc *, u_int32_t *, int, int); 137 void plumvideo_clut_get(struct plumvideo_softc *, u_int32_t *, int, int); 138 void __plumvideo_clut_access(struct plumvideo_softc *, u_int32_t *, int, int, 139 void (*)(bus_space_tag_t, bus_space_handle_t, u_int32_t *, int, int)); 140 static void _flush_cache(void) __attribute__((__unused__)); /* !!! */ 141 142 #ifdef PLUMVIDEODEBUG 143 void plumvideo_dump(struct plumvideo_softc*); 144 #endif 145 146 #define ON 1 147 #define OFF 0 148 149 int 150 plumvideo_match(struct device *parent, struct cfdata *cf, void *aux) 151 { 152 /* 153 * VRAM area also uses as UHOSTC shared RAM. 154 */ 155 return (2); /* 1st attach group */ 156 } 157 158 void 159 plumvideo_attach(struct device *parent, struct device *self, void *aux) 160 { 161 struct plum_attach_args *pa = aux; 162 struct plumvideo_softc *sc = (void*)self; 163 struct hpcfb_attach_args ha; 164 int console, reverse_flag; 165 166 sc->sc_console = console = cn_tab ? 0 : 1; 167 sc->sc_pc = pa->pa_pc; 168 sc->sc_regt = pa->pa_regt; 169 sc->sc_fbiot = sc->sc_clutiot = sc->sc_bitbltt = pa->pa_iot; 170 171 printf(": "); 172 173 /* map register area */ 174 if (bus_space_map(sc->sc_regt, PLUM_VIDEO_REGBASE, 175 PLUM_VIDEO_REGSIZE, 0, &sc->sc_regh)) { 176 printf("register map failed\n"); 177 return; 178 } 179 180 /* power control */ 181 plumvideo_power(sc, 0, 0, 182 (void *)(console ? PWR_RESUME : PWR_SUSPEND)); 183 /* Add a hard power hook to power saving */ 184 sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT, 185 CONFIG_HOOK_PMEVENT_HARDPOWER, 186 CONFIG_HOOK_SHARE, 187 plumvideo_power, sc); 188 if (sc->sc_powerhook == 0) 189 printf("WARNING unable to establish hard power hook"); 190 191 /* 192 * Initialize LCD controller 193 * map V-RAM area. 194 * reinstall bootinfo structure. 195 * some OHCI shared-buffer hack. XXX 196 */ 197 if (plumvideo_init(sc, &reverse_flag) != 0) 198 return; 199 200 printf("\n"); 201 202 /* Attach frame buffer device */ 203 plumvideo_hpcfbinit(sc, reverse_flag); 204 205 #ifdef PLUMVIDEODEBUG 206 if (plumvideo_debug > 0) 207 plumvideo_dump(sc); 208 /* attach debug draw routine (debugging use) */ 209 video_attach_drawfunc(&sc->sc_chip); 210 tx_conf_register_video(sc->sc_pc->pc_tc, &sc->sc_chip); 211 #endif /* PLUMVIDEODEBUG */ 212 213 if(console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 214 panic("plumvideo_attach: can't init fb console"); 215 } 216 217 ha.ha_console = console; 218 ha.ha_accessops = &plumvideo_ha; 219 ha.ha_accessctx = sc; 220 ha.ha_curfbconf = 0; 221 ha.ha_nfbconf = 1; 222 ha.ha_fbconflist = &sc->sc_fbconf; 223 ha.ha_curdspconf = 0; 224 ha.ha_ndspconf = 1; 225 ha.ha_dspconflist = &sc->sc_dspconf; 226 227 config_found(self, &ha, hpcfbprint); 228 #if NBIVIDEO > 0 229 /* bivideo is no longer need */ 230 bivideo_dont_attach = 1; 231 #endif /* NBIVIDEO > 0 */ 232 } 233 234 void 235 plumvideo_hpcfbinit(struct plumvideo_softc *sc, int reverse_flag) 236 { 237 struct hpcfb_fbconf *fb = &sc->sc_fbconf; 238 struct video_chip *chip = &sc->sc_chip; 239 vaddr_t fbvaddr = (vaddr_t)sc->sc_fbioh; 240 int height = chip->vc_fbheight; 241 int width = chip->vc_fbwidth; 242 int depth = chip->vc_fbdepth; 243 244 memset(fb, 0, sizeof(struct hpcfb_fbconf)); 245 246 fb->hf_conf_index = 0; /* configuration index */ 247 fb->hf_nconfs = 1; /* how many configurations */ 248 strncpy(fb->hf_name, "PLUM built-in video", HPCFB_MAXNAMELEN); 249 /* frame buffer name */ 250 strncpy(fb->hf_conf_name, "LCD", HPCFB_MAXNAMELEN); 251 /* configuration name */ 252 fb->hf_height = height; 253 fb->hf_width = width; 254 fb->hf_baseaddr = (u_long)fbvaddr; 255 fb->hf_offset = (u_long)fbvaddr - mips_ptob(mips_btop(fbvaddr)); 256 /* frame buffer start offset */ 257 fb->hf_bytes_per_line = (width * depth) / NBBY; 258 fb->hf_nplanes = 1; 259 fb->hf_bytes_per_plane = height * fb->hf_bytes_per_line; 260 261 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 262 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 263 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 264 if (reverse_flag) 265 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 266 267 switch (depth) { 268 default: 269 panic("plumvideo_hpcfbinit: not supported color depth"); 270 /* NOTREACHED */ 271 case 16: 272 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 273 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 274 fb->hf_pack_width = 16; 275 fb->hf_pixels_per_pack = 1; 276 fb->hf_pixel_width = 16; 277 278 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 279 /* reserved for future use */ 280 fb->hf_u.hf_rgb.hf_flags = 0; 281 282 fb->hf_u.hf_rgb.hf_red_width = 5; 283 fb->hf_u.hf_rgb.hf_red_shift = 11; 284 fb->hf_u.hf_rgb.hf_green_width = 6; 285 fb->hf_u.hf_rgb.hf_green_shift = 5; 286 fb->hf_u.hf_rgb.hf_blue_width = 5; 287 fb->hf_u.hf_rgb.hf_blue_shift = 0; 288 fb->hf_u.hf_rgb.hf_alpha_width = 0; 289 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 290 break; 291 292 case 8: 293 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 294 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 295 fb->hf_pack_width = 8; 296 fb->hf_pixels_per_pack = 1; 297 fb->hf_pixel_width = 8; 298 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 299 /* reserved for future use */ 300 fb->hf_u.hf_indexed.hf_flags = 0; 301 break; 302 } 303 } 304 305 int 306 plumvideo_init(struct plumvideo_softc *sc, int *reverse) 307 { 308 struct video_chip *chip = &sc->sc_chip; 309 bus_space_tag_t regt = sc->sc_regt; 310 bus_space_handle_t regh = sc->sc_regh; 311 plumreg_t reg; 312 size_t vram_size; 313 int bpp, width, height, vram_pitch; 314 315 *reverse = video_reverse_color(); 316 chip->vc_v = sc->sc_pc->pc_tc; 317 #if notyet 318 /* map BitBlt area */ 319 if (bus_space_map(sc->sc_bitbltt, 320 PLUM_VIDEO_BITBLT_IOBASE, 321 PLUM_VIDEO_BITBLT_IOSIZE, 0, 322 &sc->sc_bitblth)) { 323 printf(": BitBlt map failed\n"); 324 return (1); 325 } 326 #endif 327 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 328 329 switch (reg & PLUM_VIDEO_PLGMD_GMODE_MASK) { 330 case PLUM_VIDEO_PLGMD_16BPP: 331 #if NPLUMOHCI > 0 /* reserve V-RAM area for USB OHCI */ 332 /* FALLTHROUGH */ 333 #else 334 bpp = 16; 335 break; 336 #endif 337 default: 338 bootinfo->fb_type = *reverse ? BIFB_D8_FF : BIFB_D8_00; 339 reg &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 340 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 341 reg |= PLUM_VIDEO_PLGMD_8BPP; 342 plum_conf_write(regt, regh, PLUM_VIDEO_PLGMD_REG, reg); 343 #if notyet 344 /* change BitBlt color depth */ 345 plum_conf_write(sc->sc_bitbltt, sc->sc_bitblth, 0x8, 0); 346 #endif 347 /* FALLTHROUGH */ 348 case PLUM_VIDEO_PLGMD_8BPP: 349 bpp = 8; 350 break; 351 } 352 chip->vc_fbdepth = bpp; 353 354 /* 355 * Get display size from WindowsCE setted. 356 */ 357 chip->vc_fbwidth = width = bootinfo->fb_width = 358 plum_conf_read(regt, regh, PLUM_VIDEO_PLHPX_REG) + 1; 359 chip->vc_fbheight = height = bootinfo->fb_height = 360 plum_conf_read(regt, regh, PLUM_VIDEO_PLVT_REG) - 361 plum_conf_read(regt, regh, PLUM_VIDEO_PLVDS_REG); 362 363 /* 364 * set line byte length to bootinfo and LCD controller. 365 */ 366 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY; 367 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT1_REG, vram_pitch); 368 plum_conf_write(regt, regh, PLUM_VIDEO_PLPIT2_REG, 369 vram_pitch & PLUM_VIDEO_PLPIT2_MASK); 370 plum_conf_write(regt, regh, PLUM_VIDEO_PLOFS_REG, vram_pitch); 371 372 /* 373 * boot messages and map CLUT(if any). 374 */ 375 printf("display mode: "); 376 switch (bpp) { 377 default: 378 printf("disabled "); 379 break; 380 case 8: 381 printf("8bpp "); 382 /* map CLUT area */ 383 if (bus_space_map(sc->sc_clutiot, 384 PLUM_VIDEO_CLUT_LCD_IOBASE, 385 PLUM_VIDEO_CLUT_LCD_IOSIZE, 0, 386 &sc->sc_clutioh)) { 387 printf(": CLUT map failed\n"); 388 return (1); 389 } 390 /* install default CLUT */ 391 plumvideo_clut_default(sc); 392 break; 393 case 16: 394 printf("16bpp "); 395 break; 396 } 397 398 /* 399 * calcurate frame buffer size. 400 */ 401 reg = plum_conf_read(regt, regh, PLUM_VIDEO_PLGMD_REG); 402 vram_size = (width * height * bpp) / NBBY; 403 vram_size = mips_round_page(vram_size); 404 chip->vc_fbsize = vram_size; 405 406 /* 407 * map V-RAM area. 408 */ 409 if (bus_space_map(sc->sc_fbiot, PLUM_VIDEO_VRAM_IOBASE, 410 vram_size, 0, &sc->sc_fbioh)) { 411 printf(": V-RAM map failed\n"); 412 return (1); 413 } 414 415 bootinfo->fb_addr = (unsigned char *)sc->sc_fbioh; 416 chip->vc_fbvaddr = (vaddr_t)sc->sc_fbioh; 417 chip->vc_fbpaddr = PLUM_VIDEO_VRAM_IOBASE_PHYSICAL; 418 419 return (0); 420 } 421 422 int 423 plumvideo_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 424 { 425 struct plumvideo_softc *sc = (struct plumvideo_softc *)v; 426 struct hpcfb_fbconf *fbconf; 427 struct hpcfb_dspconf *dspconf; 428 struct wsdisplay_cmap *cmap; 429 u_int8_t *r, *g, *b; 430 u_int32_t *rgb; 431 int idx, error; 432 size_t cnt; 433 434 switch (cmd) { 435 case WSDISPLAYIO_GETCMAP: 436 cmap = (struct wsdisplay_cmap *)data; 437 cnt = cmap->count; 438 idx = cmap->index; 439 440 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 441 sc->sc_fbconf.hf_pack_width != 8 || 442 !LEGAL_CLUT_INDEX(idx) || 443 !LEGAL_CLUT_INDEX(idx + cnt - 1)) { 444 return (EINVAL); 445 } 446 447 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 448 if (error) 449 goto out; 450 plumvideo_clut_get(sc, rgb, idx, cnt); 451 rgb24_decompose(rgb, r, g, b, cnt); 452 453 error = copyout(r, cmap->red, cnt); 454 if (error) 455 goto out; 456 error = copyout(g, cmap->green, cnt); 457 if (error) 458 goto out; 459 error = copyout(b, cmap->blue, cnt); 460 461 out: 462 cmap_work_free(r, g, b, rgb); 463 return error; 464 465 case WSDISPLAYIO_PUTCMAP: 466 cmap = (struct wsdisplay_cmap *)data; 467 cnt = cmap->count; 468 idx = cmap->index; 469 470 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 471 sc->sc_fbconf.hf_pack_width != 8 || 472 !LEGAL_CLUT_INDEX(idx) || 473 !LEGAL_CLUT_INDEX(idx + cnt - 1)) { 474 return (EINVAL); 475 } 476 477 error = cmap_work_alloc(&r, &g, &b, &rgb, cnt); 478 if (error) 479 goto out; 480 error = copyin(cmap->red, r, cnt); 481 if (error) 482 goto out; 483 error = copyin(cmap->green, g, cnt); 484 if (error) 485 goto out; 486 error = copyin(cmap->blue, b, cnt); 487 if (error) 488 goto out; 489 rgb24_compose(rgb, r, g, b, cnt); 490 plumvideo_clut_set(sc, rgb, idx, cnt); 491 goto out; 492 493 case HPCFBIO_GCONF: 494 fbconf = (struct hpcfb_fbconf *)data; 495 if (fbconf->hf_conf_index != 0 && 496 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 497 return (EINVAL); 498 } 499 *fbconf = sc->sc_fbconf; /* structure assignment */ 500 return (0); 501 502 case HPCFBIO_SCONF: 503 fbconf = (struct hpcfb_fbconf *)data; 504 if (fbconf->hf_conf_index != 0 && 505 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 506 return (EINVAL); 507 } 508 /* 509 * nothing to do because we have only one configuration 510 */ 511 return (0); 512 513 case HPCFBIO_GDSPCONF: 514 dspconf = (struct hpcfb_dspconf *)data; 515 if ((dspconf->hd_unit_index != 0 && 516 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 517 (dspconf->hd_conf_index != 0 && 518 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 519 return (EINVAL); 520 } 521 *dspconf = sc->sc_dspconf; /* structure assignment */ 522 return (0); 523 524 case HPCFBIO_SDSPCONF: 525 dspconf = (struct hpcfb_dspconf *)data; 526 if ((dspconf->hd_unit_index != 0 && 527 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 528 (dspconf->hd_conf_index != 0 && 529 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 530 return (EINVAL); 531 } 532 /* 533 * nothing to do 534 * because we have only one unit and one configuration 535 */ 536 return (0); 537 538 case HPCFBIO_GOP: 539 case HPCFBIO_SOP: 540 /* XXX not implemented yet */ 541 return (EINVAL); 542 } 543 544 return (EPASSTHROUGH); 545 } 546 547 paddr_t 548 plumvideo_mmap(void *ctx, off_t offset, int prot) 549 { 550 struct plumvideo_softc *sc = (struct plumvideo_softc *)ctx; 551 552 if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane + 553 sc->sc_fbconf.hf_offset) < offset) { 554 return (-1); 555 } 556 557 return (mips_btop(PLUM_VIDEO_VRAM_IOBASE_PHYSICAL + offset)); 558 } 559 560 static void __plumvideo_clut_get(bus_space_tag_t, bus_space_handle_t, 561 u_int32_t *, int, int); 562 static void __plumvideo_clut_get(bus_space_tag_t iot, bus_space_handle_t ioh, 563 u_int32_t *rgb, int beg, int cnt) 564 { 565 int i; 566 567 for (i = 0, beg *= 4; i < cnt; i++, beg += 4) { 568 *rgb++ = bus_space_read_4(iot, ioh, beg) & 569 0x00ffffff; 570 } 571 } 572 573 void 574 plumvideo_clut_get(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 575 int cnt) 576 { 577 KASSERT(rgb); 578 KASSERT(LEGAL_CLUT_INDEX(beg)); 579 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 580 __plumvideo_clut_access(sc, rgb, beg, cnt, __plumvideo_clut_get); 581 } 582 583 static void __plumvideo_clut_set(bus_space_tag_t, bus_space_handle_t, 584 u_int32_t *, int, int); 585 static void __plumvideo_clut_set(bus_space_tag_t iot, bus_space_handle_t ioh, 586 u_int32_t *rgb, int beg, int cnt) 587 { 588 int i; 589 590 for (i = 0, beg *= 4; i < cnt; i++, beg +=4) { 591 bus_space_write_4(iot, ioh, beg, 592 *rgb++ & 0x00ffffff); 593 } 594 } 595 596 void 597 plumvideo_clut_set(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 598 int cnt) 599 { 600 KASSERT(rgb); 601 KASSERT(LEGAL_CLUT_INDEX(beg)); 602 KASSERT(LEGAL_CLUT_INDEX(beg + cnt - 1)); 603 __plumvideo_clut_access(sc, rgb, beg, cnt, __plumvideo_clut_set); 604 } 605 606 static void __plumvideo_clut_default(bus_space_tag_t, bus_space_handle_t, 607 u_int32_t *, int, int); 608 static void __plumvideo_clut_default(bus_space_tag_t iot, bus_space_handle_t ioh, 609 u_int32_t *rgb, int beg, int cnt) 610 { 611 static const u_int8_t compo6[6] = { 0, 51, 102, 153, 204, 255 }; 612 static const u_int32_t ansi_color[16] = { 613 0x000000, 0xff0000, 0x00ff00, 0xffff00, 614 0x0000ff, 0xff00ff, 0x00ffff, 0xffffff, 615 0x000000, 0x800000, 0x008000, 0x808000, 616 0x000080, 0x800080, 0x008080, 0x808080, 617 }; 618 int i, r, g, b; 619 620 /* ANSI escape sequence */ 621 for (i = 0; i < 16; i++) { 622 bus_space_write_4(iot, ioh, i << 2, ansi_color[i]); 623 } 624 /* 16 - 31, gray scale */ 625 for ( ; i < 32; i++) { 626 int j = (i - 16) * 17; 627 bus_space_write_4(iot, ioh, i << 2, RGB24(j, j, j)); 628 } 629 /* 32 - 247, RGB color */ 630 for (r = 0; r < 6; r++) { 631 for (g = 0; g < 6; g++) { 632 for (b = 0; b < 6; b++) { 633 bus_space_write_4(iot, ioh, i << 2, 634 RGB24(compo6[r], 635 compo6[g], 636 compo6[b])); 637 i++; 638 } 639 } 640 } 641 /* 248 - 245, just white */ 642 for ( ; i < 256; i++) { 643 bus_space_write_4(iot, ioh, i << 2, 0xffffff); 644 } 645 } 646 647 void 648 plumvideo_clut_default(struct plumvideo_softc *sc) 649 { 650 __plumvideo_clut_access(sc, NULL, 0, 256, __plumvideo_clut_default); 651 } 652 653 void 654 __plumvideo_clut_access(struct plumvideo_softc *sc, u_int32_t *rgb, int beg, 655 int cnt, void (*palette_func)(bus_space_tag_t, bus_space_handle_t, 656 u_int32_t *, int, int)) 657 { 658 bus_space_tag_t regt = sc->sc_regt; 659 bus_space_handle_t regh = sc->sc_regh; 660 plumreg_t val, gmode; 661 662 /* display off */ 663 val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG); 664 gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK; 665 val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK; 666 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 667 668 /* palette access disable */ 669 val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 670 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 671 672 /* change palette mode to CPU */ 673 val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY; 674 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 675 676 /* palette access */ 677 (*palette_func) (sc->sc_clutiot, sc->sc_clutioh, rgb, beg, cnt); 678 679 /* change palette mode to Display */ 680 val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY; 681 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 682 683 /* palette access enable */ 684 val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE; 685 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 686 687 /* display on */ 688 val |= gmode; 689 bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val); 690 } 691 692 /* !!! */ 693 static void 694 _flush_cache() 695 { 696 mips_dcache_wbinv_all(); 697 mips_icache_sync_all(); 698 } 699 700 int 701 plumvideo_power(void *ctx, int type, long id, void *msg) 702 { 703 struct plumvideo_softc *sc = ctx; 704 plum_chipset_tag_t pc = sc->sc_pc; 705 bus_space_tag_t regt = sc->sc_regt; 706 bus_space_handle_t regh = sc->sc_regh; 707 int why = (int)msg; 708 709 switch (why) { 710 case PWR_RESUME: 711 if (!sc->sc_console) 712 return (0); /* serial console */ 713 714 DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname)); 715 /* power on */ 716 /* LCD power on and display on */ 717 plum_power_establish(pc, PLUM_PWR_LCD); 718 /* back-light on */ 719 plum_power_establish(pc, PLUM_PWR_BKL); 720 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 721 PLUM_VIDEO_PLLUM_MAX); 722 break; 723 case PWR_SUSPEND: 724 /* FALLTHROUGH */ 725 case PWR_STANDBY: 726 DPRINTF(("%s: OFF\n", sc->sc_dev.dv_xname)); 727 /* back-light off */ 728 plum_conf_write(regt, regh, PLUM_VIDEO_PLLUM_REG, 729 PLUM_VIDEO_PLLUM_MIN); 730 plum_power_disestablish(pc, PLUM_PWR_BKL); 731 /* power down */ 732 plum_power_disestablish(pc, PLUM_PWR_LCD); 733 break; 734 } 735 736 return (0); 737 } 738 739 #ifdef PLUMVIDEODEBUG 740 void 741 plumvideo_dump(struct plumvideo_softc *sc) 742 { 743 bus_space_tag_t regt = sc->sc_regt; 744 bus_space_handle_t regh = sc->sc_regh; 745 746 plumreg_t reg; 747 int i; 748 749 for (i = 0; i < 0x160; i += 4) { 750 reg = plum_conf_read(regt, regh, i); 751 printf("0x%03x %08x", i, reg); 752 dbg_bit_print(reg); 753 } 754 } 755 #endif /* PLUMVIDEODEBUG */ 756
Indexes created Fri Sep 26 20:09:58 GMT 2025