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ucb1200reg.h revision 1.6
      1 /*	$NetBSD: ucb1200reg.h,v 1.6 2000/05/22 17:17:44 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2000 UCHIYAMA Yasushi.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 /*
     30  * PHILIPS UCB1200 Advanced modem/audio analog front-end
     31  */
     32 
     33 /* Internal register. access via SIB */
     34 #define	UCB1200_IO_DATA_REG		0
     35 #define	UCB1200_IO_DIR_REG		1
     36 #define	UCB1200_POSINTEN_REG		2
     37 #define	UCB1200_NEGINTEN_REG		3
     38 #define	UCB1200_INTSTAT_REG		4
     39 #define	UCB1200_TELECOMCTRLA_REG	5
     40 #define	UCB1200_TELECOMCTRLB_REG	6
     41 #define	UCB1200_AUDIOCTRLA_REG		7
     42 #define	UCB1200_AUDIOCTRLB_REG		8
     43 #define	UCB1200_TSCTRL_REG		9
     44 #define	UCB1200_ADCCTRL_REG		10
     45 #define	UCB1200_ADCDATA_REG		11
     46 #define	UCB1200_ID_REG			12
     47 #define	UCB1200_MODE_REG		13
     48 #define	UCB1200_RESERVED_REG		14
     49 #define	UCB1200_NULL_REG		15 /* always returns 0xffff */
     50 
     51 /*
     52  * I/O port data register
     53  */
     54 #define UCB1200_IOPORT_MAX		10
     55 #define UCB1200_IO_DATA_SPEAKER		0x100 /* XXX general? */
     56 
     57 /*
     58  * Telecom control register A
     59  */
     60 #define UCB1200_TELECOMCTRLA_DIV_MIN	16
     61 #define UCB1200_TELECOMCTRLA_DIV_MAX	127
     62 #define UCB1200_TELECOMCTRLA_DIV_SHIFT	0
     63 #define UCB1200_TELECOMCTRLA_DIV_MASK	0x7f
     64 #define UCB1200_TELECOMCTRLA_DIV(cr)					\
     65 	(((cr) >> UCB1200_TELECOMCTRLA_DIV_SHIFT) &			\
     66 	UCB1200_TELECOMCTRLA_DIV_MASK)
     67 #define UCB1200_TELECOMCTRLA_DIV_SET(cr, val)				\
     68 	((cr) | (((val) << UCB1200_TELECOMCTRLA_DIV_SHIFT) &		\
     69 	(UCB1200_TELECOMCTRLA_DIV_MASK << UCB1200_TELECOMCTRLA_DIV_SHIFT)))
     70 
     71 #define UCB1200_TELECOMCTRLA_LOOP	0x0080
     72 
     73 /*
     74  * Telecom control register B
     75  */
     76 #define UCB1200_TELECOMCTRLB_VBF		0x0008
     77 #define UCB1200_TELECOMCTRLB_CLIPSTATCLR	0x0010
     78 #define UCB1200_TELECOMCTRLB_ATT		0x0040
     79 #define UCB1200_TELECOMCTRLB_STS		0x0800
     80 #define UCB1200_TELECOMCTRLB_MUTE		0x2000
     81 #define UCB1200_TELECOMCTRLB_INEN		0x4000
     82 #define UCB1200_TELECOMCTRLB_OUTEN		0x8000
     83 
     84 /*
     85  * Audio control register A
     86  */
     87 #define UCB1200_AUDIOCTRLA_DIV_MIN	6
     88 #define UCB1200_AUDIOCTRLA_DIV_MAX	127
     89 #define UCB1200_AUDIOCTRLA_DIV_SHIFT	0
     90 #define UCB1200_AUDIOCTRLA_DIV_MASK	0x7f
     91 #define UCB1200_AUDIOCTRLA_DIV(cr)					\
     92 	(((cr) >> UCB1200_AUDIOCTRLA_DIV_SHIFT) &			\
     93 	UCB1200_AUDIOCTRLA_DIV_MASK)
     94 #define UCB1200_AUDIOCTRLA_DIV_SET(cr, val)				\
     95 	((cr) | (((val) << UCB1200_AUDIOCTRLA_DIV_SHIFT) &		\
     96 	(UCB1200_AUDIOCTRLA_DIV_MASK << UCB1200_AUDIOCTRLA_DIV_SHIFT)))
     97 
     98 #define UCB1200_AUDIOCTRLA_GAIN_SHIFT	7
     99 #define UCB1200_AUDIOCTRLA_GAIN_MASK	0x1f
    100 #define UCB1200_AUDIOCTRLA_GAIN(cr)					\
    101 	(((cr) >> UCB1200_AUDIOCTRLA_GAIN_SHIFT) &			\
    102 	UCB1200_AUDIOCTRLA_GAIN_MASK)
    103 #define UCB1200_AUDIOCTRLA_GAIN_SET(cr, val)				\
    104 	((cr) | (((val) << UCB1200_AUDIOCTRLA_GAIN_SHIFT) &		\
    105 	(UCB1200_AUDIOCTRLA_GAIN_MASK << UCB1200_AUDIOCTRLA_GAIN_SHIFT)))
    106 
    107 /*
    108  * Audio control register B
    109  */
    110 #define UCB1200_AUDIOCTRLB_ATT_MIN	0
    111 #define UCB1200_AUDIOCTRLB_ATT_MAX	0x1f
    112 #define UCB1200_AUDIOCTRLB_ATT_SHIFT	0
    113 #define UCB1200_AUDIOCTRLB_ATT_MASK	0x1f
    114 #define UCB1200_AUDIOCTRLB_ATT(cr)					\
    115 	(((cr) >> UCB1200_AUDIOCTRLB_ATT_SHIFT) &			\
    116 	UCB1200_AUDIOCTRLB_ATT_MASK)
    117 #define UCB1200_AUDIOCTRLB_ATT_CLR(cr)					\
    118 	((cr) & ~(UCB1200_AUDIOCTRLB_ATT_MASK <<			\
    119 		  UCB1200_AUDIOCTRLB_ATT_SHIFT))
    120 #define UCB1200_AUDIOCTRLB_ATT_SET(cr, val)				\
    121 	((cr) | (((val) << UCB1200_AUDIOCTRLB_ATT_SHIFT) &		\
    122 	(UCB1200_AUDIOCTRLB_ATT_MASK << UCB1200_AUDIOCTRLB_ATT_SHIFT)))
    123 
    124 #define	UCB1200_AUDIOCTRLB_CLIPSTATCLR	0x0040
    125 #define	UCB1200_AUDIOCTRLB_LOOP		0x0100
    126 #define	UCB1200_AUDIOCTRLB_MUTE		0x2000
    127 #define	UCB1200_AUDIOCTRLB_INEN		0x4000
    128 #define	UCB1200_AUDIOCTRLB_OUTEN	0x8000
    129 
    130 /*
    131  * Touch screen control register
    132  */
    133 #define	UCB1200_TSCTRL_MXLOW	0x00002000
    134 #define	UCB1200_TSCTRL_PXLOW	0x00001000
    135 #define	UCB1200_TSCTRL_BIAS	0x00000800
    136 
    137 #define UCB1200_TSCTRL_MODE_SHIFT	8
    138 #define UCB1200_TSCTRL_MODE_MASK	0x7f
    139 #define UCB1200_TSCTRL_MODE(cr)						\
    140 	(((cr) >> UCB1200_TSCTRL_MODE_SHIFT) &				\
    141 	UCB1200_TSCTRL_MODE_MASK)
    142 #define UCB1200_TSCTRL_MODE_INTERRUPT	0
    143 #define UCB1200_TSCTRL_MODE_PRESSURE	(1 << UCB1200_TSCTRL_MODE_SHIFT)
    144 #define UCB1200_TSCTRL_MODE_POSITION0	(2 << UCB1200_TSCTRL_MODE_SHIFT)
    145 #define UCB1200_TSCTRL_MODE_POSITION1	(3 << UCB1200_TSCTRL_MODE_SHIFT)
    146 
    147 #define	UCB1200_TSCTRL_PYGND	0x00000080
    148 #define	UCB1200_TSCTRL_MYGND	0x00000040
    149 #define	UCB1200_TSCTRL_PXGND	0x00000020
    150 #define	UCB1200_TSCTRL_MXGND	0x00000010
    151 #define	UCB1200_TSCTRL_PYPWR	0x00000008
    152 #define	UCB1200_TSCTRL_MYPWR	0x00000004
    153 #define	UCB1200_TSCTRL_PXPWR	0x00000002
    154 #define	UCB1200_TSCTRL_MXPWR	0x00000001
    155 
    156 /* touch screen modes */
    157 #define UCB1200_TSCTRL_YPOSITION					\
    158 	(UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXGND |			\
    159 	UCB1200_TSCTRL_MODE_POSITION0 | UCB1200_TSCTRL_BIAS)
    160 #define UCB1200_TSCTRL_XPOSITION					\
    161 	(UCB1200_TSCTRL_PYPWR | UCB1200_TSCTRL_MYGND |			\
    162 	UCB1200_TSCTRL_MODE_POSITION0 | UCB1200_TSCTRL_BIAS)
    163 #define UCB1200_TSCTRL_PRESSURE						\
    164 	(UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXPWR |			\
    165 	UCB1200_TSCTRL_PYGND | UCB1200_TSCTRL_MYGND |			\
    166 	UCB1200_TSCTRL_MODE_PRESSURE | UCB1200_TSCTRL_BIAS)
    167 
    168 #define UCB1200_TSCTRL_INTERRUPT					\
    169 	(UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXPWR |			\
    170 	UCB1200_TSCTRL_PYGND | UCB1200_TSCTRL_MYGND |			\
    171 	UCB1200_TSCTRL_MODE_INTERRUPT)
    172 
    173 #define UCB1200_TSCTRL_PRESSURE1
    174 #define UCB1200_TSCTRL_PRESSURE2
    175 #define UCB1200_TSCTRL_PRESSURE3
    176 #define UCB1200_TSCTRL_PRESSURE4
    177 #define UCB1200_TSCTRL_PRESSURE5
    178 #define UCB1200_TSCTRL_XRESISTANCE
    179 #define UCB1200_TSCTRL_YRESISTANCE
    180 
    181 /*
    182  * ADC control register
    183  */
    184 #define UCB1200_ADCCTRL_ENABLE		0x8000
    185 #define UCB1200_ADCCTRL_START		0x0080
    186 #define UCB1200_ADCCTRL_EXTREF		0x0020
    187 
    188 #define UCB1200_ADCCTRL_INPUT_SHIFT	2
    189 #define UCB1200_ADCCTRL_INPUT_MASK	0x7
    190 #define UCB1200_ADCCTRL_INPUT_SET(cr, val)				\
    191 	((cr) | (((val) << UCB1200_ADCCTRL_INPUT_SHIFT) &		\
    192 	(UCB1200_ADCCTRL_INPUT_MASK << UCB1200_ADCCTRL_INPUT_SHIFT)))
    193 #define UCB1200_ADCCTRL_INPUT_TSPX	0x0
    194 #define UCB1200_ADCCTRL_INPUT_TSMX	0x1
    195 #define UCB1200_ADCCTRL_INPUT_TSPY	0x2
    196 #define UCB1200_ADCCTRL_INPUT_TSMY	0x3
    197 #define UCB1200_ADCCTRL_INPUT_AD0	0x4
    198 #define UCB1200_ADCCTRL_INPUT_AD1	0x5
    199 #define UCB1200_ADCCTRL_INPUT_AD2	0x6
    200 #define UCB1200_ADCCTRL_INPUT_AD3	0x7
    201 
    202 #define UCB1200_ADCCTRL_VREFBYP		0x0002
    203 #define UCB1200_ADCCTRL_SYNCMODE	0x0001
    204 
    205 /*
    206  * ADC data register
    207  */
    208 #define UCB1200_ADCDATA_INPROGRESS	0x8000
    209 
    210 #define UCB1200_ADCDATA_SHIFT	5
    211 #define UCB1200_ADCDATA_MASK	0x3ff
    212 #define UCB1200_ADCDATA(cr)						\
    213 	(((cr) >> UCB1200_ADCDATA_SHIFT) &				\
    214 	UCB1200_ADCDATA_MASK)
    215 
    216 /*
    217  * ID register
    218  */
    219 /* PHILIPS products */
    220 /* Version 3, Device 0, Supplier 1 */
    221 #define UCB1100_ID	0x1003
    222 /* Version 4, Device 0, Supplier 1 */
    223 #define UCB1200_ID	0x1004
    224 /* Version 10, Device 0, Supplier 1 */
    225 #define UCB1300_ID	0x100a
    226 /* TOSHIBA TC35413F */
    227 #define TC35413F_ID	0x9712
    228