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ucbtp.c revision 1.19
      1  1.19    cegger /*	$NetBSD: ucbtp.c,v 1.19 2009/03/18 10:22:29 cegger Exp $ */
      2   1.1       uch 
      3   1.4       uch /*-
      4   1.5       uch  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
      5   1.5       uch  * All rights reserved.
      6   1.5       uch  *
      7   1.5       uch  * This code is derived from software contributed to The NetBSD Foundation
      8   1.5       uch  * by UCHIYAMA Yasushi.
      9   1.1       uch  *
     10   1.1       uch  * Redistribution and use in source and binary forms, with or without
     11   1.1       uch  * modification, are permitted provided that the following conditions
     12   1.1       uch  * are met:
     13   1.1       uch  * 1. Redistributions of source code must retain the above copyright
     14   1.1       uch  *    notice, this list of conditions and the following disclaimer.
     15   1.4       uch  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.4       uch  *    notice, this list of conditions and the following disclaimer in the
     17   1.4       uch  *    documentation and/or other materials provided with the distribution.
     18   1.1       uch  *
     19   1.5       uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.5       uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.5       uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.5       uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.5       uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.5       uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.5       uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.5       uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.5       uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.5       uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.5       uch  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1       uch  */
     31   1.1       uch 
     32   1.1       uch /*
     33   1.1       uch  * Device driver for PHILIPS UCB1200 Advanced modem/audio analog front-end
     34   1.1       uch  *	Touch panel part.
     35   1.1       uch  */
     36  1.12     lukem 
     37  1.12     lukem #include <sys/cdefs.h>
     38  1.19    cegger __KERNEL_RCSID(0, "$NetBSD: ucbtp.c,v 1.19 2009/03/18 10:22:29 cegger Exp $");
     39   1.1       uch 
     40   1.1       uch #include "opt_use_poll.h"
     41   1.1       uch 
     42   1.1       uch #include <sys/param.h>
     43   1.1       uch #include <sys/systm.h>
     44   1.1       uch #include <sys/device.h>
     45   1.1       uch 
     46   1.1       uch #include <machine/bus.h>
     47   1.1       uch #include <machine/intr.h>
     48   1.1       uch #include <machine/bootinfo.h> /* bootinfo */
     49   1.1       uch 
     50   1.1       uch #include <dev/wscons/wsconsio.h>
     51   1.1       uch #include <dev/wscons/wsmousevar.h>
     52   1.1       uch 
     53  1.13    tsarna #include <dev/hpc/hpctpanelvar.h>
     54   1.1       uch 
     55   1.1       uch #include <hpcmips/tx/tx39var.h>
     56   1.1       uch #include <hpcmips/tx/tx39sibvar.h>
     57   1.1       uch #include <hpcmips/tx/tx39sibreg.h>
     58   1.1       uch #include <hpcmips/tx/tx39icureg.h>
     59   1.1       uch 
     60   1.1       uch #include <hpcmips/dev/ucb1200var.h>
     61   1.1       uch #include <hpcmips/dev/ucb1200reg.h>
     62   1.1       uch 
     63   1.1       uch #include <hpcmips/tx/txsnd.h>
     64   1.5       uch #include <dev/hpc/video_subr.h> /* debug */
     65   1.1       uch 
     66   1.1       uch #ifdef UCBTPDEBUG
     67   1.4       uch int	ucbtp_debug = 0;
     68   1.1       uch #define	DPRINTF(arg) if (ucbtp_debug) printf arg;
     69   1.1       uch #define	DPRINTFN(n, arg) if (ucbtp_debug > (n)) printf arg;
     70   1.1       uch #else
     71   1.1       uch #define	DPRINTF(arg)
     72   1.1       uch #define DPRINTFN(n, arg)
     73   1.1       uch #endif
     74   1.1       uch 
     75   1.1       uch enum ucbts_stat {
     76   1.1       uch 	UCBTS_STAT_DISABLE,
     77   1.1       uch 	UCBTS_STAT_RELEASE,
     78   1.1       uch 	UCBTS_STAT_TOUCH,
     79   1.1       uch 	UCBTS_STAT_DRAG,
     80   1.1       uch };
     81   1.1       uch 
     82   1.1       uch #define UCBTS_POSX	1
     83   1.1       uch #define UCBTS_POSY	2
     84   1.1       uch #define UCBTS_PRESS	3
     85   1.1       uch 
     86   1.3       uch #define UCBTS_PRESS_THRESHOLD	80
     87   1.1       uch #define UCBTS_TAP_THRESHOLD	5
     88   1.1       uch 
     89   1.1       uch enum ucbadc_state {
     90   1.1       uch /* 0 */	UCBADC_IDLE,
     91   1.1       uch /* 1 */	UCBADC_ADC_INIT,
     92   1.1       uch /* 2 */	UCBADC_ADC_FINI,
     93   1.1       uch /* 3 */	UCBADC_MEASUMENT_INIT,
     94   1.1       uch /* 4 */	UCBADC_MEASUMENT_FINI,
     95   1.1       uch /* 5 */	UCBADC_ADC_ENABLE,
     96   1.1       uch /* 6 */	UCBADC_ADC_START0,
     97   1.1       uch /* 7 */	UCBADC_ADC_START1,
     98   1.1       uch /* 8 */	UCBADC_ADC_DATAREAD,
     99   1.1       uch /* 9 */	UCBADC_ADC_DATAREAD_WAIT,
    100   1.1       uch /*10 */	UCBADC_ADC_DISABLE,
    101   1.1       uch /*11 */	UCBADC_ADC_INTRMODE,
    102   1.1       uch /*12 */	UCBADC_ADC_INPUT,
    103   1.1       uch /*13 */	UCBADC_INTR_ACK0,
    104   1.1       uch /*14 */	UCBADC_INTR_ACK1,
    105   1.1       uch /*15 */	UCBADC_INTR_ACK2,
    106   1.1       uch /*16 */	UCBADC_REGREAD,
    107   1.1       uch /*17 */	UCBADC_REGWRITE
    108   1.1       uch };
    109   1.1       uch 
    110   1.1       uch struct ucbtp_softc {
    111   1.4       uch 	struct device sc_dev;
    112   1.4       uch 	struct device *sc_sib; /* parent (TX39 SIB module) */
    113   1.4       uch 	struct device *sc_ucb; /* parent (UCB1200 module) */
    114   1.4       uch 	tx_chipset_tag_t sc_tc;
    115   1.1       uch 
    116   1.1       uch 	enum ucbts_stat sc_stat;
    117   1.1       uch 	int sc_polling;
    118   1.1       uch 	int sc_polling_finish;
    119   1.1       uch 	void *sc_pollh;
    120   1.1       uch 
    121   1.1       uch 	struct tpcalib_softc sc_tpcalib;
    122   1.1       uch 	int sc_calibrated;
    123   1.1       uch 
    124   1.1       uch 	/* measurement value */
    125   1.1       uch 	int sc_x, sc_y, sc_p;
    126   1.1       uch 	int sc_ox, sc_oy;
    127   1.4       uch 	int sc_xy_reverse; /* some platform pin connect interchanged */
    128   1.1       uch 
    129   1.1       uch 	/*
    130   1.1       uch 	 * touch panel state machine
    131   1.1       uch 	 */
    132   1.4       uch 	void *sm_ih; /* TX39 SIB subframe 0 interrupt handler */
    133   1.1       uch 
    134   1.4       uch 	int sm_addr; /* UCB1200 register address */
    135   1.4       uch 	u_int32_t sm_reg;  /* UCB1200 register data & TX39 SIB header */
    136   1.4       uch 	int sm_tmpreg;
    137   1.3       uch #define UCBADC_RETRY_DEFAULT		200
    138   1.4       uch 	int sm_retry; /* retry counter */
    139   1.1       uch 
    140   1.1       uch 	enum ucbadc_state sm_state;
    141   1.1       uch 	int		sm_measurement; /* X, Y, Pressure */
    142   1.1       uch #define	UCBADC_MEASUREMENT_X		0
    143   1.1       uch #define	UCBADC_MEASUREMENT_Y		1
    144   1.1       uch #define	UCBADC_MEASUREMENT_PRESSURE	2
    145   1.4       uch 	int sm_returnstate;
    146   1.1       uch 
    147   1.4       uch 	int sm_read_state, sm_write_state;
    148   1.4       uch 	int sm_writing;	/* writing state flag */
    149   1.4       uch 	u_int32_t sm_write_val;	/* temporary buffer */
    150   1.1       uch 
    151   1.4       uch 	int sm_rw_retry; /* retry counter for r/w */
    152   1.1       uch 
    153   1.1       uch 	/* wsmouse */
    154   1.1       uch 	struct device *sc_wsmousedev;
    155   1.1       uch };
    156   1.1       uch 
    157   1.6       uch int	ucbtp_match(struct device *, struct cfdata *, void *);
    158   1.6       uch void	ucbtp_attach(struct device *, struct device *, void *);
    159   1.1       uch 
    160   1.6       uch int	ucbtp_sibintr(void *);
    161   1.6       uch int	ucbtp_poll(void *);
    162   1.6       uch int	ucbtp_adc_async(void *);
    163   1.6       uch int	ucbtp_input(struct ucbtp_softc *);
    164   1.6       uch int	ucbtp_busy(void *);
    165   1.6       uch 
    166   1.6       uch int	ucbtp_enable(void *);
    167  1.17  christos int	ucbtp_ioctl(void *, u_long, void *, int, struct lwp *);
    168   1.6       uch void	ucbtp_disable(void *);
    169   1.1       uch 
    170  1.10   thorpej CFATTACH_DECL(ucbtp, sizeof(struct ucbtp_softc),
    171  1.10   thorpej     ucbtp_match, ucbtp_attach, NULL, NULL);
    172   1.1       uch 
    173   1.1       uch const struct wsmouse_accessops ucbtp_accessops = {
    174   1.1       uch 	ucbtp_enable,
    175   1.1       uch 	ucbtp_ioctl,
    176   1.1       uch 	ucbtp_disable,
    177   1.1       uch };
    178   1.1       uch 
    179   1.1       uch /*
    180   1.1       uch  * XXX currently no calibration method. this is temporary hack.
    181   1.1       uch  */
    182   1.1       uch #include <machine/platid.h>
    183   1.1       uch 
    184   1.6       uch struct	wsmouse_calibcoords *calibration_sample_lookup(void);
    185   1.6       uch int	ucbtp_calibration(struct ucbtp_softc *);
    186   1.1       uch 
    187   1.1       uch struct calibration_sample_table {
    188   1.1       uch 	platid_t	cst_platform;
    189   1.1       uch 	struct wsmouse_calibcoords cst_sample;
    190   1.1       uch } calibration_sample_table[] = {
    191   1.1       uch 	{{{PLATID_WILD, PLATID_MACH_COMPAQ_C_8XX}},  /* uch machine */
    192   1.1       uch 	 { 0, 0, 639, 239, 5,
    193   1.1       uch 	   {{ 507, 510, 320, 120 },
    194   1.1       uch 	    { 898, 757,  40,  40 },
    195   1.1       uch 	    { 900, 255,  40, 200 },
    196   1.1       uch 	    { 109, 249, 600, 200 },
    197   1.1       uch 	    { 110, 753, 600,  40 }}}},
    198   1.1       uch 
    199   1.1       uch 	{{{PLATID_WILD, PLATID_MACH_COMPAQ_C_2010}}, /* uch machine */
    200   1.1       uch 	 { 0, 0, 639, 239, 5,
    201   1.1       uch 	   {{ 506, 487, 320, 120 },
    202   1.1       uch 	    { 880, 250,  40,  40 },
    203   1.1       uch 	    { 880, 718,  40, 200 },
    204   1.1       uch 	    { 140, 726, 600, 200 },
    205   1.1       uch 	    { 137, 250, 600,  40 }}}},
    206   1.1       uch 
    207   1.1       uch 	{{{PLATID_WILD, PLATID_MACH_SHARP_MOBILON_HC4100}}, /* uch machine */
    208   1.1       uch 	 { 0, 0, 639, 239, 5,
    209   1.1       uch 	   {{ 497, 501, 320, 120 },
    210   1.1       uch 	    { 752, 893,  40,  40 },
    211   1.1       uch 	    { 242, 891,  40, 200 },
    212   1.1       uch 	    { 241, 115, 600, 200 },
    213   1.1       uch 	    { 747, 101, 600,  40 }}}},
    214   1.1       uch 
    215  1.14       uch 	{{{PLATID_WILD, PLATID_MACH_SHARP_TELIOS_HCVJ}}, /* uch machine */
    216   1.4       uch 	 { 0, 0, 799, 479, 5,
    217   1.4       uch 	   {{ 850, 150,   1,   1 },
    218   1.4       uch 	    { 850, 880,   1, 479 },
    219   1.4       uch 	    { 850, 880,   1, 479 },
    220   1.4       uch 	    {  85, 880, 799, 479 },
    221   1.4       uch 	    {  85, 150, 799,   1 }}}},
    222   1.4       uch 
    223   1.1       uch 	{{{PLATID_UNKNOWN, PLATID_UNKNOWN}},
    224   1.1       uch 	 { 0, 0, 639, 239, 5,
    225   1.1       uch 	   {{0, 0, 0, 0},
    226   1.1       uch 	    {0, 0, 0, 0},
    227   1.1       uch 	    {0, 0, 0, 0},
    228   1.1       uch 	    {0, 0, 0, 0},
    229   1.1       uch 	    {0, 0, 0, 0}}}},
    230   1.1       uch };
    231   1.1       uch 
    232   1.1       uch struct wsmouse_calibcoords *
    233  1.19    cegger calibration_sample_lookup(void)
    234   1.1       uch {
    235   1.1       uch 	struct calibration_sample_table *tab;
    236   1.1       uch 	platid_mask_t mask;
    237   1.1       uch 
    238   1.1       uch 	for (tab = calibration_sample_table;
    239   1.6       uch 	    tab->cst_platform.dw.dw1 != PLATID_UNKNOWN; tab++) {
    240   1.1       uch 
    241   1.1       uch 		mask = PLATID_DEREF(&tab->cst_platform);
    242   1.1       uch 
    243   1.1       uch 		if (platid_match(&platid, &mask)) {
    244   1.4       uch 			return (&tab->cst_sample);
    245   1.1       uch 		}
    246   1.1       uch 	}
    247   1.1       uch 
    248   1.4       uch 	return (0);
    249   1.1       uch }
    250   1.1       uch 
    251   1.1       uch int
    252   1.6       uch ucbtp_calibration(struct ucbtp_softc *sc)
    253   1.1       uch {
    254   1.1       uch 	struct wsmouse_calibcoords *cs;
    255   1.4       uch 
    256   1.4       uch 	if (sc->sc_tc->tc_videot)
    257   1.4       uch 		video_calibration_pattern(sc->sc_tc->tc_videot); /* debug */
    258   1.4       uch 
    259   1.1       uch 	tpcalib_init(&sc->sc_tpcalib);
    260   1.1       uch 
    261   1.1       uch 	if (!(cs = calibration_sample_lookup())) {
    262   1.4       uch 		DPRINTF(("no calibration data"));
    263   1.4       uch 		return (1);
    264   1.1       uch 	}
    265   1.1       uch 
    266   1.1       uch 	sc->sc_calibrated =
    267   1.6       uch 	    tpcalib_ioctl(&sc->sc_tpcalib, WSMOUSEIO_SCALIBCOORDS,
    268  1.17  christos 		(void *)cs, 0, 0) == 0 ? 1 : 0;
    269   1.1       uch 
    270   1.1       uch 	if (!sc->sc_calibrated)
    271   1.1       uch 		printf("not ");
    272   1.1       uch 	printf("calibrated");
    273   1.1       uch 
    274   1.4       uch 	return (0);
    275   1.1       uch }
    276   1.1       uch 
    277   1.1       uch int
    278   1.6       uch ucbtp_match(struct device *parent, struct cfdata *cf, void *aux)
    279   1.1       uch {
    280   1.6       uch 
    281   1.4       uch 	return (1);
    282   1.1       uch }
    283   1.1       uch 
    284   1.1       uch void
    285   1.6       uch ucbtp_attach(struct device *parent, struct device *self, void *aux)
    286   1.1       uch {
    287   1.1       uch 	struct ucb1200_attach_args *ucba = aux;
    288   1.1       uch 	struct ucbtp_softc *sc = (void*)self;
    289   1.1       uch 	struct wsmousedev_attach_args wsmaa;
    290   1.1       uch 	tx_chipset_tag_t tc;
    291   1.1       uch 
    292   1.1       uch 	tc = sc->sc_tc = ucba->ucba_tc;
    293   1.1       uch 	sc->sc_sib = ucba->ucba_sib;
    294   1.1       uch 	sc->sc_ucb = ucba->ucba_ucb;
    295   1.1       uch 
    296   1.1       uch 	printf(": ");
    297   1.1       uch 	/* touch panel interrupt */
    298   1.1       uch 	tx_intr_establish(tc, MAKEINTR(1, TX39_INTRSTATUS1_SIBIRQPOSINT),
    299   1.6       uch 	    IST_EDGE, IPL_TTY, ucbtp_sibintr, sc);
    300   1.1       uch 
    301   1.1       uch 	/* attempt to calibrate touch panel */
    302   1.1       uch 	ucbtp_calibration(sc);
    303   1.4       uch #ifdef TX392X /* hack for Telios HC-VJ1C */
    304   1.4       uch 	sc->sc_xy_reverse = 1;
    305   1.4       uch #endif
    306   1.4       uch 
    307   1.1       uch 	printf("\n");
    308   1.1       uch 
    309   1.1       uch 	wsmaa.accessops = &ucbtp_accessops;
    310   1.1       uch 	wsmaa.accesscookie = sc;
    311   1.1       uch 
    312   1.1       uch 	ucb1200_state_install(parent, ucbtp_busy, self, UCB1200_TP_MODULE);
    313   1.1       uch 
    314   1.1       uch 	/*
    315   1.1       uch 	 * attach the wsmouse
    316   1.1       uch 	 */
    317   1.1       uch 	sc->sc_wsmousedev = config_found(self, &wsmaa, wsmousedevprint);
    318   1.1       uch }
    319   1.1       uch 
    320   1.1       uch int
    321   1.6       uch ucbtp_busy(void *arg)
    322   1.1       uch {
    323   1.1       uch 	struct ucbtp_softc *sc = arg;
    324   1.1       uch 
    325   1.4       uch 	return (sc->sm_state != UCBADC_IDLE);
    326   1.1       uch }
    327   1.1       uch 
    328   1.1       uch int
    329   1.6       uch ucbtp_poll(void *arg)
    330   1.1       uch {
    331   1.1       uch 	struct ucbtp_softc *sc = arg;
    332   1.1       uch 
    333   1.1       uch 	if (!ucb1200_state_idle(sc->sc_ucb)) /* subframe0 busy */
    334   1.4       uch 		return (POLL_CONT);
    335   1.1       uch 
    336   1.1       uch 	if (sc->sc_polling_finish) {
    337   1.1       uch 		sc->sc_polling_finish = 0;
    338   1.4       uch 		return (POLL_END);
    339   1.1       uch 	}
    340   1.1       uch 
    341   1.1       uch 	/* execute A-D converter */
    342   1.1       uch 	sc->sm_state = UCBADC_ADC_INIT;
    343   1.1       uch 	ucbtp_adc_async(sc);
    344   1.1       uch 
    345   1.4       uch 	return (POLL_CONT);
    346   1.1       uch }
    347   1.1       uch 
    348   1.1       uch int
    349   1.6       uch ucbtp_sibintr(void *arg)
    350   1.1       uch {
    351   1.1       uch 	struct ucbtp_softc *sc = arg;
    352   1.1       uch 
    353   1.1       uch 	sc->sc_stat = UCBTS_STAT_TOUCH;
    354   1.1       uch 
    355   1.1       uch 	/* click! */
    356   1.1       uch 	tx_sound_click(sc->sc_tc);
    357   1.1       uch 
    358   1.1       uch 	/* invoke touch panel polling */
    359   1.1       uch 	if (!sc->sc_polling) {
    360   1.1       uch 		sc->sc_pollh = tx39_poll_establish(sc->sc_tc, 1, IST_EDGE,
    361   1.6       uch 		    ucbtp_poll, sc);
    362   1.1       uch 		if (!sc->sc_pollh) {
    363   1.1       uch 			printf("%s: can't poll\n", sc->sc_dev.dv_xname);
    364   1.1       uch 		}
    365   1.1       uch 	}
    366   1.1       uch 
    367   1.1       uch 	/* don't acknoledge interrupt until polling finish */
    368   1.1       uch 
    369   1.4       uch 	return (0);
    370   1.1       uch }
    371   1.1       uch 
    372   1.4       uch #define REGWRITE(addr, reg, ret) (					\
    373   1.4       uch 	sc->sm_addr = (addr),						\
    374   1.4       uch 	sc->sm_reg = (reg),						\
    375   1.4       uch 	sc->sm_returnstate = (ret),					\
    376   1.1       uch 	sc->sm_state = UCBADC_REGWRITE)
    377   1.4       uch #define REGREAD(addr, ret) (						\
    378   1.4       uch 	sc->sm_addr = (addr),						\
    379   1.4       uch 	sc->sm_returnstate = (ret),					\
    380   1.1       uch 	sc->sm_state = UCBADC_REGREAD)
    381   1.1       uch 
    382   1.1       uch int
    383   1.6       uch ucbtp_adc_async(void *arg)
    384   1.1       uch {
    385   1.1       uch 	struct ucbtp_softc *sc = arg;
    386   1.1       uch 	tx_chipset_tag_t tc = sc->sc_tc;
    387   1.1       uch 	txreg_t reg;
    388   1.1       uch 	u_int16_t reg16;
    389   1.1       uch 
    390   1.1       uch 	DPRINTFN(9, ("state: %d\n", sc->sm_state));
    391   1.1       uch 
    392   1.1       uch 	switch (sc->sm_state) {
    393   1.1       uch 	default:
    394   1.1       uch 		panic("ucbtp_adc: invalid state %d", sc->sm_state);
    395   1.1       uch 		/* NOTREACHED */
    396   1.1       uch 		break;
    397   1.1       uch 
    398   1.1       uch 	case UCBADC_IDLE:
    399   1.1       uch 		/* nothing to do */
    400   1.1       uch 		break;
    401   1.1       uch 
    402   1.1       uch 	case UCBADC_ADC_INIT:
    403   1.1       uch 		sc->sc_polling++;
    404   1.1       uch 		sc->sc_stat = UCBTS_STAT_DRAG;
    405   1.1       uch 		/* enable heart beat of this state machine */
    406   1.1       uch 		sc->sm_ih = tx_intr_establish(
    407   1.1       uch 			tc,
    408   1.1       uch 			MAKEINTR(1, TX39_INTRSTATUS1_SIBSF0INT),
    409   1.1       uch 			IST_EDGE, IPL_TTY, ucbtp_adc_async, sc);
    410   1.1       uch 
    411   1.1       uch 		sc->sm_state = UCBADC_MEASUMENT_INIT;
    412   1.1       uch 		break;
    413   1.1       uch 
    414   1.1       uch 	case UCBADC_ADC_FINI:
    415   1.1       uch 		/* disable heart beat of this state machine */
    416   1.1       uch 		tx_intr_disestablish(tc, sc->sm_ih);
    417   1.1       uch 		sc->sm_state = UCBADC_IDLE;
    418   1.1       uch 		break;
    419   1.1       uch 
    420   1.1       uch 	case UCBADC_MEASUMENT_INIT:
    421   1.1       uch 		switch (sc->sm_measurement) {
    422   1.1       uch 		default:
    423   1.1       uch 			panic("unknown measurement spec.");
    424   1.1       uch 			/* NOTREACHED */
    425   1.1       uch 			break;
    426   1.1       uch 		case UCBADC_MEASUREMENT_X:
    427   1.1       uch 			REGWRITE(UCB1200_TSCTRL_REG,
    428   1.6       uch 			    UCB1200_TSCTRL_XPOSITION,
    429   1.6       uch 			    UCBADC_ADC_ENABLE);
    430   1.1       uch 			break;
    431   1.1       uch 		case UCBADC_MEASUREMENT_Y:
    432   1.1       uch 			REGWRITE(UCB1200_TSCTRL_REG,
    433   1.6       uch 			    UCB1200_TSCTRL_YPOSITION,
    434   1.6       uch 			    UCBADC_ADC_ENABLE);
    435   1.1       uch 			break;
    436   1.1       uch 		case UCBADC_MEASUREMENT_PRESSURE:
    437   1.1       uch 			REGWRITE(UCB1200_TSCTRL_REG,
    438   1.6       uch 			    UCB1200_TSCTRL_PRESSURE,
    439   1.6       uch 			    UCBADC_ADC_ENABLE);
    440   1.1       uch 			break;
    441   1.1       uch 		}
    442   1.1       uch 		break;
    443   1.1       uch 
    444   1.1       uch 	case UCBADC_MEASUMENT_FINI:
    445   1.1       uch 		switch (sc->sm_measurement) {
    446   1.1       uch 		case UCBADC_MEASUREMENT_X:
    447   1.1       uch 			sc->sm_measurement = UCBADC_MEASUREMENT_Y;
    448   1.1       uch 			sc->sm_state = UCBADC_MEASUMENT_INIT;
    449   1.1       uch 			break;
    450   1.1       uch 		case UCBADC_MEASUREMENT_Y:
    451   1.1       uch 			sc->sm_measurement = UCBADC_MEASUREMENT_PRESSURE;
    452   1.1       uch 			sc->sm_state = UCBADC_MEASUMENT_INIT;
    453   1.1       uch 			break;
    454   1.1       uch 		case UCBADC_MEASUREMENT_PRESSURE:
    455   1.1       uch 			sc->sm_measurement = UCBADC_MEASUREMENT_X;
    456   1.1       uch 			/* measument complete. pass down to wsmouse_input */
    457   1.1       uch 			sc->sm_state = UCBADC_ADC_INPUT;
    458   1.1       uch 			break;
    459   1.1       uch 		}
    460   1.1       uch 		break;
    461   1.1       uch 
    462   1.1       uch 	case UCBADC_ADC_ENABLE:
    463   1.1       uch 		switch (sc->sm_measurement) {
    464   1.1       uch 		case UCBADC_MEASUREMENT_PRESSURE:
    465   1.1       uch 			/* FALLTHROUGH */
    466   1.1       uch 		case UCBADC_MEASUREMENT_X:
    467   1.1       uch 			sc->sm_tmpreg = UCB1200_ADCCTRL_INPUT_SET(
    468   1.1       uch 				UCB1200_ADCCTRL_ENABLE,
    469   1.1       uch 				UCB1200_ADCCTRL_INPUT_TSPX);
    470   1.1       uch 			REGWRITE(UCB1200_ADCCTRL_REG, sc->sm_tmpreg,
    471   1.6       uch 			    UCBADC_ADC_START0);
    472   1.1       uch 			break;
    473   1.1       uch 		case UCBADC_MEASUREMENT_Y:
    474   1.1       uch 			sc->sm_tmpreg = UCB1200_ADCCTRL_INPUT_SET(
    475   1.1       uch 				UCB1200_ADCCTRL_ENABLE,
    476   1.1       uch 				UCB1200_ADCCTRL_INPUT_TSPY);
    477   1.1       uch 			REGWRITE(UCB1200_ADCCTRL_REG, sc->sm_tmpreg,
    478   1.6       uch 			    UCBADC_ADC_START0);
    479   1.1       uch 			break;
    480   1.1       uch 		}
    481   1.1       uch 		break;
    482   1.1       uch 
    483   1.1       uch 	case UCBADC_ADC_START0:
    484   1.1       uch 		REGWRITE(UCB1200_ADCCTRL_REG,
    485   1.6       uch 		    sc->sm_tmpreg | UCB1200_ADCCTRL_START,
    486   1.6       uch 		    UCBADC_ADC_START1);
    487   1.1       uch 		break;
    488   1.1       uch 
    489   1.1       uch 	case UCBADC_ADC_START1:
    490   1.1       uch 		REGWRITE(UCB1200_ADCCTRL_REG,
    491   1.6       uch 		    sc->sm_tmpreg,
    492   1.6       uch 		    UCBADC_ADC_DATAREAD);
    493   1.3       uch 		sc->sm_retry = UCBADC_RETRY_DEFAULT;
    494   1.1       uch 		break;
    495   1.1       uch 
    496   1.1       uch 	case UCBADC_ADC_DATAREAD:
    497   1.1       uch 		REGREAD(UCB1200_ADCDATA_REG, UCBADC_ADC_DATAREAD_WAIT);
    498   1.1       uch 		break;
    499   1.1       uch 
    500   1.1       uch 	case UCBADC_ADC_DATAREAD_WAIT:
    501   1.1       uch 		reg16 = TX39_SIBSF0_REGDATA(sc->sm_reg);
    502   1.1       uch 		if (!(reg16 & UCB1200_ADCDATA_INPROGRESS) &&
    503   1.1       uch 		    --sc->sm_retry > 0) {
    504   1.1       uch 			sc->sm_state = UCBADC_ADC_DATAREAD;
    505   1.1       uch 		} else {
    506   1.1       uch 			if (sc->sm_retry <= 0) {
    507   1.1       uch 				printf("dataread failed\n");
    508   1.1       uch 				sc->sm_state = UCBADC_ADC_FINI;
    509   1.1       uch 				break;
    510   1.1       uch 			}
    511   1.1       uch 
    512   1.1       uch 			switch (sc->sm_measurement) {
    513   1.1       uch 			case UCBADC_MEASUREMENT_X:
    514   1.1       uch 				sc->sc_x = UCB1200_ADCDATA(reg16);
    515   1.1       uch 				DPRINTFN(9, ("x=%d\n", sc->sc_x));
    516   1.1       uch 				break;
    517   1.1       uch 			case UCBADC_MEASUREMENT_Y:
    518   1.1       uch 				sc->sc_y = UCB1200_ADCDATA(reg16);
    519   1.1       uch 				DPRINTFN(9, ("y=%d\n", sc->sc_y));
    520   1.1       uch 				break;
    521   1.1       uch 			case UCBADC_MEASUREMENT_PRESSURE:
    522   1.1       uch 				sc->sc_p = UCB1200_ADCDATA(reg16);
    523   1.1       uch 				DPRINTFN(9, ("p=%d\n", sc->sc_p));
    524   1.1       uch 				break;
    525   1.1       uch 			}
    526   1.1       uch 
    527   1.1       uch 			sc->sm_state = UCBADC_ADC_DISABLE;
    528   1.1       uch 		}
    529   1.1       uch 
    530   1.1       uch 		break;
    531   1.1       uch 
    532   1.1       uch 	case UCBADC_ADC_DISABLE:
    533   1.1       uch 		REGWRITE(UCB1200_ADCCTRL_REG, 0, UCBADC_ADC_INTRMODE);
    534   1.1       uch 
    535   1.1       uch 		break;
    536   1.1       uch 	case UCBADC_ADC_INTRMODE:
    537   1.1       uch 		REGWRITE(UCB1200_TSCTRL_REG, UCB1200_TSCTRL_INTERRUPT,
    538   1.6       uch 		    UCBADC_MEASUMENT_FINI);
    539   1.1       uch 		break;
    540   1.1       uch 
    541   1.1       uch 	case UCBADC_ADC_INPUT:
    542   1.1       uch 		if (ucbtp_input(sc) == 0)
    543   1.1       uch 			sc->sm_state = UCBADC_ADC_FINI;
    544   1.1       uch 		else
    545   1.1       uch 			sc->sm_state = UCBADC_INTR_ACK0;
    546   1.1       uch 		break;
    547   1.1       uch 
    548   1.1       uch 	case UCBADC_INTR_ACK0:
    549   1.1       uch 		REGREAD(UCB1200_INTSTAT_REG, UCBADC_INTR_ACK1);
    550   1.1       uch 		break;
    551   1.1       uch 
    552   1.1       uch 	case UCBADC_INTR_ACK1:
    553   1.1       uch 		REGWRITE(UCB1200_INTSTAT_REG, sc->sm_reg, UCBADC_INTR_ACK2);
    554   1.1       uch 		break;
    555   1.1       uch 
    556   1.1       uch 	case UCBADC_INTR_ACK2:
    557   1.1       uch 		sc->sc_polling_finish = 1;
    558   1.1       uch 		REGWRITE(UCB1200_INTSTAT_REG, 0, UCBADC_ADC_FINI);
    559   1.1       uch 		break;
    560   1.1       uch 
    561   1.6       uch 		/*
    562   1.6       uch 		 * UCB1200 register access state
    563   1.6       uch 		 */
    564   1.1       uch 	case UCBADC_REGREAD:
    565   1.1       uch 		/*
    566   1.1       uch 		 * In	: sc->sm_addr
    567   1.1       uch 		 * Out	: sc->sm_reg  (with SIBtag)
    568   1.1       uch 		 */
    569   1.1       uch #define TXSIB_REGREAD_INIT	0
    570   1.1       uch #define TXSIB_REGREAD_READ	1
    571   1.1       uch 		switch (sc->sm_read_state) {
    572   1.1       uch 		case TXSIB_REGREAD_INIT:
    573   1.1       uch 			reg = TX39_SIBSF0_REGADDR_SET(0, sc->sm_addr);
    574   1.1       uch 			tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg);
    575   1.3       uch 			sc->sm_rw_retry = UCBADC_RETRY_DEFAULT;
    576   1.1       uch 			sc->sm_read_state = TXSIB_REGREAD_READ;
    577   1.1       uch 			break;
    578   1.1       uch 		case TXSIB_REGREAD_READ:
    579   1.1       uch 			reg = tx_conf_read(tc, TX39_SIBSF0STAT_REG);
    580   1.1       uch 			if ((TX39_SIBSF0_REGADDR(reg) != sc->sm_addr) &&
    581   1.1       uch 			    --sc->sm_rw_retry > 0) {
    582   1.1       uch 				break;
    583   1.1       uch 			}
    584   1.1       uch 
    585   1.1       uch 			if (sc->sm_rw_retry <= 0) {
    586   1.1       uch 				printf("sf0read: command failed\n");
    587   1.1       uch 				sc->sm_state = UCBADC_ADC_FINI;
    588   1.1       uch 			} else {
    589   1.1       uch 				sc->sm_reg = reg;
    590   1.1       uch 				sc->sm_read_state = TXSIB_REGREAD_INIT;
    591   1.1       uch 				DPRINTFN(9, ("%08x\n", reg));
    592   1.1       uch 				if (sc->sm_writing)
    593   1.1       uch 					sc->sm_state = UCBADC_REGWRITE;
    594   1.1       uch 				else
    595   1.1       uch 					sc->sm_state = sc->sm_returnstate;
    596   1.1       uch 			}
    597   1.1       uch 			break;
    598   1.1       uch 		}
    599   1.1       uch 		break;
    600   1.1       uch 
    601   1.1       uch 	case UCBADC_REGWRITE:
    602   1.1       uch 		/*
    603   1.1       uch 		 * In	: sc->sm_addr, sc->sm_reg (lower 16bit only)
    604   1.1       uch 		 */
    605   1.1       uch #define TXSIB_REGWRITE_INIT	0
    606   1.1       uch #define TXSIB_REGWRITE_WRITE	1
    607   1.1       uch 		switch (sc->sm_write_state) {
    608   1.1       uch 		case TXSIB_REGWRITE_INIT:
    609   1.1       uch 			sc->sm_writing = 1;
    610   1.1       uch 			sc->sm_write_state = TXSIB_REGWRITE_WRITE;
    611   1.1       uch 			sc->sm_state = UCBADC_REGREAD;
    612   1.1       uch 
    613   1.1       uch 			sc->sm_write_val = sc->sm_reg;
    614   1.1       uch 			break;
    615   1.1       uch 		case TXSIB_REGWRITE_WRITE:
    616   1.1       uch 			sc->sm_writing = 0;
    617   1.1       uch 			sc->sm_write_state = TXSIB_REGWRITE_INIT;
    618   1.1       uch 			sc->sm_state = sc->sm_returnstate;
    619   1.1       uch 
    620   1.1       uch 			reg = sc->sm_reg;
    621   1.1       uch 			reg |= TX39_SIBSF0_WRITE;
    622   1.1       uch 			TX39_SIBSF0_REGDATA_CLR(reg);
    623   1.1       uch 			reg = TX39_SIBSF0_REGDATA_SET(reg, sc->sm_write_val);
    624   1.1       uch 			tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg);
    625   1.1       uch 			break;
    626   1.1       uch 		}
    627   1.1       uch 		break;
    628   1.1       uch 	}
    629   1.1       uch 
    630   1.4       uch 	return (0);
    631   1.1       uch }
    632   1.1       uch 
    633   1.1       uch int
    634   1.6       uch ucbtp_input(struct ucbtp_softc *sc)
    635   1.1       uch {
    636   1.4       uch 	int rx, ry, x, y, p;
    637   1.4       uch 
    638   1.4       uch 	rx = sc->sc_x;
    639   1.4       uch 	ry = sc->sc_y;
    640   1.4       uch 	p = sc->sc_p;
    641   1.1       uch 
    642   1.3       uch 	if (!sc->sc_calibrated) {
    643   1.4       uch 		DPRINTFN(2, ("x=%4d y=%4d p=%4d\n", rx, ry, p));
    644   1.4       uch 		DPRINTF(("ucbtp_input: no calibration data\n"));
    645   1.1       uch 	}
    646   1.1       uch 
    647   1.4       uch 	if (p < UCBTS_PRESS_THRESHOLD || rx == 0x3ff || ry == 0x3ff ||
    648   1.4       uch 	    rx == 0 || ry == 0) {
    649   1.1       uch 		sc->sc_stat = UCBTS_STAT_RELEASE;
    650   1.1       uch 		if (sc->sc_polling < UCBTS_TAP_THRESHOLD) {
    651   1.3       uch 			DPRINTFN(2, ("TAP!\n"));
    652   1.1       uch 			/* button 0 DOWN */
    653  1.16    plunky 			wsmouse_input(sc->sc_wsmousedev, 1, 0, 0, 0, 0, 0);
    654   1.1       uch 			/* button 0 UP */
    655  1.16    plunky 			wsmouse_input(sc->sc_wsmousedev, 0, 0, 0, 0, 0, 0);
    656   1.1       uch 		} else {
    657   1.1       uch 			wsmouse_input(sc->sc_wsmousedev, 0,
    658  1.16    plunky 			    sc->sc_ox, sc->sc_oy, 0, 0,
    659   1.6       uch 			    WSMOUSE_INPUT_ABSOLUTE_X |
    660   1.6       uch 			    WSMOUSE_INPUT_ABSOLUTE_Y);
    661   1.1       uch 
    662   1.3       uch 			DPRINTFN(2, ("RELEASE\n"));
    663   1.1       uch 		}
    664   1.1       uch 		sc->sc_polling = 0;
    665   1.1       uch 
    666   1.4       uch 		return (1);
    667   1.4       uch 	}
    668   1.4       uch 
    669   1.4       uch 	if (sc->sc_xy_reverse)
    670   1.4       uch 		tpcalib_trans(&sc->sc_tpcalib, ry, rx, &x, &y);
    671   1.4       uch 	else
    672   1.4       uch 		tpcalib_trans(&sc->sc_tpcalib, rx, ry, &x, &y);
    673   1.4       uch 
    674   1.4       uch 	DPRINTFN(2, ("x: %4d->%4d y: %4d->%4d pressure=%4d\n",
    675   1.6       uch 	    rx, x, ry, y, p));
    676   1.4       uch 
    677   1.4       uch 	/* debug draw */
    678   1.4       uch 	if (sc->sc_tc->tc_videot) {
    679   1.4       uch 		if (sc->sc_polling == 1)
    680   1.4       uch 			video_dot(sc->sc_tc->tc_videot, x, y);
    681   1.4       uch 		else
    682   1.4       uch 			video_line(sc->sc_tc->tc_videot, sc->sc_ox,
    683   1.6       uch 			    sc->sc_oy, x, y);
    684   1.1       uch 	}
    685   1.1       uch 
    686   1.1       uch 	sc->sc_ox = x, sc->sc_oy = y;
    687   1.4       uch 
    688  1.16    plunky 	wsmouse_input(sc->sc_wsmousedev, 1, x, y, 0, 0,
    689   1.6       uch 	    WSMOUSE_INPUT_ABSOLUTE_X | WSMOUSE_INPUT_ABSOLUTE_Y);
    690   1.1       uch 
    691   1.4       uch 	return (0);
    692   1.1       uch }
    693   1.1       uch 
    694   1.1       uch /*
    695   1.1       uch  * access ops.
    696   1.1       uch  */
    697   1.1       uch 
    698   1.1       uch int
    699   1.6       uch ucbtp_enable(void *v)
    700   1.1       uch {
    701   1.1       uch 	/* not yet */
    702   1.4       uch 	return (0);
    703   1.1       uch }
    704   1.1       uch 
    705   1.1       uch void
    706   1.6       uch ucbtp_disable(void *v)
    707   1.1       uch {
    708   1.1       uch 	/* not yet */
    709   1.1       uch }
    710   1.1       uch 
    711   1.1       uch int
    712  1.17  christos ucbtp_ioctl(void *v, u_long cmd, void *data, int flag, struct lwp *l)
    713   1.1       uch {
    714   1.1       uch 	struct ucbtp_softc *sc = v;
    715   1.1       uch 
    716   1.1       uch 	DPRINTF(("%s(%d): ucbtp_ioctl(%08lx)\n", __FILE__, __LINE__, cmd));
    717   1.1       uch 
    718   1.1       uch 	switch (cmd) {
    719   1.1       uch 	case WSMOUSEIO_SRES:
    720   1.1       uch 		printf("%s(%d): WSMOUSRIO_SRES is not supported",
    721   1.6       uch 		    __FILE__, __LINE__);
    722   1.1       uch 		break;
    723   1.1       uch 
    724   1.1       uch 	default:
    725  1.15  christos 		return hpc_tpanel_ioctl(&sc->sc_tpcalib, cmd, data, flag, l);
    726   1.1       uch 	}
    727   1.4       uch 
    728  1.13    tsarna 	return 0;
    729   1.1       uch }
    730