ucbtp.c revision 1.2 1 1.2 uch /* $NetBSD: ucbtp.c,v 1.2 2000/01/16 21:47:01 uch Exp $ */
2 1.1 uch
3 1.1 uch /*
4 1.1 uch * Copyright (c) 2000, by UCHIYAMA Yasushi
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * Redistribution and use in source and binary forms, with or without
8 1.1 uch * modification, are permitted provided that the following conditions
9 1.1 uch * are met:
10 1.1 uch * 1. Redistributions of source code must retain the above copyright
11 1.1 uch * notice, this list of conditions and the following disclaimer.
12 1.1 uch * 2. The name of the developer may NOT be used to endorse or promote products
13 1.1 uch * derived from this software without specific prior written permission.
14 1.1 uch *
15 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 1.1 uch * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 1.1 uch * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 1.1 uch * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 1.1 uch * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 1.1 uch * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 1.1 uch * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 1.1 uch * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 1.1 uch * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 1.1 uch * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 1.1 uch * SUCH DAMAGE.
26 1.1 uch *
27 1.1 uch */
28 1.1 uch
29 1.1 uch /*
30 1.1 uch * Device driver for PHILIPS UCB1200 Advanced modem/audio analog front-end
31 1.1 uch * Touch panel part.
32 1.1 uch */
33 1.1 uch #define UCBTPDEBUG
34 1.1 uch
35 1.1 uch #include "opt_tx39_debug.h"
36 1.1 uch #include "opt_use_poll.h"
37 1.1 uch
38 1.1 uch #include <sys/param.h>
39 1.1 uch #include <sys/systm.h>
40 1.1 uch #include <sys/device.h>
41 1.1 uch
42 1.1 uch #include <machine/bus.h>
43 1.1 uch #include <machine/intr.h>
44 1.1 uch #include <machine/bootinfo.h> /* bootinfo */
45 1.1 uch
46 1.1 uch #include <dev/wscons/wsconsio.h>
47 1.1 uch #include <dev/wscons/wsmousevar.h>
48 1.1 uch
49 1.1 uch #include <hpcmips/dev/tpcalibvar.h>
50 1.1 uch
51 1.1 uch #include <hpcmips/tx/tx39var.h>
52 1.1 uch #include <hpcmips/tx/tx39sibvar.h>
53 1.1 uch #include <hpcmips/tx/tx39sibreg.h>
54 1.1 uch #include <hpcmips/tx/tx39icureg.h>
55 1.1 uch
56 1.1 uch #ifdef TX391X
57 1.1 uch #include <hpcmips/tx/tx3912videovar.h> /* debug */
58 1.1 uch #endif
59 1.1 uch #include <hpcmips/dev/ucb1200var.h>
60 1.1 uch #include <hpcmips/dev/ucb1200reg.h>
61 1.1 uch
62 1.1 uch #include <hpcmips/tx/txsnd.h>
63 1.1 uch
64 1.1 uch #ifdef UCBTPDEBUG
65 1.1 uch int ucbtp_debug = 1;
66 1.1 uch #define DPRINTF(arg) if (ucbtp_debug) printf arg;
67 1.1 uch #define DPRINTFN(n, arg) if (ucbtp_debug > (n)) printf arg;
68 1.1 uch #else
69 1.1 uch #define DPRINTF(arg)
70 1.1 uch #define DPRINTFN(n, arg)
71 1.1 uch #endif
72 1.1 uch
73 1.1 uch enum ucbts_stat {
74 1.1 uch UCBTS_STAT_DISABLE,
75 1.1 uch UCBTS_STAT_RELEASE,
76 1.1 uch UCBTS_STAT_TOUCH,
77 1.1 uch UCBTS_STAT_DRAG,
78 1.1 uch };
79 1.1 uch
80 1.1 uch #define UCBTS_POSX 1
81 1.1 uch #define UCBTS_POSY 2
82 1.1 uch #define UCBTS_PRESS 3
83 1.1 uch
84 1.1 uch #define UCBTS_PRESS_THRESHOLD 100
85 1.1 uch #define UCBTS_TAP_THRESHOLD 5
86 1.1 uch
87 1.1 uch enum ucbadc_state {
88 1.1 uch /* 0 */ UCBADC_IDLE,
89 1.1 uch /* 1 */ UCBADC_ADC_INIT,
90 1.1 uch /* 2 */ UCBADC_ADC_FINI,
91 1.1 uch /* 3 */ UCBADC_MEASUMENT_INIT,
92 1.1 uch /* 4 */ UCBADC_MEASUMENT_FINI,
93 1.1 uch /* 5 */ UCBADC_ADC_ENABLE,
94 1.1 uch /* 6 */ UCBADC_ADC_START0,
95 1.1 uch /* 7 */ UCBADC_ADC_START1,
96 1.1 uch /* 8 */ UCBADC_ADC_DATAREAD,
97 1.1 uch /* 9 */ UCBADC_ADC_DATAREAD_WAIT,
98 1.1 uch /*10 */ UCBADC_ADC_DISABLE,
99 1.1 uch /*11 */ UCBADC_ADC_INTRMODE,
100 1.1 uch /*12 */ UCBADC_ADC_INPUT,
101 1.1 uch /*13 */ UCBADC_INTR_ACK0,
102 1.1 uch /*14 */ UCBADC_INTR_ACK1,
103 1.1 uch /*15 */ UCBADC_INTR_ACK2,
104 1.1 uch /*16 */ UCBADC_REGREAD,
105 1.1 uch /*17 */ UCBADC_REGWRITE
106 1.1 uch };
107 1.1 uch
108 1.1 uch struct ucbtp_softc {
109 1.1 uch struct device sc_dev;
110 1.1 uch struct device *sc_sib; /* parent (TX39 SIB module) */
111 1.1 uch struct device *sc_ucb; /* parent (UCB1200 module) */
112 1.1 uch tx_chipset_tag_t sc_tc;
113 1.1 uch
114 1.1 uch enum ucbts_stat sc_stat;
115 1.1 uch int sc_polling;
116 1.1 uch int sc_polling_finish;
117 1.1 uch void *sc_pollh;
118 1.1 uch
119 1.1 uch struct tpcalib_softc sc_tpcalib;
120 1.1 uch int sc_calibrated;
121 1.1 uch
122 1.1 uch /* measurement value */
123 1.1 uch int sc_x, sc_y, sc_p;
124 1.1 uch int sc_ox, sc_oy;
125 1.1 uch
126 1.1 uch /*
127 1.1 uch * touch panel state machine
128 1.1 uch */
129 1.1 uch void *sm_ih; /* TX39 SIB subframe 0 interrupt handler */
130 1.1 uch
131 1.1 uch int sm_addr; /* UCB1200 register address */
132 1.1 uch u_int32_t sm_reg; /* UCB1200 register data & TX39 SIB header */
133 1.1 uch int sm_tmpreg;
134 1.1 uch int sm_retry; /* retry counter */
135 1.1 uch
136 1.1 uch enum ucbadc_state sm_state;
137 1.1 uch int sm_measurement; /* X, Y, Pressure */
138 1.1 uch #define UCBADC_MEASUREMENT_X 0
139 1.1 uch #define UCBADC_MEASUREMENT_Y 1
140 1.1 uch #define UCBADC_MEASUREMENT_PRESSURE 2
141 1.1 uch int sm_returnstate;
142 1.1 uch
143 1.1 uch int sm_read_state, sm_write_state;
144 1.1 uch int sm_writing; /* writing state flag */
145 1.1 uch u_int32_t sm_write_val; /* temporary buffer */
146 1.1 uch
147 1.1 uch int sm_rw_retry; /* retry counter for r/w */
148 1.1 uch
149 1.1 uch /* wsmouse */
150 1.1 uch struct device *sc_wsmousedev;
151 1.1 uch };
152 1.1 uch
153 1.1 uch int ucbtp_match __P((struct device*, struct cfdata*, void*));
154 1.1 uch void ucbtp_attach __P((struct device*, struct device*, void*));
155 1.1 uch
156 1.1 uch int ucbtp_sibintr __P((void*));
157 1.1 uch int ucbtp_poll __P((void*));
158 1.1 uch int ucbtp_adc_async __P((void*));
159 1.1 uch int ucbtp_input __P((struct ucbtp_softc*));
160 1.1 uch int ucbtp_busy __P((void*));
161 1.1 uch
162 1.1 uch int ucbtp_enable __P((void*));
163 1.1 uch int ucbtp_ioctl __P((void*, u_long, caddr_t, int, struct proc*));
164 1.1 uch void ucbtp_disable __P((void*));
165 1.1 uch
166 1.1 uch struct cfattach ucbtp_ca = {
167 1.1 uch sizeof(struct ucbtp_softc), ucbtp_match, ucbtp_attach
168 1.1 uch };
169 1.1 uch
170 1.1 uch const struct wsmouse_accessops ucbtp_accessops = {
171 1.1 uch ucbtp_enable,
172 1.1 uch ucbtp_ioctl,
173 1.1 uch ucbtp_disable,
174 1.1 uch };
175 1.1 uch
176 1.1 uch /*
177 1.1 uch * XXX currently no calibration method. this is temporary hack.
178 1.1 uch */
179 1.1 uch #include <machine/platid.h>
180 1.1 uch
181 1.1 uch struct wsmouse_calibcoords *calibration_sample_lookup __P((void));
182 1.1 uch int ucbtp_calibration __P((struct ucbtp_softc*));
183 1.1 uch
184 1.1 uch struct calibration_sample_table {
185 1.1 uch platid_t cst_platform;
186 1.1 uch struct wsmouse_calibcoords cst_sample;
187 1.1 uch } calibration_sample_table[] = {
188 1.1 uch {{{PLATID_WILD, PLATID_MACH_COMPAQ_C_8XX}}, /* uch machine */
189 1.1 uch { 0, 0, 639, 239, 5,
190 1.1 uch {{ 507, 510, 320, 120 },
191 1.1 uch { 898, 757, 40, 40 },
192 1.1 uch { 900, 255, 40, 200 },
193 1.1 uch { 109, 249, 600, 200 },
194 1.1 uch { 110, 753, 600, 40 }}}},
195 1.1 uch
196 1.1 uch {{{PLATID_WILD, PLATID_MACH_COMPAQ_C_2010}}, /* uch machine */
197 1.1 uch { 0, 0, 639, 239, 5,
198 1.1 uch {{ 506, 487, 320, 120 },
199 1.1 uch { 880, 250, 40, 40 },
200 1.1 uch { 880, 718, 40, 200 },
201 1.1 uch { 140, 726, 600, 200 },
202 1.1 uch { 137, 250, 600, 40 }}}},
203 1.1 uch
204 1.1 uch {{{PLATID_WILD, PLATID_MACH_SHARP_MOBILON_HC4100}}, /* uch machine */
205 1.1 uch { 0, 0, 639, 239, 5,
206 1.1 uch {{ 497, 501, 320, 120 },
207 1.1 uch { 752, 893, 40, 40 },
208 1.1 uch { 242, 891, 40, 200 },
209 1.1 uch { 241, 115, 600, 200 },
210 1.1 uch { 747, 101, 600, 40 }}}},
211 1.1 uch
212 1.1 uch {{{PLATID_UNKNOWN, PLATID_UNKNOWN}},
213 1.1 uch { 0, 0, 639, 239, 5,
214 1.1 uch {{0, 0, 0, 0},
215 1.1 uch {0, 0, 0, 0},
216 1.1 uch {0, 0, 0, 0},
217 1.1 uch {0, 0, 0, 0},
218 1.1 uch {0, 0, 0, 0}}}},
219 1.1 uch };
220 1.1 uch
221 1.1 uch struct wsmouse_calibcoords *
222 1.1 uch calibration_sample_lookup()
223 1.1 uch {
224 1.1 uch struct calibration_sample_table *tab;
225 1.1 uch platid_mask_t mask;
226 1.1 uch
227 1.1 uch for (tab = calibration_sample_table;
228 1.1 uch tab->cst_platform.dw.dw1 != PLATID_UNKNOWN; tab++) {
229 1.1 uch
230 1.1 uch mask = PLATID_DEREF(&tab->cst_platform);
231 1.1 uch
232 1.1 uch if (platid_match(&platid, &mask)) {
233 1.1 uch return &tab->cst_sample;
234 1.1 uch }
235 1.1 uch }
236 1.1 uch
237 1.1 uch return 0;
238 1.1 uch }
239 1.1 uch
240 1.1 uch int
241 1.1 uch ucbtp_calibration(sc)
242 1.1 uch struct ucbtp_softc *sc;
243 1.1 uch {
244 1.1 uch struct wsmouse_calibcoords *cs;
245 1.1 uch #ifdef TX391X
246 1.1 uch tx3912video_calibration_pattern(); /* debug */
247 1.1 uch #endif
248 1.1 uch tpcalib_init(&sc->sc_tpcalib);
249 1.1 uch
250 1.1 uch if (!(cs = calibration_sample_lookup())) {
251 1.1 uch printf("no calibration data");
252 1.1 uch return 1;
253 1.1 uch }
254 1.1 uch
255 1.1 uch sc->sc_calibrated =
256 1.1 uch tpcalib_ioctl(&sc->sc_tpcalib, WSMOUSEIO_SCALIBCOORDS,
257 1.1 uch (caddr_t)cs, 0, 0) == 0 ? 1 : 0;
258 1.1 uch
259 1.1 uch if (!sc->sc_calibrated)
260 1.1 uch printf("not ");
261 1.1 uch printf("calibrated");
262 1.1 uch
263 1.1 uch return 0;
264 1.1 uch }
265 1.1 uch
266 1.1 uch int
267 1.1 uch ucbtp_match(parent, cf, aux)
268 1.1 uch struct device *parent;
269 1.1 uch struct cfdata *cf;
270 1.1 uch void *aux;
271 1.1 uch {
272 1.1 uch return 1;
273 1.1 uch }
274 1.1 uch
275 1.1 uch void
276 1.1 uch ucbtp_attach(parent, self, aux)
277 1.1 uch struct device *parent;
278 1.1 uch struct device *self;
279 1.1 uch void *aux;
280 1.1 uch {
281 1.1 uch struct ucb1200_attach_args *ucba = aux;
282 1.1 uch struct ucbtp_softc *sc = (void*)self;
283 1.1 uch struct wsmousedev_attach_args wsmaa;
284 1.1 uch tx_chipset_tag_t tc;
285 1.1 uch
286 1.1 uch tc = sc->sc_tc = ucba->ucba_tc;
287 1.1 uch sc->sc_sib = ucba->ucba_sib;
288 1.1 uch sc->sc_ucb = ucba->ucba_ucb;
289 1.1 uch
290 1.1 uch printf(": ");
291 1.1 uch /* touch panel interrupt */
292 1.1 uch tx_intr_establish(tc, MAKEINTR(1, TX39_INTRSTATUS1_SIBIRQPOSINT),
293 1.1 uch IST_EDGE, IPL_TTY, ucbtp_sibintr, sc);
294 1.1 uch
295 1.1 uch /* attempt to calibrate touch panel */
296 1.1 uch ucbtp_calibration(sc);
297 1.1 uch
298 1.1 uch printf("\n");
299 1.1 uch
300 1.1 uch wsmaa.accessops = &ucbtp_accessops;
301 1.1 uch wsmaa.accesscookie = sc;
302 1.1 uch
303 1.1 uch ucb1200_state_install(parent, ucbtp_busy, self, UCB1200_TP_MODULE);
304 1.1 uch
305 1.1 uch /*
306 1.1 uch * attach the wsmouse
307 1.1 uch */
308 1.1 uch sc->sc_wsmousedev = config_found(self, &wsmaa, wsmousedevprint);
309 1.1 uch }
310 1.1 uch
311 1.1 uch int
312 1.1 uch ucbtp_busy(arg)
313 1.1 uch void *arg;
314 1.1 uch {
315 1.1 uch struct ucbtp_softc *sc = arg;
316 1.1 uch
317 1.1 uch return sc->sm_state != UCBADC_IDLE;
318 1.1 uch }
319 1.1 uch
320 1.1 uch int
321 1.1 uch ucbtp_poll(arg)
322 1.1 uch void *arg;
323 1.1 uch {
324 1.1 uch struct ucbtp_softc *sc = arg;
325 1.1 uch
326 1.1 uch if (!ucb1200_state_idle(sc->sc_ucb)) /* subframe0 busy */
327 1.1 uch return POLL_CONT;
328 1.1 uch
329 1.1 uch if (sc->sc_polling_finish) {
330 1.1 uch sc->sc_polling_finish = 0;
331 1.1 uch return POLL_END;
332 1.1 uch }
333 1.1 uch
334 1.1 uch /* execute A-D converter */
335 1.1 uch sc->sm_state = UCBADC_ADC_INIT;
336 1.1 uch ucbtp_adc_async(sc);
337 1.1 uch
338 1.1 uch return POLL_CONT;
339 1.1 uch }
340 1.1 uch
341 1.1 uch int
342 1.1 uch ucbtp_sibintr(arg)
343 1.1 uch void *arg;
344 1.1 uch {
345 1.1 uch struct ucbtp_softc *sc = arg;
346 1.1 uch
347 1.1 uch sc->sc_stat = UCBTS_STAT_TOUCH;
348 1.1 uch
349 1.1 uch /* click! */
350 1.1 uch tx_sound_click(sc->sc_tc);
351 1.1 uch
352 1.1 uch /* invoke touch panel polling */
353 1.1 uch if (!sc->sc_polling) {
354 1.1 uch sc->sc_pollh = tx39_poll_establish(sc->sc_tc, 1, IST_EDGE,
355 1.1 uch ucbtp_poll, sc);
356 1.1 uch if (!sc->sc_pollh) {
357 1.1 uch printf("%s: can't poll\n", sc->sc_dev.dv_xname);
358 1.1 uch }
359 1.1 uch }
360 1.1 uch
361 1.1 uch /* don't acknoledge interrupt until polling finish */
362 1.1 uch
363 1.1 uch return 0;
364 1.1 uch }
365 1.1 uch
366 1.1 uch #define REGWRITE(addr, reg, ret) ( \
367 1.1 uch sc->sm_addr = (addr), \
368 1.1 uch sc->sm_reg = (reg), \
369 1.1 uch sc->sm_returnstate = (ret),\
370 1.1 uch sc->sm_state = UCBADC_REGWRITE)
371 1.1 uch #define REGREAD(addr, ret) ( \
372 1.1 uch sc->sm_addr = (addr), \
373 1.1 uch sc->sm_returnstate = (ret), \
374 1.1 uch sc->sm_state = UCBADC_REGREAD)
375 1.1 uch
376 1.1 uch int
377 1.1 uch ucbtp_adc_async(arg)
378 1.1 uch void *arg;
379 1.1 uch {
380 1.1 uch struct ucbtp_softc *sc = arg;
381 1.1 uch tx_chipset_tag_t tc = sc->sc_tc;
382 1.1 uch txreg_t reg;
383 1.1 uch u_int16_t reg16;
384 1.1 uch
385 1.1 uch DPRINTFN(9, ("state: %d\n", sc->sm_state));
386 1.1 uch
387 1.1 uch switch (sc->sm_state) {
388 1.1 uch default:
389 1.1 uch panic("ucbtp_adc: invalid state %d", sc->sm_state);
390 1.1 uch /* NOTREACHED */
391 1.1 uch break;
392 1.1 uch
393 1.1 uch case UCBADC_IDLE:
394 1.1 uch /* nothing to do */
395 1.1 uch break;
396 1.1 uch
397 1.1 uch case UCBADC_ADC_INIT:
398 1.1 uch sc->sc_polling++;
399 1.1 uch sc->sc_stat = UCBTS_STAT_DRAG;
400 1.1 uch /* enable heart beat of this state machine */
401 1.1 uch sc->sm_ih = tx_intr_establish(
402 1.1 uch tc,
403 1.1 uch MAKEINTR(1, TX39_INTRSTATUS1_SIBSF0INT),
404 1.1 uch IST_EDGE, IPL_TTY, ucbtp_adc_async, sc);
405 1.1 uch
406 1.1 uch sc->sm_state = UCBADC_MEASUMENT_INIT;
407 1.1 uch break;
408 1.1 uch
409 1.1 uch case UCBADC_ADC_FINI:
410 1.1 uch /* disable heart beat of this state machine */
411 1.1 uch tx_intr_disestablish(tc, sc->sm_ih);
412 1.1 uch sc->sm_state = UCBADC_IDLE;
413 1.1 uch break;
414 1.1 uch
415 1.1 uch case UCBADC_MEASUMENT_INIT:
416 1.1 uch switch (sc->sm_measurement) {
417 1.1 uch default:
418 1.1 uch panic("unknown measurement spec.");
419 1.1 uch /* NOTREACHED */
420 1.1 uch break;
421 1.1 uch case UCBADC_MEASUREMENT_X:
422 1.1 uch REGWRITE(UCB1200_TSCTRL_REG,
423 1.1 uch UCB1200_TSCTRL_XPOSITION,
424 1.1 uch UCBADC_ADC_ENABLE);
425 1.1 uch break;
426 1.1 uch case UCBADC_MEASUREMENT_Y:
427 1.1 uch REGWRITE(UCB1200_TSCTRL_REG,
428 1.1 uch UCB1200_TSCTRL_YPOSITION,
429 1.1 uch UCBADC_ADC_ENABLE);
430 1.1 uch break;
431 1.1 uch case UCBADC_MEASUREMENT_PRESSURE:
432 1.1 uch REGWRITE(UCB1200_TSCTRL_REG,
433 1.1 uch UCB1200_TSCTRL_PRESSURE,
434 1.1 uch UCBADC_ADC_ENABLE);
435 1.1 uch break;
436 1.1 uch }
437 1.1 uch break;
438 1.1 uch
439 1.1 uch case UCBADC_MEASUMENT_FINI:
440 1.1 uch switch (sc->sm_measurement) {
441 1.1 uch case UCBADC_MEASUREMENT_X:
442 1.1 uch sc->sm_measurement = UCBADC_MEASUREMENT_Y;
443 1.1 uch sc->sm_state = UCBADC_MEASUMENT_INIT;
444 1.1 uch break;
445 1.1 uch case UCBADC_MEASUREMENT_Y:
446 1.1 uch sc->sm_measurement = UCBADC_MEASUREMENT_PRESSURE;
447 1.1 uch sc->sm_state = UCBADC_MEASUMENT_INIT;
448 1.1 uch break;
449 1.1 uch case UCBADC_MEASUREMENT_PRESSURE:
450 1.1 uch sc->sm_measurement = UCBADC_MEASUREMENT_X;
451 1.1 uch /* measument complete. pass down to wsmouse_input */
452 1.1 uch sc->sm_state = UCBADC_ADC_INPUT;
453 1.1 uch break;
454 1.1 uch }
455 1.1 uch break;
456 1.1 uch
457 1.1 uch case UCBADC_ADC_ENABLE:
458 1.1 uch switch (sc->sm_measurement) {
459 1.1 uch case UCBADC_MEASUREMENT_PRESSURE:
460 1.1 uch /* FALLTHROUGH */
461 1.1 uch case UCBADC_MEASUREMENT_X:
462 1.1 uch sc->sm_tmpreg = UCB1200_ADCCTRL_INPUT_SET(
463 1.1 uch UCB1200_ADCCTRL_ENABLE,
464 1.1 uch UCB1200_ADCCTRL_INPUT_TSPX);
465 1.1 uch REGWRITE(UCB1200_ADCCTRL_REG, sc->sm_tmpreg,
466 1.1 uch UCBADC_ADC_START0);
467 1.1 uch break;
468 1.1 uch case UCBADC_MEASUREMENT_Y:
469 1.1 uch sc->sm_tmpreg = UCB1200_ADCCTRL_INPUT_SET(
470 1.1 uch UCB1200_ADCCTRL_ENABLE,
471 1.1 uch UCB1200_ADCCTRL_INPUT_TSPY);
472 1.1 uch REGWRITE(UCB1200_ADCCTRL_REG, sc->sm_tmpreg,
473 1.1 uch UCBADC_ADC_START0);
474 1.1 uch break;
475 1.1 uch }
476 1.1 uch break;
477 1.1 uch
478 1.1 uch case UCBADC_ADC_START0:
479 1.1 uch REGWRITE(UCB1200_ADCCTRL_REG,
480 1.1 uch sc->sm_tmpreg | UCB1200_ADCCTRL_START,
481 1.1 uch UCBADC_ADC_START1);
482 1.1 uch break;
483 1.1 uch
484 1.1 uch case UCBADC_ADC_START1:
485 1.1 uch REGWRITE(UCB1200_ADCCTRL_REG,
486 1.1 uch sc->sm_tmpreg,
487 1.1 uch UCBADC_ADC_DATAREAD);
488 1.1 uch sc->sm_retry = 100;
489 1.1 uch break;
490 1.1 uch
491 1.1 uch case UCBADC_ADC_DATAREAD:
492 1.1 uch REGREAD(UCB1200_ADCDATA_REG, UCBADC_ADC_DATAREAD_WAIT);
493 1.1 uch break;
494 1.1 uch
495 1.1 uch case UCBADC_ADC_DATAREAD_WAIT:
496 1.1 uch reg16 = TX39_SIBSF0_REGDATA(sc->sm_reg);
497 1.1 uch if (!(reg16 & UCB1200_ADCDATA_INPROGRESS) &&
498 1.1 uch --sc->sm_retry > 0) {
499 1.1 uch sc->sm_state = UCBADC_ADC_DATAREAD;
500 1.1 uch } else {
501 1.1 uch if (sc->sm_retry <= 0) {
502 1.1 uch printf("dataread failed\n");
503 1.1 uch sc->sm_state = UCBADC_ADC_FINI;
504 1.1 uch break;
505 1.1 uch }
506 1.1 uch
507 1.1 uch switch (sc->sm_measurement) {
508 1.1 uch case UCBADC_MEASUREMENT_X:
509 1.1 uch sc->sc_x = UCB1200_ADCDATA(reg16);
510 1.1 uch DPRINTFN(9, ("x=%d\n", sc->sc_x));
511 1.1 uch break;
512 1.1 uch case UCBADC_MEASUREMENT_Y:
513 1.1 uch sc->sc_y = UCB1200_ADCDATA(reg16);
514 1.1 uch DPRINTFN(9, ("y=%d\n", sc->sc_y));
515 1.1 uch break;
516 1.1 uch case UCBADC_MEASUREMENT_PRESSURE:
517 1.1 uch sc->sc_p = UCB1200_ADCDATA(reg16);
518 1.1 uch DPRINTFN(9, ("p=%d\n", sc->sc_p));
519 1.1 uch break;
520 1.1 uch }
521 1.1 uch
522 1.1 uch sc->sm_state = UCBADC_ADC_DISABLE;
523 1.1 uch }
524 1.1 uch
525 1.1 uch break;
526 1.1 uch
527 1.1 uch case UCBADC_ADC_DISABLE:
528 1.1 uch REGWRITE(UCB1200_ADCCTRL_REG, 0, UCBADC_ADC_INTRMODE);
529 1.1 uch
530 1.1 uch break;
531 1.1 uch case UCBADC_ADC_INTRMODE:
532 1.1 uch REGWRITE(UCB1200_TSCTRL_REG, UCB1200_TSCTRL_INTERRUPT,
533 1.1 uch UCBADC_MEASUMENT_FINI);
534 1.1 uch break;
535 1.1 uch
536 1.1 uch case UCBADC_ADC_INPUT:
537 1.1 uch if (ucbtp_input(sc) == 0)
538 1.1 uch sc->sm_state = UCBADC_ADC_FINI;
539 1.1 uch else
540 1.1 uch sc->sm_state = UCBADC_INTR_ACK0;
541 1.1 uch break;
542 1.1 uch
543 1.1 uch case UCBADC_INTR_ACK0:
544 1.1 uch REGREAD(UCB1200_INTSTAT_REG, UCBADC_INTR_ACK1);
545 1.1 uch break;
546 1.1 uch
547 1.1 uch case UCBADC_INTR_ACK1:
548 1.1 uch REGWRITE(UCB1200_INTSTAT_REG, sc->sm_reg, UCBADC_INTR_ACK2);
549 1.1 uch break;
550 1.1 uch
551 1.1 uch case UCBADC_INTR_ACK2:
552 1.1 uch sc->sc_polling_finish = 1;
553 1.1 uch REGWRITE(UCB1200_INTSTAT_REG, 0, UCBADC_ADC_FINI);
554 1.1 uch break;
555 1.1 uch
556 1.1 uch /*
557 1.1 uch * UCB1200 register access state
558 1.1 uch */
559 1.1 uch case UCBADC_REGREAD:
560 1.1 uch /*
561 1.1 uch * In : sc->sm_addr
562 1.1 uch * Out : sc->sm_reg (with SIBtag)
563 1.1 uch */
564 1.1 uch #define TXSIB_REGREAD_INIT 0
565 1.1 uch #define TXSIB_REGREAD_READ 1
566 1.1 uch switch (sc->sm_read_state) {
567 1.1 uch case TXSIB_REGREAD_INIT:
568 1.1 uch reg = TX39_SIBSF0_REGADDR_SET(0, sc->sm_addr);
569 1.1 uch tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg);
570 1.1 uch sc->sm_rw_retry = 100;
571 1.1 uch sc->sm_read_state = TXSIB_REGREAD_READ;
572 1.1 uch break;
573 1.1 uch case TXSIB_REGREAD_READ:
574 1.1 uch reg = tx_conf_read(tc, TX39_SIBSF0STAT_REG);
575 1.1 uch if ((TX39_SIBSF0_REGADDR(reg) != sc->sm_addr) &&
576 1.1 uch --sc->sm_rw_retry > 0) {
577 1.1 uch printf("retry!\n");
578 1.1 uch break;
579 1.1 uch }
580 1.1 uch
581 1.1 uch if (sc->sm_rw_retry <= 0) {
582 1.1 uch printf("sf0read: command failed\n");
583 1.1 uch sc->sm_state = UCBADC_ADC_FINI;
584 1.1 uch } else {
585 1.1 uch sc->sm_reg = reg;
586 1.1 uch sc->sm_read_state = TXSIB_REGREAD_INIT;
587 1.1 uch DPRINTFN(9, ("%08x\n", reg));
588 1.1 uch if (sc->sm_writing)
589 1.1 uch sc->sm_state = UCBADC_REGWRITE;
590 1.1 uch else
591 1.1 uch sc->sm_state = sc->sm_returnstate;
592 1.1 uch }
593 1.1 uch break;
594 1.1 uch }
595 1.1 uch break;
596 1.1 uch
597 1.1 uch case UCBADC_REGWRITE:
598 1.1 uch /*
599 1.1 uch * In : sc->sm_addr, sc->sm_reg (lower 16bit only)
600 1.1 uch */
601 1.1 uch #define TXSIB_REGWRITE_INIT 0
602 1.1 uch #define TXSIB_REGWRITE_WRITE 1
603 1.1 uch switch (sc->sm_write_state) {
604 1.1 uch case TXSIB_REGWRITE_INIT:
605 1.1 uch sc->sm_writing = 1;
606 1.1 uch sc->sm_write_state = TXSIB_REGWRITE_WRITE;
607 1.1 uch sc->sm_state = UCBADC_REGREAD;
608 1.1 uch
609 1.1 uch sc->sm_write_val = sc->sm_reg;
610 1.1 uch break;
611 1.1 uch case TXSIB_REGWRITE_WRITE:
612 1.1 uch sc->sm_writing = 0;
613 1.1 uch sc->sm_write_state = TXSIB_REGWRITE_INIT;
614 1.1 uch sc->sm_state = sc->sm_returnstate;
615 1.1 uch
616 1.1 uch reg = sc->sm_reg;
617 1.1 uch reg |= TX39_SIBSF0_WRITE;
618 1.1 uch TX39_SIBSF0_REGDATA_CLR(reg);
619 1.1 uch reg = TX39_SIBSF0_REGDATA_SET(reg, sc->sm_write_val);
620 1.1 uch tx_conf_write(tc, TX39_SIBSF0CTRL_REG, reg);
621 1.1 uch break;
622 1.1 uch }
623 1.1 uch break;
624 1.1 uch }
625 1.1 uch
626 1.1 uch return 0;
627 1.1 uch }
628 1.1 uch
629 1.1 uch int
630 1.1 uch ucbtp_input(sc)
631 1.1 uch struct ucbtp_softc *sc;
632 1.1 uch {
633 1.1 uch int x, y;
634 1.1 uch
635 1.1 uch if (!sc->sc_calibrated) { /* XXX definitely no problem */
636 1.1 uch printf("ucbtp_input: no calibration data\n");
637 1.1 uch return 1;
638 1.1 uch }
639 1.1 uch
640 1.1 uch tpcalib_trans(&sc->sc_tpcalib, sc->sc_x, sc->sc_y, &x, &y);
641 1.1 uch DPRINTFN(1, ("x: %d->%d y: %d->%d pressure=%d\n",
642 1.1 uch sc->sc_x, x, sc->sc_y, y, sc->sc_p));
643 1.1 uch
644 1.1 uch if (sc->sc_p < UCBTS_PRESS_THRESHOLD) {
645 1.1 uch sc->sc_stat = UCBTS_STAT_RELEASE;
646 1.1 uch if (sc->sc_polling < UCBTS_TAP_THRESHOLD) {
647 1.1 uch DPRINTFN(1, ("TAP!\n"));
648 1.1 uch /* button 0 DOWN */
649 1.1 uch wsmouse_input(sc->sc_wsmousedev, 1, 0, 0, 0, 0);
650 1.1 uch /* button 0 UP */
651 1.1 uch wsmouse_input(sc->sc_wsmousedev, 0, 0, 0, 0, 0);
652 1.1 uch } else {
653 1.1 uch wsmouse_input(sc->sc_wsmousedev, 0,
654 1.1 uch sc->sc_ox, sc->sc_oy, 0,
655 1.1 uch WSMOUSE_INPUT_ABSOLUTE_X |
656 1.1 uch WSMOUSE_INPUT_ABSOLUTE_Y);
657 1.1 uch
658 1.1 uch DPRINTFN(1, ("RELEASE\n"));
659 1.1 uch }
660 1.1 uch sc->sc_polling = 0;
661 1.1 uch
662 1.1 uch return 1;
663 1.1 uch }
664 1.1 uch
665 1.1 uch #ifdef TX391X /* debug */
666 1.1 uch if (sc->sc_polling == 1)
667 1.1 uch tx3912video_dot(x, y);
668 1.1 uch else
669 1.1 uch tx3912video_line(sc->sc_ox, sc->sc_oy, x, y);
670 1.1 uch sc->sc_ox = x, sc->sc_oy = y;
671 1.1 uch #endif
672 1.1 uch wsmouse_input(sc->sc_wsmousedev, 1, x, y, 0,
673 1.1 uch WSMOUSE_INPUT_ABSOLUTE_X | WSMOUSE_INPUT_ABSOLUTE_Y);
674 1.1 uch
675 1.1 uch return 0;
676 1.1 uch }
677 1.1 uch
678 1.1 uch /*
679 1.1 uch * access ops.
680 1.1 uch */
681 1.1 uch
682 1.1 uch int
683 1.1 uch ucbtp_enable(v)
684 1.1 uch void *v;
685 1.1 uch {
686 1.1 uch /* not yet */
687 1.1 uch return 0;
688 1.1 uch }
689 1.1 uch
690 1.1 uch void
691 1.1 uch ucbtp_disable(v)
692 1.1 uch void *v;
693 1.1 uch {
694 1.1 uch /* not yet */
695 1.1 uch }
696 1.1 uch
697 1.1 uch int
698 1.1 uch ucbtp_ioctl(v, cmd, data, flag, p)
699 1.1 uch void *v;
700 1.1 uch u_long cmd;
701 1.1 uch caddr_t data;
702 1.1 uch int flag;
703 1.1 uch struct proc *p;
704 1.1 uch {
705 1.1 uch struct ucbtp_softc *sc = v;
706 1.1 uch
707 1.1 uch DPRINTF(("%s(%d): ucbtp_ioctl(%08lx)\n", __FILE__, __LINE__, cmd));
708 1.1 uch
709 1.1 uch switch (cmd) {
710 1.1 uch case WSMOUSEIO_GTYPE:
711 1.1 uch *(u_int *)data = WSMOUSE_TYPE_TPANEL;
712 1.1 uch break;
713 1.1 uch
714 1.1 uch case WSMOUSEIO_SRES:
715 1.1 uch printf("%s(%d): WSMOUSRIO_SRES is not supported",
716 1.1 uch __FILE__, __LINE__);
717 1.1 uch break;
718 1.1 uch
719 1.1 uch case WSMOUSEIO_SCALIBCOORDS:
720 1.1 uch case WSMOUSEIO_GCALIBCOORDS:
721 1.1 uch return tpcalib_ioctl(&sc->sc_tpcalib, cmd, data, flag, p);
722 1.1 uch
723 1.1 uch default:
724 1.1 uch return (-1);
725 1.1 uch }
726 1.1 uch return (0);
727 1.1 uch }
728