bus.h revision 1.4 1 1.4 shin /* $NetBSD: bus.h,v 1.4 2000/03/05 10:03:16 shin Exp $ */
2 1.1 takemura
3 1.1 takemura /*-
4 1.1 takemura * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 takemura * All rights reserved.
6 1.1 takemura *
7 1.1 takemura * This code is derived from software contributed to The NetBSD Foundation
8 1.1 takemura * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 takemura * NASA Ames Research Center.
10 1.1 takemura *
11 1.1 takemura * Redistribution and use in source and binary forms, with or without
12 1.1 takemura * modification, are permitted provided that the following conditions
13 1.1 takemura * are met:
14 1.1 takemura * 1. Redistributions of source code must retain the above copyright
15 1.1 takemura * notice, this list of conditions and the following disclaimer.
16 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 takemura * notice, this list of conditions and the following disclaimer in the
18 1.1 takemura * documentation and/or other materials provided with the distribution.
19 1.1 takemura * 3. All advertising materials mentioning features or use of this software
20 1.1 takemura * must display the following acknowledgement:
21 1.1 takemura * This product includes software developed by the NetBSD
22 1.1 takemura * Foundation, Inc. and its contributors.
23 1.1 takemura * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 takemura * contributors may be used to endorse or promote products derived
25 1.1 takemura * from this software without specific prior written permission.
26 1.1 takemura *
27 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 takemura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 takemura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 takemura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 takemura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 takemura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 takemura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 takemura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 takemura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 takemura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 takemura * POSSIBILITY OF SUCH DAMAGE.
38 1.1 takemura */
39 1.1 takemura
40 1.1 takemura #ifndef _HPCMIPS_BUS_H_
41 1.1 takemura #define _HPCMIPS_BUS_H_
42 1.1 takemura
43 1.1 takemura #include <mips/locore.h>
44 1.1 takemura
45 1.1 takemura #ifdef BUS_SPACE_DEBUG
46 1.1 takemura /*
47 1.1 takemura * Macros for sanity-checking the aligned-ness of pointers passed to
48 1.1 takemura * bus space ops. These are not strictly necessary on the x86, but
49 1.1 takemura * could lead to performance improvements, and help catch problems
50 1.1 takemura * with drivers that would creep up on other architectures.
51 1.1 takemura */
52 1.1 takemura #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
53 1.1 takemura ((((u_long)(p)) & (sizeof(t)-1)) == 0)
54 1.1 takemura
55 1.1 takemura #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
56 1.1 takemura ({ \
57 1.1 takemura if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
58 1.1 takemura printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
59 1.1 takemura d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
60 1.1 takemura } \
61 1.1 takemura (void) 0; \
62 1.1 takemura })
63 1.1 takemura
64 1.1 takemura #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
65 1.1 takemura #else
66 1.1 takemura #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
67 1.1 takemura #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
68 1.1 takemura #endif /* BUS_SPACE_DEBUG */
69 1.1 takemura /*
70 1.1 takemura * Utility macros; do not use outside this file.
71 1.1 takemura */
72 1.1 takemura #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS)
73 1.1 takemura #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t)
74 1.1 takemura
75 1.1 takemura /*
76 1.1 takemura * Bus address and size types
77 1.1 takemura */
78 1.1 takemura
79 1.3 takemura typedef u_long bus_addr_t;
80 1.3 takemura typedef u_long bus_size_t;
81 1.1 takemura
82 1.1 takemura /*
83 1.1 takemura * Access methods for bus resources and address space.
84 1.1 takemura */
85 1.1 takemura typedef struct hpcmips_bus_space *bus_space_tag_t;
86 1.1 takemura typedef u_int32_t bus_space_handle_t;
87 1.1 takemura /*
88 1.1 takemura * Initialize extent.
89 1.1 takemura */
90 1.1 takemura void hpcmips_init_bus_space_extent __P((bus_space_tag_t));
91 1.1 takemura bus_space_tag_t hpcmips_alloc_bus_space_tag __P((void));
92 1.1 takemura
93 1.1 takemura struct hpcmips_bus_space {
94 1.1 takemura char t_name[16]; /* bus name */
95 1.1 takemura u_int32_t t_base; /* extent base */
96 1.1 takemura u_int32_t t_size; /* extent size */
97 1.1 takemura void *t_extent;
98 1.1 takemura };
99 1.1 takemura
100 1.1 takemura
101 1.1 takemura /*
102 1.1 takemura * int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr,
103 1.1 takemura * bus_size_t size, int flags, bus_space_handle_t *bshp));
104 1.1 takemura *
105 1.1 takemura * Map a region of bus space.
106 1.1 takemura */
107 1.1 takemura
108 1.1 takemura #define BUS_SPACE_MAP_CACHEABLE 0x01
109 1.1 takemura #define BUS_SPACE_MAP_LINEAR 0x02
110 1.2 drochner #define BUS_SPACE_MAP_PREFETCHABLE 0x04
111 1.1 takemura
112 1.1 takemura int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
113 1.1 takemura int, bus_space_handle_t *));
114 1.1 takemura
115 1.1 takemura /*
116 1.1 takemura * void bus_space_unmap __P((bus_space_tag_t t,
117 1.1 takemura * bus_space_handle_t bsh, bus_size_t size));
118 1.1 takemura *
119 1.1 takemura * Unmap a region of bus space.
120 1.1 takemura */
121 1.1 takemura
122 1.1 takemura void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
123 1.1 takemura
124 1.1 takemura /*
125 1.1 takemura * int bus_space_subregion __P((bus_space_tag_t t,
126 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
127 1.1 takemura * bus_space_handle_t *nbshp));
128 1.1 takemura *
129 1.1 takemura * Get a new handle for a subregion of an already-mapped area of bus space.
130 1.1 takemura */
131 1.1 takemura
132 1.1 takemura int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh,
133 1.1 takemura bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp));
134 1.1 takemura
135 1.1 takemura /*
136 1.1 takemura * int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t, rstart,
137 1.1 takemura * bus_addr_t rend, bus_size_t size, bus_size_t align,
138 1.1 takemura * bus_size_t boundary, int flags, bus_addr_t *addrp,
139 1.1 takemura * bus_space_handle_t *bshp));
140 1.1 takemura *
141 1.1 takemura * Allocate a region of bus space.
142 1.1 takemura */
143 1.1 takemura
144 1.1 takemura int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
145 1.1 takemura bus_addr_t rend, bus_size_t size, bus_size_t align,
146 1.1 takemura bus_size_t boundary, int cacheable, bus_addr_t *addrp,
147 1.1 takemura bus_space_handle_t *bshp));
148 1.1 takemura
149 1.1 takemura /*
150 1.1 takemura * int bus_space_free __P((bus_space_tag_t t,
151 1.1 takemura * bus_space_handle_t bsh, bus_size_t size));
152 1.1 takemura *
153 1.1 takemura * Free a region of bus space.
154 1.1 takemura */
155 1.1 takemura
156 1.1 takemura void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh,
157 1.1 takemura bus_size_t size));
158 1.1 takemura
159 1.1 takemura /*
160 1.1 takemura * u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
161 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset));
162 1.1 takemura *
163 1.1 takemura * Read a 1, 2, 4, or 8 byte quantity from bus space
164 1.1 takemura * described by tag/handle/offset.
165 1.1 takemura */
166 1.1 takemura
167 1.1 takemura #define bus_space_read_1(t, h, o) \
168 1.1 takemura (wbflush(), /* XXX */ \
169 1.1 takemura (void) t, (*(volatile u_int8_t *)((h) + (o))))
170 1.1 takemura
171 1.1 takemura #define bus_space_read_2(t, h, o) \
172 1.1 takemura (wbflush(), /* XXX */ \
173 1.1 takemura (void) t, (*(volatile u_int16_t *)((h) + (o))))
174 1.1 takemura
175 1.1 takemura #define bus_space_read_4(t, h, o) \
176 1.1 takemura (wbflush(), /* XXX */ \
177 1.1 takemura (void) t, (*(volatile u_int32_t *)((h) + (o))))
178 1.1 takemura
179 1.1 takemura #if 0 /* Cause a link error for bus_space_read_8 */
180 1.1 takemura #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
181 1.1 takemura #endif
182 1.1 takemura
183 1.1 takemura /*
184 1.1 takemura * void bus_space_read_multi_N __P((bus_space_tag_t tag,
185 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset,
186 1.1 takemura * u_intN_t *addr, size_t count));
187 1.1 takemura *
188 1.1 takemura * Read `count' 1, 2, 4, or 8 byte quantities from bus space
189 1.1 takemura * described by tag/handle/offset and copy into buffer provided.
190 1.1 takemura */
191 1.1 takemura
192 1.4 shin #define __HPCMIPS_bus_space_read_multi(BYTES,BITS) \
193 1.1 takemura static __inline void __CONCAT(bus_space_read_multi_,BYTES) \
194 1.1 takemura __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
195 1.1 takemura __PB_TYPENAME(BITS) *, size_t)); \
196 1.1 takemura \
197 1.1 takemura static __inline void \
198 1.1 takemura __CONCAT(bus_space_read_multi_,BYTES)(t, h, o, a, c) \
199 1.1 takemura bus_space_tag_t t; \
200 1.1 takemura bus_space_handle_t h; \
201 1.1 takemura bus_size_t o; \
202 1.1 takemura __PB_TYPENAME(BITS) *a; \
203 1.1 takemura size_t c; \
204 1.1 takemura { \
205 1.1 takemura \
206 1.1 takemura while (c--) \
207 1.1 takemura *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \
208 1.1 takemura }
209 1.1 takemura
210 1.4 shin __HPCMIPS_bus_space_read_multi(1,8)
211 1.4 shin __HPCMIPS_bus_space_read_multi(2,16)
212 1.4 shin __HPCMIPS_bus_space_read_multi(4,32)
213 1.1 takemura
214 1.1 takemura #if 0 /* Cause a link error for bus_space_read_multi_8 */
215 1.1 takemura #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
216 1.1 takemura #endif
217 1.1 takemura
218 1.4 shin #undef __HPCMIPS_bus_space_read_multi
219 1.1 takemura
220 1.1 takemura /*
221 1.1 takemura * void bus_space_read_region_N __P((bus_space_tag_t tag,
222 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset,
223 1.1 takemura * u_intN_t *addr, size_t count));
224 1.1 takemura *
225 1.1 takemura * Read `count' 1, 2, 4, or 8 byte quantities from bus space
226 1.1 takemura * described by tag/handle and starting at `offset' and copy into
227 1.1 takemura * buffer provided.
228 1.1 takemura */
229 1.1 takemura
230 1.4 shin #define __HPCMIPS_bus_space_read_region(BYTES,BITS) \
231 1.1 takemura static __inline void __CONCAT(bus_space_read_region_,BYTES) \
232 1.1 takemura __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
233 1.1 takemura __PB_TYPENAME(BITS) *, size_t)); \
234 1.1 takemura \
235 1.1 takemura static __inline void \
236 1.1 takemura __CONCAT(bus_space_read_region_,BYTES)(t, h, o, a, c) \
237 1.1 takemura bus_space_tag_t t; \
238 1.1 takemura bus_space_handle_t h; \
239 1.1 takemura bus_size_t o; \
240 1.1 takemura __PB_TYPENAME(BITS) *a; \
241 1.1 takemura size_t c; \
242 1.1 takemura { \
243 1.1 takemura \
244 1.1 takemura while (c--) { \
245 1.1 takemura *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \
246 1.1 takemura o += BYTES; \
247 1.1 takemura } \
248 1.1 takemura }
249 1.1 takemura
250 1.4 shin __HPCMIPS_bus_space_read_region(1,8)
251 1.4 shin __HPCMIPS_bus_space_read_region(2,16)
252 1.4 shin __HPCMIPS_bus_space_read_region(4,32)
253 1.1 takemura
254 1.1 takemura #if 0 /* Cause a link error for bus_space_read_region_8 */
255 1.1 takemura #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
256 1.1 takemura #endif
257 1.1 takemura
258 1.4 shin #undef __HPCMIPS_bus_space_read_region
259 1.1 takemura
260 1.1 takemura /*
261 1.1 takemura * void bus_space_write_N __P((bus_space_tag_t tag,
262 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset,
263 1.1 takemura * u_intN_t value));
264 1.1 takemura *
265 1.1 takemura * Write the 1, 2, 4, or 8 byte value `value' to bus space
266 1.1 takemura * described by tag/handle/offset.
267 1.1 takemura */
268 1.1 takemura
269 1.1 takemura #define bus_space_write_1(t, h, o, v) \
270 1.1 takemura do { \
271 1.1 takemura (void) t; \
272 1.1 takemura *(volatile u_int8_t *)((h) + (o)) = (v); \
273 1.1 takemura wbflush(); /* XXX */ \
274 1.1 takemura } while (0)
275 1.1 takemura
276 1.1 takemura #define bus_space_write_2(t, h, o, v) \
277 1.1 takemura do { \
278 1.1 takemura (void) t; \
279 1.1 takemura *(volatile u_int16_t *)((h) + (o)) = (v); \
280 1.1 takemura wbflush(); /* XXX */ \
281 1.1 takemura } while (0)
282 1.1 takemura
283 1.1 takemura #define bus_space_write_4(t, h, o, v) \
284 1.1 takemura do { \
285 1.1 takemura (void) t; \
286 1.1 takemura *(volatile u_int32_t *)((h) + (o)) = (v); \
287 1.1 takemura wbflush(); /* XXX */ \
288 1.1 takemura } while (0)
289 1.1 takemura
290 1.1 takemura #if 0 /* Cause a link error for bus_space_write_8 */
291 1.1 takemura #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
292 1.1 takemura #endif
293 1.1 takemura
294 1.1 takemura /*
295 1.1 takemura * void bus_space_write_multi_N __P((bus_space_tag_t tag,
296 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset,
297 1.1 takemura * const u_intN_t *addr, size_t count));
298 1.1 takemura *
299 1.1 takemura * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
300 1.1 takemura * provided to bus space described by tag/handle/offset.
301 1.1 takemura */
302 1.1 takemura
303 1.4 shin #define __HPCMIPS_bus_space_write_multi(BYTES,BITS) \
304 1.1 takemura static __inline void __CONCAT(bus_space_write_multi_,BYTES) \
305 1.1 takemura __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
306 1.1 takemura __PB_TYPENAME(BITS) *, size_t)); \
307 1.1 takemura \
308 1.1 takemura static __inline void \
309 1.1 takemura __CONCAT(bus_space_write_multi_,BYTES)(t, h, o, a, c) \
310 1.1 takemura bus_space_tag_t t; \
311 1.1 takemura bus_space_handle_t h; \
312 1.1 takemura bus_size_t o; \
313 1.1 takemura __PB_TYPENAME(BITS) *a; \
314 1.1 takemura size_t c; \
315 1.1 takemura { \
316 1.1 takemura \
317 1.1 takemura while (c--) \
318 1.1 takemura __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \
319 1.1 takemura }
320 1.1 takemura
321 1.4 shin __HPCMIPS_bus_space_write_multi(1,8)
322 1.4 shin __HPCMIPS_bus_space_write_multi(2,16)
323 1.4 shin __HPCMIPS_bus_space_write_multi(4,32)
324 1.1 takemura
325 1.1 takemura #if 0 /* Cause a link error for bus_space_write_8 */
326 1.1 takemura #define bus_space_write_multi_8(t, h, o, a, c) \
327 1.1 takemura !!! bus_space_write_multi_8 unimplimented !!!
328 1.1 takemura #endif
329 1.1 takemura
330 1.4 shin #undef __HPCMIPS_bus_space_write_multi
331 1.1 takemura
332 1.1 takemura /*
333 1.1 takemura * void bus_space_write_region_N __P((bus_space_tag_t tag,
334 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset,
335 1.1 takemura * const u_intN_t *addr, size_t count));
336 1.1 takemura *
337 1.1 takemura * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
338 1.1 takemura * to bus space described by tag/handle starting at `offset'.
339 1.1 takemura */
340 1.1 takemura
341 1.4 shin #define __HPCMIPS_bus_space_write_region(BYTES,BITS) \
342 1.1 takemura static __inline void __CONCAT(bus_space_write_region_,BYTES) \
343 1.1 takemura __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
344 1.1 takemura __PB_TYPENAME(BITS) *, size_t)); \
345 1.1 takemura \
346 1.1 takemura static __inline void \
347 1.1 takemura __CONCAT(bus_space_write_region_,BYTES)(t, h, o, a, c) \
348 1.1 takemura bus_space_tag_t t; \
349 1.1 takemura bus_space_handle_t h; \
350 1.1 takemura bus_size_t o; \
351 1.1 takemura __PB_TYPENAME(BITS) *a; \
352 1.1 takemura size_t c; \
353 1.1 takemura { \
354 1.1 takemura \
355 1.1 takemura while (c--) { \
356 1.1 takemura __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \
357 1.1 takemura o += BYTES; \
358 1.1 takemura } \
359 1.1 takemura }
360 1.1 takemura
361 1.4 shin __HPCMIPS_bus_space_write_region(1,8)
362 1.4 shin __HPCMIPS_bus_space_write_region(2,16)
363 1.4 shin __HPCMIPS_bus_space_write_region(4,32)
364 1.1 takemura
365 1.1 takemura #if 0 /* Cause a link error for bus_space_write_region_8 */
366 1.1 takemura #define bus_space_write_region_8 \
367 1.1 takemura !!! bus_space_write_region_8 unimplemented !!!
368 1.1 takemura #endif
369 1.1 takemura
370 1.4 shin #undef __HPCMIPS_bus_space_write_region
371 1.1 takemura
372 1.1 takemura /*
373 1.1 takemura * void bus_space_set_multi_N __P((bus_space_tag_t tag,
374 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
375 1.1 takemura * size_t count));
376 1.1 takemura *
377 1.1 takemura * Write the 1, 2, 4, or 8 byte value `val' to bus space described
378 1.1 takemura * by tag/handle/offset `count' times.
379 1.1 takemura */
380 1.1 takemura
381 1.4 shin #define __HPCMIPS_bus_space_set_multi(BYTES,BITS) \
382 1.1 takemura static __inline void __CONCAT(bus_space_set_multi_,BYTES) \
383 1.1 takemura __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
384 1.1 takemura __PB_TYPENAME(BITS), size_t)); \
385 1.1 takemura \
386 1.1 takemura static __inline void \
387 1.1 takemura __CONCAT(bus_space_set_multi_,BYTES)(t, h, o, v, c) \
388 1.1 takemura bus_space_tag_t t; \
389 1.1 takemura bus_space_handle_t h; \
390 1.1 takemura bus_size_t o; \
391 1.1 takemura __PB_TYPENAME(BITS) v; \
392 1.1 takemura size_t c; \
393 1.1 takemura { \
394 1.1 takemura \
395 1.1 takemura while (c--) \
396 1.1 takemura __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \
397 1.1 takemura }
398 1.1 takemura
399 1.4 shin __HPCMIPS_bus_space_set_multi(1,8)
400 1.4 shin __HPCMIPS_bus_space_set_multi(2,16)
401 1.4 shin __HPCMIPS_bus_space_set_multi(4,32)
402 1.1 takemura
403 1.1 takemura #if 0 /* Cause a link error for bus_space_set_multi_8 */
404 1.1 takemura #define bus_space_set_multi_8 \
405 1.1 takemura !!! bus_space_set_multi_8 unimplemented !!!
406 1.1 takemura #endif
407 1.1 takemura
408 1.4 shin #undef __HPCMIPS_bus_space_set_multi
409 1.1 takemura
410 1.1 takemura /*
411 1.1 takemura * void bus_space_set_region_N __P((bus_space_tag_t tag,
412 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
413 1.1 takemura * size_t count));
414 1.1 takemura *
415 1.1 takemura * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
416 1.1 takemura * by tag/handle starting at `offset'.
417 1.1 takemura */
418 1.1 takemura
419 1.4 shin #define __HPCMIPS_bus_space_set_region(BYTES,BITS) \
420 1.1 takemura static __inline void __CONCAT(bus_space_set_region_,BYTES) \
421 1.1 takemura __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, \
422 1.1 takemura __PB_TYPENAME(BITS), size_t)); \
423 1.1 takemura \
424 1.1 takemura static __inline void \
425 1.1 takemura __CONCAT(bus_space_set_region_,BYTES)(t, h, o, v, c) \
426 1.1 takemura bus_space_tag_t t; \
427 1.1 takemura bus_space_handle_t h; \
428 1.1 takemura bus_size_t o; \
429 1.1 takemura __PB_TYPENAME(BITS) v; \
430 1.1 takemura size_t c; \
431 1.1 takemura { \
432 1.1 takemura \
433 1.1 takemura while (c--) { \
434 1.1 takemura __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \
435 1.1 takemura o += BYTES; \
436 1.1 takemura } \
437 1.1 takemura }
438 1.1 takemura
439 1.4 shin __HPCMIPS_bus_space_set_region(1,8)
440 1.4 shin __HPCMIPS_bus_space_set_region(2,16)
441 1.4 shin __HPCMIPS_bus_space_set_region(4,32)
442 1.1 takemura
443 1.1 takemura #if 0 /* Cause a link error for bus_space_set_region_8 */
444 1.1 takemura #define bus_space_set_region_8 \
445 1.1 takemura !!! bus_space_set_region_8 unimplemented !!!
446 1.1 takemura #endif
447 1.1 takemura
448 1.4 shin #undef __HPCMIPS_bus_space_set_region
449 1.1 takemura
450 1.1 takemura /*
451 1.1 takemura * void bus_space_copy_region_N __P((bus_space_tag_t tag,
452 1.1 takemura * bus_space_handle_t bsh1, bus_size_t off1,
453 1.1 takemura * bus_space_handle_t bsh2, bus_size_t off2,
454 1.1 takemura * bus_size_t count));
455 1.1 takemura *
456 1.1 takemura * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
457 1.1 takemura * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
458 1.1 takemura */
459 1.1 takemura
460 1.4 shin #define __HPCMIPS_copy_region(BYTES) \
461 1.1 takemura static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
462 1.1 takemura __P((bus_space_tag_t, \
463 1.1 takemura bus_space_handle_t bsh1, bus_size_t off1, \
464 1.1 takemura bus_space_handle_t bsh2, bus_size_t off2, \
465 1.1 takemura bus_size_t count)); \
466 1.1 takemura \
467 1.1 takemura static __inline void \
468 1.1 takemura __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \
469 1.1 takemura bus_space_tag_t t; \
470 1.1 takemura bus_space_handle_t h1, h2; \
471 1.1 takemura bus_size_t o1, o2, c; \
472 1.1 takemura { \
473 1.1 takemura bus_size_t o; \
474 1.1 takemura \
475 1.1 takemura if ((h1 + o1) >= (h2 + o2)) { \
476 1.1 takemura /* src after dest: copy forward */ \
477 1.1 takemura for (o = 0; c != 0; c--, o += BYTES) \
478 1.1 takemura __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
479 1.1 takemura __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
480 1.1 takemura } else { \
481 1.1 takemura /* dest after src: copy backwards */ \
482 1.1 takemura for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
483 1.1 takemura __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
484 1.1 takemura __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
485 1.1 takemura } \
486 1.1 takemura }
487 1.1 takemura
488 1.4 shin __HPCMIPS_copy_region(1)
489 1.4 shin __HPCMIPS_copy_region(2)
490 1.4 shin __HPCMIPS_copy_region(4)
491 1.1 takemura
492 1.1 takemura #if 0 /* Cause a link error for bus_space_copy_region_8 */
493 1.1 takemura #define bus_space_copy_region_8 \
494 1.1 takemura !!! bus_space_copy_region_8 unimplemented !!!
495 1.1 takemura #endif
496 1.1 takemura
497 1.4 shin #undef __HPCMIPS_copy_region
498 1.1 takemura
499 1.1 takemura /*
500 1.1 takemura * Bus read/write barrier methods.
501 1.1 takemura *
502 1.1 takemura * void bus_space_barrier __P((bus_space_tag_t tag,
503 1.1 takemura * bus_space_handle_t bsh, bus_size_t offset,
504 1.1 takemura * bus_size_t len, int flags));
505 1.1 takemura *
506 1.1 takemura * On the MIPS, we just flush the write buffer.
507 1.1 takemura */
508 1.1 takemura #define bus_space_barrier(t, h, o, l, f) \
509 1.1 takemura ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)), \
510 1.1 takemura wbflush())
511 1.1 takemura #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
512 1.1 takemura #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
513 1.1 takemura
514 1.1 takemura #undef __PB_TYPENAME_PREFIX
515 1.1 takemura #undef __PB_TYPENAME
516 1.1 takemura
517 1.1 takemura /*
518 1.1 takemura * Flags used in various bus DMA methods.
519 1.1 takemura */
520 1.1 takemura #define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
521 1.1 takemura #define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
522 1.1 takemura #define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
523 1.1 takemura #define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
524 1.1 takemura #define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
525 1.1 takemura #define BUS_DMA_BUS2 0x20
526 1.1 takemura #define BUS_DMA_BUS3 0x40
527 1.1 takemura #define BUS_DMA_BUS4 0x80
528 1.1 takemura
529 1.4 shin #define HPCMIPS_DMAMAP_COHERENT 0x100 /* no cache flush necessary on sync */
530 1.1 takemura
531 1.1 takemura /* Forwards needed by prototypes below. */
532 1.1 takemura struct mbuf;
533 1.1 takemura struct uio;
534 1.1 takemura
535 1.1 takemura /*
536 1.1 takemura * Operations performed by bus_dmamap_sync().
537 1.1 takemura */
538 1.1 takemura #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
539 1.1 takemura #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
540 1.1 takemura #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
541 1.1 takemura #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
542 1.1 takemura
543 1.4 shin typedef struct hpcmips_bus_dma_tag *bus_dma_tag_t;
544 1.4 shin typedef struct hpcmips_bus_dmamap *bus_dmamap_t;
545 1.1 takemura
546 1.1 takemura /*
547 1.1 takemura * bus_dma_segment_t
548 1.1 takemura *
549 1.1 takemura * Describes a single contiguous DMA transaction. Values
550 1.1 takemura * are suitable for programming into DMA registers.
551 1.1 takemura */
552 1.4 shin struct hpcmips_bus_dma_segment {
553 1.1 takemura bus_addr_t ds_addr; /* DMA address */
554 1.1 takemura bus_size_t ds_len; /* length of transfer */
555 1.1 takemura bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */
556 1.1 takemura };
557 1.4 shin typedef struct hpcmips_bus_dma_segment bus_dma_segment_t;
558 1.1 takemura
559 1.1 takemura /*
560 1.1 takemura * bus_dma_tag_t
561 1.1 takemura *
562 1.1 takemura * A machine-dependent opaque type describing the implementation of
563 1.1 takemura * DMA for a given bus.
564 1.1 takemura */
565 1.1 takemura
566 1.4 shin struct hpcmips_bus_dma_tag {
567 1.1 takemura /*
568 1.1 takemura * DMA mapping methods.
569 1.1 takemura */
570 1.1 takemura int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
571 1.1 takemura bus_size_t, bus_size_t, int, bus_dmamap_t *));
572 1.1 takemura void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
573 1.1 takemura int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
574 1.1 takemura bus_size_t, struct proc *, int));
575 1.1 takemura int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
576 1.1 takemura struct mbuf *, int));
577 1.1 takemura int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
578 1.1 takemura struct uio *, int));
579 1.1 takemura int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
580 1.1 takemura bus_dma_segment_t *, int, bus_size_t, int));
581 1.1 takemura void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
582 1.1 takemura void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
583 1.1 takemura bus_addr_t, bus_size_t, int));
584 1.1 takemura
585 1.1 takemura /*
586 1.1 takemura * DMA memory utility functions.
587 1.1 takemura */
588 1.1 takemura int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
589 1.1 takemura bus_size_t, bus_dma_segment_t *, int, int *, int));
590 1.1 takemura void (*_dmamem_free) __P((bus_dma_tag_t,
591 1.1 takemura bus_dma_segment_t *, int));
592 1.1 takemura int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
593 1.1 takemura int, size_t, caddr_t *, int));
594 1.1 takemura void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
595 1.1 takemura int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
596 1.1 takemura int, int, int, int));
597 1.1 takemura };
598 1.1 takemura
599 1.1 takemura #define bus_dmamap_create(t, s, n, m, b, f, p) \
600 1.1 takemura (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
601 1.1 takemura #define bus_dmamap_destroy(t, p) \
602 1.1 takemura (*(t)->_dmamap_destroy)((t), (p))
603 1.1 takemura #define bus_dmamap_load(t, m, b, s, p, f) \
604 1.1 takemura (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
605 1.1 takemura #define bus_dmamap_load_mbuf(t, m, b, f) \
606 1.1 takemura (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
607 1.1 takemura #define bus_dmamap_load_uio(t, m, u, f) \
608 1.1 takemura (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
609 1.1 takemura #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
610 1.1 takemura (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
611 1.1 takemura #define bus_dmamap_unload(t, p) \
612 1.1 takemura (*(t)->_dmamap_unload)((t), (p))
613 1.1 takemura #define bus_dmamap_sync(t, p, o, l, ops) \
614 1.1 takemura (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
615 1.1 takemura
616 1.1 takemura #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
617 1.1 takemura (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
618 1.1 takemura #define bus_dmamem_free(t, sg, n) \
619 1.1 takemura (*(t)->_dmamem_free)((t), (sg), (n))
620 1.1 takemura #define bus_dmamem_map(t, sg, n, s, k, f) \
621 1.1 takemura (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
622 1.1 takemura #define bus_dmamem_unmap(t, k, s) \
623 1.1 takemura (*(t)->_dmamem_unmap)((t), (k), (s))
624 1.1 takemura #define bus_dmamem_mmap(t, sg, n, o, p, f) \
625 1.1 takemura (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
626 1.1 takemura
627 1.1 takemura /*
628 1.1 takemura * bus_dmamap_t
629 1.1 takemura *
630 1.1 takemura * Describes a DMA mapping.
631 1.1 takemura */
632 1.4 shin struct hpcmips_bus_dmamap {
633 1.1 takemura /*
634 1.1 takemura * PRIVATE MEMBERS: not for use my machine-independent code.
635 1.1 takemura */
636 1.1 takemura bus_size_t _dm_size; /* largest DMA transfer mappable */
637 1.1 takemura int _dm_segcnt; /* number of segs this map can map */
638 1.1 takemura bus_size_t _dm_maxsegsz; /* largest possible segment */
639 1.1 takemura bus_size_t _dm_boundary; /* don't cross this */
640 1.1 takemura int _dm_flags; /* misc. flags */
641 1.1 takemura
642 1.1 takemura /*
643 1.1 takemura * PUBLIC MEMBERS: these are used by machine-independent code.
644 1.1 takemura */
645 1.1 takemura bus_size_t dm_mapsize; /* size of the mapping */
646 1.1 takemura int dm_nsegs; /* # valid segments in mapping */
647 1.1 takemura bus_dma_segment_t dm_segs[1]; /* segments; variable length */
648 1.1 takemura };
649 1.1 takemura
650 1.4 shin #ifdef _HPCMIPS_BUS_DMA_PRIVATE
651 1.1 takemura int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
652 1.1 takemura bus_size_t, int, bus_dmamap_t *));
653 1.1 takemura void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
654 1.1 takemura int _bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
655 1.1 takemura bus_size_t, struct proc *, int));
656 1.1 takemura int _bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
657 1.1 takemura struct mbuf *, int));
658 1.1 takemura int _bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
659 1.1 takemura struct uio *, int));
660 1.1 takemura int _bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
661 1.1 takemura bus_dma_segment_t *, int, bus_size_t, int));
662 1.1 takemura void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
663 1.1 takemura void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
664 1.1 takemura bus_size_t, int));
665 1.1 takemura
666 1.1 takemura int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
667 1.1 takemura bus_size_t alignment, bus_size_t boundary,
668 1.1 takemura bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
669 1.1 takemura void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
670 1.1 takemura int nsegs));
671 1.1 takemura int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
672 1.1 takemura int nsegs, size_t size, caddr_t *kvap, int flags));
673 1.1 takemura void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
674 1.1 takemura size_t size));
675 1.1 takemura int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
676 1.1 takemura int nsegs, int off, int prot, int flags));
677 1.1 takemura
678 1.1 takemura int _bus_dmamem_alloc_range __P((bus_dma_tag_t tag, bus_size_t size,
679 1.1 takemura bus_size_t alignment, bus_size_t boundary,
680 1.1 takemura bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
681 1.1 takemura vaddr_t low, vaddr_t high));
682 1.1 takemura
683 1.4 shin extern struct hpcmips_bus_dma_tag hpcmips_default_bus_dma_tag;
684 1.4 shin #endif /* _HPCMIPS_BUS_DMA_PRIVATE */
685 1.1 takemura
686 1.1 takemura #endif /* _HPCMIPS_BUS_H_ */
687