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bus.h revision 1.9
      1  1.9   thorpej /*     $NetBSD: bus.h,v 1.9 2001/03/07 22:42:18 thorpej Exp $   */
      2  1.1  takemura 
      3  1.1  takemura /*-
      4  1.9   thorpej  * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
      5  1.1  takemura  * All rights reserved.
      6  1.1  takemura  *
      7  1.1  takemura  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  takemura  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  1.1  takemura  * NASA Ames Research Center.
     10  1.1  takemura  *
     11  1.1  takemura  * Redistribution and use in source and binary forms, with or without
     12  1.1  takemura  * modification, are permitted provided that the following conditions
     13  1.1  takemura  * are met:
     14  1.1  takemura  * 1. Redistributions of source code must retain the above copyright
     15  1.1  takemura  *    notice, this list of conditions and the following disclaimer.
     16  1.1  takemura  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.1  takemura  *    notice, this list of conditions and the following disclaimer in the
     18  1.1  takemura  *    documentation and/or other materials provided with the distribution.
     19  1.1  takemura  * 3. All advertising materials mentioning features or use of this software
     20  1.1  takemura  *    must display the following acknowledgement:
     21  1.1  takemura  *	This product includes software developed by the NetBSD
     22  1.1  takemura  *	Foundation, Inc. and its contributors.
     23  1.1  takemura  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  1.1  takemura  *    contributors may be used to endorse or promote products derived
     25  1.1  takemura  *    from this software without specific prior written permission.
     26  1.1  takemura  *
     27  1.1  takemura  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  1.1  takemura  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  1.1  takemura  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  1.1  takemura  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  1.1  takemura  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  1.1  takemura  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  1.1  takemura  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  1.1  takemura  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  1.1  takemura  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  1.1  takemura  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  1.1  takemura  * POSSIBILITY OF SUCH DAMAGE.
     38  1.1  takemura  */
     39  1.1  takemura 
     40  1.1  takemura #ifndef _HPCMIPS_BUS_H_
     41  1.1  takemura #define _HPCMIPS_BUS_H_
     42  1.1  takemura 
     43  1.1  takemura #include <mips/locore.h>
     44  1.1  takemura 
     45  1.1  takemura #ifdef BUS_SPACE_DEBUG
     46  1.5  drochner #include <sys/systm.h> /* for printf() prototype */
     47  1.1  takemura /*
     48  1.1  takemura  * Macros for sanity-checking the aligned-ness of pointers passed to
     49  1.1  takemura  * bus space ops.  These are not strictly necessary on the x86, but
     50  1.1  takemura  * could lead to performance improvements, and help catch problems
     51  1.1  takemura  * with drivers that would creep up on other architectures.
     52  1.1  takemura  */
     53  1.1  takemura #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
     54  1.1  takemura 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
     55  1.1  takemura 
     56  1.1  takemura #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
     57  1.1  takemura ({									\
     58  1.1  takemura 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
     59  1.1  takemura 		printf("%s 0x%lx not aligned to %d bytes %s:%d\n",	\
     60  1.1  takemura 		    d, (u_long)(p), sizeof(t), __FILE__, __LINE__);	\
     61  1.1  takemura 	}								\
     62  1.1  takemura 	(void) 0;							\
     63  1.1  takemura })
     64  1.1  takemura 
     65  1.1  takemura #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
     66  1.1  takemura #else
     67  1.1  takemura #define	__BUS_SPACE_ADDRESS_SANITY(p,t,d)	(void) 0
     68  1.1  takemura #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
     69  1.1  takemura #endif /* BUS_SPACE_DEBUG */
     70  1.1  takemura /*
     71  1.1  takemura  * Utility macros; do not use outside this file.
     72  1.1  takemura  */
     73  1.1  takemura #define	__PB_TYPENAME_PREFIX(BITS)	___CONCAT(u_int,BITS)
     74  1.1  takemura #define	__PB_TYPENAME(BITS)		___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t)
     75  1.1  takemura 
     76  1.1  takemura /*
     77  1.1  takemura  * Bus address and size types
     78  1.1  takemura  */
     79  1.1  takemura 
     80  1.3  takemura typedef u_long bus_addr_t;
     81  1.3  takemura typedef u_long bus_size_t;
     82  1.1  takemura 
     83  1.1  takemura /*
     84  1.1  takemura  * Access methods for bus resources and address space.
     85  1.1  takemura  */
     86  1.1  takemura typedef struct hpcmips_bus_space	*bus_space_tag_t;
     87  1.1  takemura typedef u_int32_t bus_space_handle_t;
     88  1.1  takemura /*
     89  1.1  takemura  * Initialize extent.
     90  1.1  takemura  */
     91  1.1  takemura void hpcmips_init_bus_space_extent __P((bus_space_tag_t));
     92  1.1  takemura bus_space_tag_t hpcmips_alloc_bus_space_tag __P((void));
     93  1.1  takemura 
     94  1.1  takemura struct hpcmips_bus_space {
     95  1.1  takemura     char t_name[16];  /* bus name */
     96  1.1  takemura     u_int32_t t_base; /* extent base */
     97  1.1  takemura     u_int32_t t_size; /* extent size */
     98  1.1  takemura     void *t_extent;
     99  1.1  takemura };
    100  1.1  takemura 
    101  1.1  takemura 
    102  1.1  takemura /*
    103  1.1  takemura  *	int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr,
    104  1.1  takemura  *	    bus_size_t size, int flags, bus_space_handle_t *bshp));
    105  1.1  takemura  *
    106  1.1  takemura  * Map a region of bus space.
    107  1.1  takemura  */
    108  1.1  takemura 
    109  1.1  takemura #define	BUS_SPACE_MAP_CACHEABLE		0x01
    110  1.1  takemura #define	BUS_SPACE_MAP_LINEAR		0x02
    111  1.2  drochner #define	BUS_SPACE_MAP_PREFETCHABLE		0x04
    112  1.1  takemura 
    113  1.1  takemura int	bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
    114  1.1  takemura 	    int, bus_space_handle_t *));
    115  1.1  takemura 
    116  1.1  takemura /*
    117  1.1  takemura  *	void bus_space_unmap __P((bus_space_tag_t t,
    118  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t size));
    119  1.1  takemura  *
    120  1.1  takemura  * Unmap a region of bus space.
    121  1.1  takemura  */
    122  1.1  takemura 
    123  1.1  takemura void	bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
    124  1.1  takemura 
    125  1.1  takemura /*
    126  1.1  takemura  *	int bus_space_subregion __P((bus_space_tag_t t,
    127  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
    128  1.1  takemura  *	    bus_space_handle_t *nbshp));
    129  1.1  takemura  *
    130  1.1  takemura  * Get a new handle for a subregion of an already-mapped area of bus space.
    131  1.1  takemura  */
    132  1.1  takemura 
    133  1.1  takemura int	bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh,
    134  1.1  takemura 	    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp));
    135  1.1  takemura 
    136  1.1  takemura /*
    137  1.1  takemura  *	int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t, rstart,
    138  1.1  takemura  *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
    139  1.1  takemura  *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
    140  1.1  takemura  *	    bus_space_handle_t *bshp));
    141  1.1  takemura  *
    142  1.1  takemura  * Allocate a region of bus space.
    143  1.1  takemura  */
    144  1.1  takemura 
    145  1.1  takemura int	bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
    146  1.1  takemura 	    bus_addr_t rend, bus_size_t size, bus_size_t align,
    147  1.1  takemura 	    bus_size_t boundary, int cacheable, bus_addr_t *addrp,
    148  1.1  takemura 	    bus_space_handle_t *bshp));
    149  1.1  takemura 
    150  1.1  takemura /*
    151  1.1  takemura  *	int bus_space_free __P((bus_space_tag_t t,
    152  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t size));
    153  1.1  takemura  *
    154  1.1  takemura  * Free a region of bus space.
    155  1.1  takemura  */
    156  1.1  takemura 
    157  1.1  takemura void	bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh,
    158  1.1  takemura 	    bus_size_t size));
    159  1.1  takemura 
    160  1.1  takemura /*
    161  1.1  takemura  *	u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
    162  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset));
    163  1.1  takemura  *
    164  1.1  takemura  * Read a 1, 2, 4, or 8 byte quantity from bus space
    165  1.1  takemura  * described by tag/handle/offset.
    166  1.1  takemura  */
    167  1.1  takemura 
    168  1.1  takemura #define	bus_space_read_1(t, h, o)					\
    169  1.1  takemura     (wbflush(),						/* XXX */	\
    170  1.1  takemura      (void) t, (*(volatile u_int8_t *)((h) + (o))))
    171  1.1  takemura 
    172  1.1  takemura #define	bus_space_read_2(t, h, o)					\
    173  1.1  takemura     (wbflush(),						/* XXX */	\
    174  1.1  takemura      (void) t, (*(volatile u_int16_t *)((h) + (o))))
    175  1.1  takemura 
    176  1.1  takemura #define	bus_space_read_4(t, h, o)					\
    177  1.1  takemura     (wbflush(),						/* XXX */	\
    178  1.1  takemura      (void) t, (*(volatile u_int32_t *)((h) + (o))))
    179  1.1  takemura 
    180  1.1  takemura #if 0	/* Cause a link error for bus_space_read_8 */
    181  1.1  takemura #define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
    182  1.1  takemura #endif
    183  1.1  takemura 
    184  1.1  takemura /*
    185  1.1  takemura  *	void bus_space_read_multi_N __P((bus_space_tag_t tag,
    186  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset,
    187  1.1  takemura  *	    u_intN_t *addr, size_t count));
    188  1.1  takemura  *
    189  1.1  takemura  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    190  1.1  takemura  * described by tag/handle/offset and copy into buffer provided.
    191  1.1  takemura  */
    192  1.1  takemura 
    193  1.4      shin #define __HPCMIPS_bus_space_read_multi(BYTES,BITS)			\
    194  1.1  takemura static __inline void __CONCAT(bus_space_read_multi_,BYTES)		\
    195  1.1  takemura 	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
    196  1.1  takemura 	__PB_TYPENAME(BITS) *, size_t));				\
    197  1.1  takemura 									\
    198  1.1  takemura static __inline void							\
    199  1.1  takemura __CONCAT(bus_space_read_multi_,BYTES)(t, h, o, a, c)			\
    200  1.1  takemura 	bus_space_tag_t t;						\
    201  1.1  takemura 	bus_space_handle_t h;						\
    202  1.1  takemura 	bus_size_t o;							\
    203  1.1  takemura 	__PB_TYPENAME(BITS) *a;						\
    204  1.1  takemura 	size_t c;							\
    205  1.1  takemura {									\
    206  1.1  takemura 									\
    207  1.1  takemura 	while (c--)							\
    208  1.1  takemura 		*a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o);	\
    209  1.1  takemura }
    210  1.1  takemura 
    211  1.4      shin __HPCMIPS_bus_space_read_multi(1,8)
    212  1.4      shin __HPCMIPS_bus_space_read_multi(2,16)
    213  1.4      shin __HPCMIPS_bus_space_read_multi(4,32)
    214  1.1  takemura 
    215  1.1  takemura #if 0	/* Cause a link error for bus_space_read_multi_8 */
    216  1.1  takemura #define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
    217  1.1  takemura #endif
    218  1.1  takemura 
    219  1.4      shin #undef __HPCMIPS_bus_space_read_multi
    220  1.1  takemura 
    221  1.1  takemura /*
    222  1.1  takemura  *	void bus_space_read_region_N __P((bus_space_tag_t tag,
    223  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset,
    224  1.1  takemura  *	    u_intN_t *addr, size_t count));
    225  1.1  takemura  *
    226  1.1  takemura  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
    227  1.1  takemura  * described by tag/handle and starting at `offset' and copy into
    228  1.1  takemura  * buffer provided.
    229  1.1  takemura  */
    230  1.1  takemura 
    231  1.4      shin #define __HPCMIPS_bus_space_read_region(BYTES,BITS)			\
    232  1.1  takemura static __inline void __CONCAT(bus_space_read_region_,BYTES)		\
    233  1.1  takemura 	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
    234  1.1  takemura 	__PB_TYPENAME(BITS) *, size_t));				\
    235  1.1  takemura 									\
    236  1.1  takemura static __inline void							\
    237  1.1  takemura __CONCAT(bus_space_read_region_,BYTES)(t, h, o, a, c)			\
    238  1.1  takemura 	bus_space_tag_t t;						\
    239  1.1  takemura 	bus_space_handle_t h;						\
    240  1.1  takemura 	bus_size_t o;							\
    241  1.1  takemura 	__PB_TYPENAME(BITS) *a;						\
    242  1.1  takemura 	size_t c;							\
    243  1.1  takemura {									\
    244  1.1  takemura 									\
    245  1.1  takemura 	while (c--) {							\
    246  1.1  takemura 		*a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o);	\
    247  1.1  takemura 		o += BYTES;						\
    248  1.1  takemura 	}								\
    249  1.1  takemura }
    250  1.1  takemura 
    251  1.4      shin __HPCMIPS_bus_space_read_region(1,8)
    252  1.4      shin __HPCMIPS_bus_space_read_region(2,16)
    253  1.4      shin __HPCMIPS_bus_space_read_region(4,32)
    254  1.1  takemura 
    255  1.1  takemura #if 0	/* Cause a link error for bus_space_read_region_8 */
    256  1.1  takemura #define	bus_space_read_region_8	!!! bus_space_read_region_8 unimplemented !!!
    257  1.1  takemura #endif
    258  1.1  takemura 
    259  1.4      shin #undef __HPCMIPS_bus_space_read_region
    260  1.1  takemura 
    261  1.1  takemura /*
    262  1.1  takemura  *	void bus_space_write_N __P((bus_space_tag_t tag,
    263  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset,
    264  1.1  takemura  *	    u_intN_t value));
    265  1.1  takemura  *
    266  1.1  takemura  * Write the 1, 2, 4, or 8 byte value `value' to bus space
    267  1.1  takemura  * described by tag/handle/offset.
    268  1.1  takemura  */
    269  1.1  takemura 
    270  1.1  takemura #define	bus_space_write_1(t, h, o, v)					\
    271  1.1  takemura do {									\
    272  1.1  takemura 	(void) t;							\
    273  1.1  takemura 	*(volatile u_int8_t *)((h) + (o)) = (v);			\
    274  1.1  takemura 	wbflush();					/* XXX */	\
    275  1.1  takemura } while (0)
    276  1.1  takemura 
    277  1.1  takemura #define	bus_space_write_2(t, h, o, v)					\
    278  1.1  takemura do {									\
    279  1.1  takemura 	(void) t;							\
    280  1.1  takemura 	*(volatile u_int16_t *)((h) + (o)) = (v);			\
    281  1.1  takemura 	wbflush();					/* XXX */	\
    282  1.1  takemura } while (0)
    283  1.1  takemura 
    284  1.1  takemura #define	bus_space_write_4(t, h, o, v)					\
    285  1.1  takemura do {									\
    286  1.1  takemura 	(void) t;							\
    287  1.1  takemura 	*(volatile u_int32_t *)((h) + (o)) = (v);			\
    288  1.1  takemura 	wbflush();					/* XXX */	\
    289  1.1  takemura } while (0)
    290  1.1  takemura 
    291  1.1  takemura #if 0	/* Cause a link error for bus_space_write_8 */
    292  1.1  takemura #define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
    293  1.1  takemura #endif
    294  1.1  takemura 
    295  1.1  takemura /*
    296  1.1  takemura  *	void bus_space_write_multi_N __P((bus_space_tag_t tag,
    297  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset,
    298  1.1  takemura  *	    const u_intN_t *addr, size_t count));
    299  1.1  takemura  *
    300  1.1  takemura  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
    301  1.1  takemura  * provided to bus space described by tag/handle/offset.
    302  1.1  takemura  */
    303  1.1  takemura 
    304  1.4      shin #define __HPCMIPS_bus_space_write_multi(BYTES,BITS)			\
    305  1.1  takemura static __inline void __CONCAT(bus_space_write_multi_,BYTES)		\
    306  1.1  takemura 	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
    307  1.1  takemura 	__PB_TYPENAME(BITS) *, size_t));				\
    308  1.1  takemura 									\
    309  1.1  takemura static __inline void							\
    310  1.1  takemura __CONCAT(bus_space_write_multi_,BYTES)(t, h, o, a, c)			\
    311  1.1  takemura 	bus_space_tag_t t;						\
    312  1.1  takemura 	bus_space_handle_t h;						\
    313  1.1  takemura 	bus_size_t o;							\
    314  1.1  takemura 	__PB_TYPENAME(BITS) *a;						\
    315  1.1  takemura 	size_t c;							\
    316  1.1  takemura {									\
    317  1.1  takemura 									\
    318  1.1  takemura 	while (c--)							\
    319  1.1  takemura 		__CONCAT(bus_space_write_,BYTES)(t, h, o, *a++);	\
    320  1.1  takemura }
    321  1.1  takemura 
    322  1.4      shin __HPCMIPS_bus_space_write_multi(1,8)
    323  1.4      shin __HPCMIPS_bus_space_write_multi(2,16)
    324  1.4      shin __HPCMIPS_bus_space_write_multi(4,32)
    325  1.1  takemura 
    326  1.1  takemura #if 0	/* Cause a link error for bus_space_write_8 */
    327  1.1  takemura #define	bus_space_write_multi_8(t, h, o, a, c)				\
    328  1.1  takemura 			!!! bus_space_write_multi_8 unimplimented !!!
    329  1.1  takemura #endif
    330  1.1  takemura 
    331  1.4      shin #undef __HPCMIPS_bus_space_write_multi
    332  1.1  takemura 
    333  1.1  takemura /*
    334  1.1  takemura  *	void bus_space_write_region_N __P((bus_space_tag_t tag,
    335  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset,
    336  1.1  takemura  *	    const u_intN_t *addr, size_t count));
    337  1.1  takemura  *
    338  1.1  takemura  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
    339  1.1  takemura  * to bus space described by tag/handle starting at `offset'.
    340  1.1  takemura  */
    341  1.1  takemura 
    342  1.4      shin #define __HPCMIPS_bus_space_write_region(BYTES,BITS)			\
    343  1.1  takemura static __inline void __CONCAT(bus_space_write_region_,BYTES)		\
    344  1.1  takemura 	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
    345  1.1  takemura 	__PB_TYPENAME(BITS) *, size_t));				\
    346  1.1  takemura 									\
    347  1.1  takemura static __inline void							\
    348  1.1  takemura __CONCAT(bus_space_write_region_,BYTES)(t, h, o, a, c)			\
    349  1.1  takemura 	bus_space_tag_t t;						\
    350  1.1  takemura 	bus_space_handle_t h;						\
    351  1.1  takemura 	bus_size_t o;							\
    352  1.1  takemura 	__PB_TYPENAME(BITS) *a;						\
    353  1.1  takemura 	size_t c;							\
    354  1.1  takemura {									\
    355  1.1  takemura 									\
    356  1.1  takemura 	while (c--) {							\
    357  1.1  takemura 		__CONCAT(bus_space_write_,BYTES)(t, h, o, *a++);	\
    358  1.1  takemura 		o += BYTES;						\
    359  1.1  takemura 	}								\
    360  1.1  takemura }
    361  1.1  takemura 
    362  1.4      shin __HPCMIPS_bus_space_write_region(1,8)
    363  1.4      shin __HPCMIPS_bus_space_write_region(2,16)
    364  1.4      shin __HPCMIPS_bus_space_write_region(4,32)
    365  1.1  takemura 
    366  1.1  takemura #if 0	/* Cause a link error for bus_space_write_region_8 */
    367  1.1  takemura #define	bus_space_write_region_8					\
    368  1.1  takemura 			!!! bus_space_write_region_8 unimplemented !!!
    369  1.1  takemura #endif
    370  1.1  takemura 
    371  1.4      shin #undef __HPCMIPS_bus_space_write_region
    372  1.1  takemura 
    373  1.1  takemura /*
    374  1.1  takemura  *	void bus_space_set_multi_N __P((bus_space_tag_t tag,
    375  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    376  1.1  takemura  *	    size_t count));
    377  1.1  takemura  *
    378  1.1  takemura  * Write the 1, 2, 4, or 8 byte value `val' to bus space described
    379  1.1  takemura  * by tag/handle/offset `count' times.
    380  1.1  takemura  */
    381  1.1  takemura 
    382  1.4      shin #define __HPCMIPS_bus_space_set_multi(BYTES,BITS)			\
    383  1.1  takemura static __inline void __CONCAT(bus_space_set_multi_,BYTES)		\
    384  1.1  takemura 	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
    385  1.1  takemura 	__PB_TYPENAME(BITS), size_t));					\
    386  1.1  takemura 									\
    387  1.1  takemura static __inline void							\
    388  1.1  takemura __CONCAT(bus_space_set_multi_,BYTES)(t, h, o, v, c)			\
    389  1.1  takemura 	bus_space_tag_t t;						\
    390  1.1  takemura 	bus_space_handle_t h;						\
    391  1.1  takemura 	bus_size_t o;							\
    392  1.1  takemura 	__PB_TYPENAME(BITS) v;						\
    393  1.1  takemura 	size_t c;							\
    394  1.1  takemura {									\
    395  1.1  takemura 									\
    396  1.1  takemura 	while (c--)							\
    397  1.1  takemura 		__CONCAT(bus_space_write_,BYTES)(t, h, o, v);		\
    398  1.1  takemura }
    399  1.1  takemura 
    400  1.4      shin __HPCMIPS_bus_space_set_multi(1,8)
    401  1.4      shin __HPCMIPS_bus_space_set_multi(2,16)
    402  1.4      shin __HPCMIPS_bus_space_set_multi(4,32)
    403  1.1  takemura 
    404  1.1  takemura #if 0	/* Cause a link error for bus_space_set_multi_8 */
    405  1.1  takemura #define	bus_space_set_multi_8						\
    406  1.1  takemura 			!!! bus_space_set_multi_8 unimplemented !!!
    407  1.1  takemura #endif
    408  1.1  takemura 
    409  1.4      shin #undef __HPCMIPS_bus_space_set_multi
    410  1.1  takemura 
    411  1.1  takemura /*
    412  1.1  takemura  *	void bus_space_set_region_N __P((bus_space_tag_t tag,
    413  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
    414  1.1  takemura  *	    size_t count));
    415  1.1  takemura  *
    416  1.1  takemura  * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
    417  1.1  takemura  * by tag/handle starting at `offset'.
    418  1.1  takemura  */
    419  1.1  takemura 
    420  1.4      shin #define __HPCMIPS_bus_space_set_region(BYTES,BITS)			\
    421  1.1  takemura static __inline void __CONCAT(bus_space_set_region_,BYTES)		\
    422  1.1  takemura 	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
    423  1.1  takemura 	__PB_TYPENAME(BITS), size_t));					\
    424  1.1  takemura 									\
    425  1.1  takemura static __inline void							\
    426  1.1  takemura __CONCAT(bus_space_set_region_,BYTES)(t, h, o, v, c)			\
    427  1.1  takemura 	bus_space_tag_t t;						\
    428  1.1  takemura 	bus_space_handle_t h;						\
    429  1.1  takemura 	bus_size_t o;							\
    430  1.1  takemura 	__PB_TYPENAME(BITS) v;						\
    431  1.1  takemura 	size_t c;							\
    432  1.1  takemura {									\
    433  1.1  takemura 									\
    434  1.1  takemura 	while (c--) {							\
    435  1.1  takemura 		__CONCAT(bus_space_write_,BYTES)(t, h, o, v);		\
    436  1.1  takemura 		o += BYTES;						\
    437  1.1  takemura 	}								\
    438  1.1  takemura }
    439  1.1  takemura 
    440  1.4      shin __HPCMIPS_bus_space_set_region(1,8)
    441  1.4      shin __HPCMIPS_bus_space_set_region(2,16)
    442  1.4      shin __HPCMIPS_bus_space_set_region(4,32)
    443  1.1  takemura 
    444  1.1  takemura #if 0	/* Cause a link error for bus_space_set_region_8 */
    445  1.1  takemura #define	bus_space_set_region_8						\
    446  1.1  takemura 			!!! bus_space_set_region_8 unimplemented !!!
    447  1.1  takemura #endif
    448  1.1  takemura 
    449  1.4      shin #undef __HPCMIPS_bus_space_set_region
    450  1.1  takemura 
    451  1.1  takemura /*
    452  1.1  takemura  *	void bus_space_copy_region_N __P((bus_space_tag_t tag,
    453  1.1  takemura  *	    bus_space_handle_t bsh1, bus_size_t off1,
    454  1.1  takemura  *	    bus_space_handle_t bsh2, bus_size_t off2,
    455  1.1  takemura  *	    bus_size_t count));
    456  1.1  takemura  *
    457  1.1  takemura  * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
    458  1.1  takemura  * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
    459  1.1  takemura  */
    460  1.1  takemura 
    461  1.4      shin #define	__HPCMIPS_copy_region(BYTES)					\
    462  1.1  takemura static __inline void __CONCAT(bus_space_copy_region_,BYTES)		\
    463  1.1  takemura 	__P((bus_space_tag_t,						\
    464  1.1  takemura 	    bus_space_handle_t bsh1, bus_size_t off1,			\
    465  1.1  takemura 	    bus_space_handle_t bsh2, bus_size_t off2,			\
    466  1.1  takemura 	    bus_size_t count));						\
    467  1.1  takemura 									\
    468  1.1  takemura static __inline void							\
    469  1.1  takemura __CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c)		\
    470  1.1  takemura 	bus_space_tag_t t;						\
    471  1.1  takemura 	bus_space_handle_t h1, h2;					\
    472  1.1  takemura 	bus_size_t o1, o2, c;						\
    473  1.1  takemura {									\
    474  1.1  takemura 	bus_size_t o;							\
    475  1.1  takemura 									\
    476  1.1  takemura 	if ((h1 + o1) >= (h2 + o2)) {					\
    477  1.1  takemura 		/* src after dest: copy forward */			\
    478  1.1  takemura 		for (o = 0; c != 0; c--, o += BYTES)			\
    479  1.1  takemura 			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
    480  1.1  takemura 			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
    481  1.1  takemura 	} else {							\
    482  1.1  takemura 		/* dest after src: copy backwards */			\
    483  1.1  takemura 		for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES)	\
    484  1.1  takemura 			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
    485  1.1  takemura 			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
    486  1.1  takemura 	}								\
    487  1.1  takemura }
    488  1.1  takemura 
    489  1.4      shin __HPCMIPS_copy_region(1)
    490  1.4      shin __HPCMIPS_copy_region(2)
    491  1.4      shin __HPCMIPS_copy_region(4)
    492  1.1  takemura 
    493  1.1  takemura #if 0	/* Cause a link error for bus_space_copy_region_8 */
    494  1.1  takemura #define	bus_space_copy_region_8						\
    495  1.1  takemura 			!!! bus_space_copy_region_8 unimplemented !!!
    496  1.1  takemura #endif
    497  1.1  takemura 
    498  1.4      shin #undef __HPCMIPS_copy_region
    499  1.1  takemura 
    500  1.1  takemura /*
    501  1.1  takemura  * Bus read/write barrier methods.
    502  1.1  takemura  *
    503  1.1  takemura  *	void bus_space_barrier __P((bus_space_tag_t tag,
    504  1.1  takemura  *	    bus_space_handle_t bsh, bus_size_t offset,
    505  1.1  takemura  *	    bus_size_t len, int flags));
    506  1.1  takemura  *
    507  1.1  takemura  * On the MIPS, we just flush the write buffer.
    508  1.1  takemura  */
    509  1.1  takemura #define	bus_space_barrier(t, h, o, l, f)	\
    510  1.1  takemura 	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)),	\
    511  1.1  takemura 	 wbflush())
    512  1.1  takemura #define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
    513  1.1  takemura #define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
    514  1.1  takemura 
    515  1.1  takemura #undef __PB_TYPENAME_PREFIX
    516  1.1  takemura #undef __PB_TYPENAME
    517  1.8      shin 
    518  1.8      shin /*
    519  1.8      shin  * Bus stream operations--defined in terms of non-stream counterparts
    520  1.8      shin  */
    521  1.8      shin #define __BUS_SPACE_HAS_STREAM_METHODS 1
    522  1.8      shin #define bus_space_read_stream_1 bus_space_read_1
    523  1.8      shin #define bus_space_read_stream_2 bus_space_read_2
    524  1.8      shin #define bus_space_read_stream_4 bus_space_read_4
    525  1.8      shin #define	bus_space_read_stream_8 bus_space_read_8
    526  1.8      shin #define bus_space_read_multi_stream_1 bus_space_read_multi_1
    527  1.8      shin #define bus_space_read_multi_stream_2 bus_space_read_multi_2
    528  1.8      shin #define bus_space_read_multi_stream_4 bus_space_read_multi_4
    529  1.8      shin #define	bus_space_read_multi_stream_8 bus_space_read_multi_8
    530  1.8      shin #define bus_space_read_region_stream_1 bus_space_read_region_1
    531  1.8      shin #define bus_space_read_region_stream_2 bus_space_read_region_2
    532  1.8      shin #define bus_space_read_region_stream_4 bus_space_read_region_4
    533  1.8      shin #define	bus_space_read_region_stream_8 bus_space_read_region_8
    534  1.8      shin #define bus_space_write_stream_1 bus_space_write_1
    535  1.8      shin #define bus_space_write_stream_2 bus_space_write_2
    536  1.8      shin #define bus_space_write_stream_4 bus_space_write_4
    537  1.8      shin #define	bus_space_write_stream_8 bus_space_write_8
    538  1.8      shin #define bus_space_write_multi_stream_1 bus_space_write_multi_1
    539  1.8      shin #define bus_space_write_multi_stream_2 bus_space_write_multi_2
    540  1.8      shin #define bus_space_write_multi_stream_4 bus_space_write_multi_4
    541  1.8      shin #define	bus_space_write_multi_stream_8 bus_space_write_multi_8
    542  1.8      shin #define bus_space_write_region_stream_1 bus_space_write_region_1
    543  1.8      shin #define bus_space_write_region_stream_2 bus_space_write_region_2
    544  1.8      shin #define bus_space_write_region_stream_4 bus_space_write_region_4
    545  1.8      shin #define	bus_space_write_region_stream_8	bus_space_write_region_8
    546  1.1  takemura 
    547  1.1  takemura /*
    548  1.1  takemura  * Flags used in various bus DMA methods.
    549  1.1  takemura  */
    550  1.1  takemura #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
    551  1.1  takemura #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
    552  1.1  takemura #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
    553  1.1  takemura #define	BUS_DMA_COHERENT	0x04	/* hint: map memory DMA coherent */
    554  1.9   thorpej #define	BUS_DMA_STREAMING	0x08	/* hint: sequential, unidirectional */
    555  1.1  takemura #define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
    556  1.1  takemura #define	BUS_DMA_BUS2		0x20
    557  1.1  takemura #define	BUS_DMA_BUS3		0x40
    558  1.1  takemura #define	BUS_DMA_BUS4		0x80
    559  1.1  takemura 
    560  1.4      shin #define	HPCMIPS_DMAMAP_COHERENT	0x100	/* no cache flush necessary on sync */
    561  1.1  takemura 
    562  1.1  takemura /* Forwards needed by prototypes below. */
    563  1.1  takemura struct mbuf;
    564  1.1  takemura struct uio;
    565  1.1  takemura 
    566  1.1  takemura /*
    567  1.1  takemura  * Operations performed by bus_dmamap_sync().
    568  1.1  takemura  */
    569  1.1  takemura #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
    570  1.1  takemura #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
    571  1.1  takemura #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
    572  1.1  takemura #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
    573  1.1  takemura 
    574  1.4      shin typedef struct hpcmips_bus_dma_tag	*bus_dma_tag_t;
    575  1.4      shin typedef struct hpcmips_bus_dmamap	*bus_dmamap_t;
    576  1.1  takemura 
    577  1.1  takemura /*
    578  1.1  takemura  *	bus_dma_segment_t
    579  1.1  takemura  *
    580  1.1  takemura  *	Describes a single contiguous DMA transaction.  Values
    581  1.1  takemura  *	are suitable for programming into DMA registers.
    582  1.1  takemura  */
    583  1.4      shin struct hpcmips_bus_dma_segment {
    584  1.1  takemura 	bus_addr_t	ds_addr;	/* DMA address */
    585  1.1  takemura 	bus_size_t	ds_len;		/* length of transfer */
    586  1.1  takemura 	bus_addr_t	_ds_vaddr;	/* virtual address, 0 if invalid */
    587  1.1  takemura };
    588  1.4      shin typedef struct hpcmips_bus_dma_segment	bus_dma_segment_t;
    589  1.1  takemura 
    590  1.1  takemura /*
    591  1.1  takemura  *	bus_dma_tag_t
    592  1.1  takemura  *
    593  1.1  takemura  *	A machine-dependent opaque type describing the implementation of
    594  1.1  takemura  *	DMA for a given bus.
    595  1.1  takemura  */
    596  1.1  takemura 
    597  1.4      shin struct hpcmips_bus_dma_tag {
    598  1.1  takemura 	/*
    599  1.1  takemura 	 * DMA mapping methods.
    600  1.1  takemura 	 */
    601  1.1  takemura 	int	(*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
    602  1.1  takemura 		    bus_size_t, bus_size_t, int, bus_dmamap_t *));
    603  1.1  takemura 	void	(*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
    604  1.1  takemura 	int	(*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
    605  1.1  takemura 		    bus_size_t, struct proc *, int));
    606  1.1  takemura 	int	(*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
    607  1.1  takemura 		    struct mbuf *, int));
    608  1.1  takemura 	int	(*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
    609  1.1  takemura 		    struct uio *, int));
    610  1.1  takemura 	int	(*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
    611  1.1  takemura 		    bus_dma_segment_t *, int, bus_size_t, int));
    612  1.1  takemura 	void	(*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
    613  1.1  takemura 	void	(*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
    614  1.1  takemura 		    bus_addr_t, bus_size_t, int));
    615  1.1  takemura 
    616  1.1  takemura 	/*
    617  1.1  takemura 	 * DMA memory utility functions.
    618  1.1  takemura 	 */
    619  1.1  takemura 	int	(*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
    620  1.1  takemura 		    bus_size_t, bus_dma_segment_t *, int, int *, int));
    621  1.1  takemura 	void	(*_dmamem_free) __P((bus_dma_tag_t,
    622  1.1  takemura 		    bus_dma_segment_t *, int));
    623  1.1  takemura 	int	(*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
    624  1.1  takemura 		    int, size_t, caddr_t *, int));
    625  1.1  takemura 	void	(*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
    626  1.7    simonb 	paddr_t	(*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
    627  1.7    simonb 		    int, off_t, int, int));
    628  1.6       uch 
    629  1.6       uch 	void	*_dmamap_chipset_v;
    630  1.1  takemura };
    631  1.1  takemura 
    632  1.1  takemura #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
    633  1.1  takemura 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
    634  1.1  takemura #define	bus_dmamap_destroy(t, p)				\
    635  1.1  takemura 	(*(t)->_dmamap_destroy)((t), (p))
    636  1.1  takemura #define	bus_dmamap_load(t, m, b, s, p, f)			\
    637  1.1  takemura 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
    638  1.1  takemura #define	bus_dmamap_load_mbuf(t, m, b, f)			\
    639  1.1  takemura 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
    640  1.1  takemura #define	bus_dmamap_load_uio(t, m, u, f)				\
    641  1.1  takemura 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
    642  1.1  takemura #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
    643  1.1  takemura 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
    644  1.1  takemura #define	bus_dmamap_unload(t, p)					\
    645  1.1  takemura 	(*(t)->_dmamap_unload)((t), (p))
    646  1.1  takemura #define	bus_dmamap_sync(t, p, o, l, ops)			\
    647  1.1  takemura 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
    648  1.1  takemura 
    649  1.1  takemura #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
    650  1.1  takemura 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
    651  1.1  takemura #define	bus_dmamem_free(t, sg, n)				\
    652  1.1  takemura 	(*(t)->_dmamem_free)((t), (sg), (n))
    653  1.1  takemura #define	bus_dmamem_map(t, sg, n, s, k, f)			\
    654  1.1  takemura 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
    655  1.1  takemura #define	bus_dmamem_unmap(t, k, s)				\
    656  1.1  takemura 	(*(t)->_dmamem_unmap)((t), (k), (s))
    657  1.1  takemura #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
    658  1.1  takemura 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
    659  1.1  takemura 
    660  1.1  takemura /*
    661  1.1  takemura  *	bus_dmamap_t
    662  1.1  takemura  *
    663  1.1  takemura  *	Describes a DMA mapping.
    664  1.1  takemura  */
    665  1.4      shin struct hpcmips_bus_dmamap {
    666  1.1  takemura 	/*
    667  1.1  takemura 	 * PRIVATE MEMBERS: not for use my machine-independent code.
    668  1.1  takemura 	 */
    669  1.1  takemura 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
    670  1.1  takemura 	int		_dm_segcnt;	/* number of segs this map can map */
    671  1.1  takemura 	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
    672  1.1  takemura 	bus_size_t	_dm_boundary;	/* don't cross this */
    673  1.1  takemura 	int		_dm_flags;	/* misc. flags */
    674  1.1  takemura 
    675  1.1  takemura 	/*
    676  1.1  takemura 	 * PUBLIC MEMBERS: these are used by machine-independent code.
    677  1.1  takemura 	 */
    678  1.1  takemura 	bus_size_t	dm_mapsize;	/* size of the mapping */
    679  1.1  takemura 	int		dm_nsegs;	/* # valid segments in mapping */
    680  1.1  takemura 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
    681  1.1  takemura };
    682  1.1  takemura 
    683  1.4      shin #ifdef _HPCMIPS_BUS_DMA_PRIVATE
    684  1.1  takemura int	_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
    685  1.1  takemura 	    bus_size_t, int, bus_dmamap_t *));
    686  1.1  takemura void	_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
    687  1.1  takemura int	_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
    688  1.1  takemura 	    bus_size_t, struct proc *, int));
    689  1.1  takemura int	_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
    690  1.1  takemura 	    struct mbuf *, int));
    691  1.1  takemura int	_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
    692  1.1  takemura 	    struct uio *, int));
    693  1.1  takemura int	_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
    694  1.1  takemura 	    bus_dma_segment_t *, int, bus_size_t, int));
    695  1.1  takemura void	_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
    696  1.1  takemura void	_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
    697  1.1  takemura 	    bus_size_t, int));
    698  1.1  takemura 
    699  1.1  takemura int	_bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
    700  1.1  takemura 	    bus_size_t alignment, bus_size_t boundary,
    701  1.1  takemura 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
    702  1.1  takemura void	_bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
    703  1.1  takemura 	    int nsegs));
    704  1.1  takemura int	_bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
    705  1.1  takemura 	    int nsegs, size_t size, caddr_t *kvap, int flags));
    706  1.1  takemura void	_bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
    707  1.1  takemura 	    size_t size));
    708  1.7    simonb paddr_t	_bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
    709  1.7    simonb 	    int nsegs, off_t off, int prot, int flags));
    710  1.1  takemura 
    711  1.1  takemura int	_bus_dmamem_alloc_range __P((bus_dma_tag_t tag, bus_size_t size,
    712  1.1  takemura 	    bus_size_t alignment, bus_size_t boundary,
    713  1.1  takemura 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
    714  1.1  takemura 	    vaddr_t low, vaddr_t high));
    715  1.1  takemura 
    716  1.4      shin extern struct hpcmips_bus_dma_tag hpcmips_default_bus_dma_tag;
    717  1.4      shin #endif /* _HPCMIPS_BUS_DMA_PRIVATE */
    718  1.1  takemura 
    719  1.1  takemura #endif /* _HPCMIPS_BUS_H_ */
    720