bus.h revision 1.12
1 /* $NetBSD: bus.h,v 1.12 2001/09/15 15:04:45 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #ifndef _HPCMIPS_BUS_H_ 41 #define _HPCMIPS_BUS_H_ 42 43 #include <mips/locore.h> 44 45 #ifdef BUS_SPACE_DEBUG 46 #include <sys/systm.h> /* for printf() prototype */ 47 /* 48 * Macros for checking the aligned-ness of pointers passed to bus 49 * space ops. Strict alignment is required by the MIPS architecture, 50 * and a trap will occur if unaligned access is performed. These 51 * may aid in the debugging of a broken device driver by displaying 52 * useful information about the problem. 53 */ 54 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 55 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 56 57 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 58 ({ \ 59 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 60 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 61 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 62 } \ 63 (void) 0; \ 64 }) 65 66 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 67 #else 68 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 69 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 70 #endif /* BUS_SPACE_DEBUG */ 71 /* 72 * Utility macros; do not use outside this file. 73 */ 74 #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS) 75 #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t) 76 77 /* 78 * Bus address and size types 79 */ 80 81 typedef u_long bus_addr_t; 82 typedef u_long bus_size_t; 83 84 /* 85 * Access methods for bus resources and address space. 86 */ 87 typedef struct hpcmips_bus_space *bus_space_tag_t; 88 typedef u_int32_t bus_space_handle_t; 89 /* 90 * Initialize extent. 91 */ 92 void hpcmips_init_bus_space_extent(bus_space_tag_t); 93 bus_space_tag_t hpcmips_alloc_bus_space_tag(void); 94 95 struct hpcmips_bus_space { 96 char t_name[16]; /* bus name */ 97 u_int32_t t_base; /* extent base */ 98 u_int32_t t_size; /* extent size */ 99 void *t_extent; 100 }; 101 102 103 /* 104 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 105 * bus_size_t size, int flags, bus_space_handle_t *bshp); 106 * 107 * Map a region of bus space. 108 */ 109 110 #define BUS_SPACE_MAP_CACHEABLE 0x01 111 #define BUS_SPACE_MAP_LINEAR 0x02 112 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 113 114 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 115 int, bus_space_handle_t *); 116 117 /* 118 * void bus_space_unmap(bus_space_tag_t t, 119 * bus_space_handle_t bsh, bus_size_t size); 120 * 121 * Unmap a region of bus space. 122 */ 123 124 void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 125 126 /* 127 * int bus_space_subregion(bus_space_tag_t t, 128 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 129 * bus_space_handle_t *nbshp); 130 * 131 * Get a new handle for a subregion of an already-mapped area of bus space. 132 */ 133 134 int bus_space_subregion(bus_space_tag_t, bus_space_handle_t, 135 bus_size_t, bus_size_t, bus_space_handle_t *); 136 137 /* 138 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 139 * bus_addr_t rend, bus_size_t size, bus_size_t align, 140 * bus_size_t boundary, int flags, bus_addr_t *addrp, 141 * bus_space_handle_t *bshp); 142 * 143 * Allocate a region of bus space. 144 */ 145 146 int bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t, 147 bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *); 148 149 /* 150 * int bus_space_free(bus_space_tag_t t, 151 * bus_space_handle_t bsh, bus_size_t size); 152 * 153 * Free a region of bus space. 154 */ 155 156 void bus_space_free(bus_space_tag_t, bus_space_handle_t, bus_size_t); 157 158 /* 159 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 160 * bus_space_handle_t bsh, bus_size_t offset); 161 * 162 * Read a 1, 2, 4, or 8 byte quantity from bus space 163 * described by tag/handle/offset. 164 */ 165 166 #define bus_space_read_1(t, h, o) \ 167 (wbflush(), /* XXX */ \ 168 (void) t, (*(volatile u_int8_t *)((h) + (o)))) 169 170 #define bus_space_read_2(t, h, o) \ 171 (wbflush(), /* XXX */ \ 172 (void) t, (*(volatile u_int16_t *)((h) + (o)))) 173 174 #define bus_space_read_4(t, h, o) \ 175 (wbflush(), /* XXX */ \ 176 (void) t, (*(volatile u_int32_t *)((h) + (o)))) 177 178 #if 0 /* Cause a link error for bus_space_read_8 */ 179 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 180 #endif 181 182 /* 183 * void bus_space_read_multi_N(bus_space_tag_t tag, 184 * bus_space_handle_t bsh, bus_size_t offset, 185 * u_intN_t *addr, size_t count); 186 * 187 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 188 * described by tag/handle/offset and copy into buffer provided. 189 */ 190 191 #define __HPCMIPS_bus_space_read_multi(BYTES,BITS) \ 192 static __inline void __CONCAT(bus_space_read_multi_,BYTES) \ 193 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 194 __PB_TYPENAME(BITS) *, size_t); \ 195 \ 196 static __inline void \ 197 __CONCAT(bus_space_read_multi_,BYTES)(bus_space_tag_t t, \ 198 bus_space_handle_t h, bus_size_t o, __PB_TYPENAME(BITS) *a, \ 199 size_t c) \ 200 { \ 201 \ 202 while (c--) \ 203 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 204 } 205 206 __HPCMIPS_bus_space_read_multi(1,8) 207 __HPCMIPS_bus_space_read_multi(2,16) 208 __HPCMIPS_bus_space_read_multi(4,32) 209 210 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 211 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 212 #endif 213 214 #undef __HPCMIPS_bus_space_read_multi 215 216 /* 217 * void bus_space_read_region_N(bus_space_tag_t tag, 218 * bus_space_handle_t bsh, bus_size_t offset, 219 * u_intN_t *addr, size_t count); 220 * 221 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 222 * described by tag/handle and starting at `offset' and copy into 223 * buffer provided. 224 */ 225 226 #define __HPCMIPS_bus_space_read_region(BYTES,BITS) \ 227 static __inline void __CONCAT(bus_space_read_region_,BYTES) \ 228 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 229 __PB_TYPENAME(BITS) *, size_t); \ 230 \ 231 static __inline void \ 232 __CONCAT(bus_space_read_region_,BYTES)(bus_space_tag_t t, \ 233 bus_space_handle_t h, bus_size_t o, __PB_TYPENAME(BITS) *a, \ 234 size_t c) \ 235 { \ 236 \ 237 while (c--) { \ 238 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 239 o += BYTES; \ 240 } \ 241 } 242 243 __HPCMIPS_bus_space_read_region(1,8) 244 __HPCMIPS_bus_space_read_region(2,16) 245 __HPCMIPS_bus_space_read_region(4,32) 246 247 #if 0 /* Cause a link error for bus_space_read_region_8 */ 248 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 249 #endif 250 251 #undef __HPCMIPS_bus_space_read_region 252 253 /* 254 * void bus_space_write_N(bus_space_tag_t tag, 255 * bus_space_handle_t bsh, bus_size_t offset, 256 * u_intN_t value); 257 * 258 * Write the 1, 2, 4, or 8 byte value `value' to bus space 259 * described by tag/handle/offset. 260 */ 261 262 #define bus_space_write_1(t, h, o, v) \ 263 do { \ 264 (void) t; \ 265 *(volatile u_int8_t *)((h) + (o)) = (v); \ 266 wbflush(); /* XXX */ \ 267 } while (0) 268 269 #define bus_space_write_2(t, h, o, v) \ 270 do { \ 271 (void) t; \ 272 *(volatile u_int16_t *)((h) + (o)) = (v); \ 273 wbflush(); /* XXX */ \ 274 } while (0) 275 276 #define bus_space_write_4(t, h, o, v) \ 277 do { \ 278 (void) t; \ 279 *(volatile u_int32_t *)((h) + (o)) = (v); \ 280 wbflush(); /* XXX */ \ 281 } while (0) 282 283 #if 0 /* Cause a link error for bus_space_write_8 */ 284 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 285 #endif 286 287 /* 288 * void bus_space_write_multi_N(bus_space_tag_t tag, 289 * bus_space_handle_t bsh, bus_size_t offset, 290 * const u_intN_t *addr, size_t count); 291 * 292 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 293 * provided to bus space described by tag/handle/offset. 294 */ 295 296 #define __HPCMIPS_bus_space_write_multi(BYTES,BITS) \ 297 static __inline void __CONCAT(bus_space_write_multi_,BYTES) \ 298 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 299 __PB_TYPENAME(BITS) *, size_t); \ 300 \ 301 static __inline void \ 302 __CONCAT(bus_space_write_multi_,BYTES)(bus_space_tag_t t, \ 303 bus_space_handle_t h, bus_size_t o, __PB_TYPENAME(BITS) *a, \ 304 size_t c) \ 305 { \ 306 \ 307 while (c--) \ 308 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 309 } 310 311 __HPCMIPS_bus_space_write_multi(1,8) 312 __HPCMIPS_bus_space_write_multi(2,16) 313 __HPCMIPS_bus_space_write_multi(4,32) 314 315 #if 0 /* Cause a link error for bus_space_write_8 */ 316 #define bus_space_write_multi_8(t, h, o, a, c) \ 317 !!! bus_space_write_multi_8 unimplimented !!! 318 #endif 319 320 #undef __HPCMIPS_bus_space_write_multi 321 322 /* 323 * void bus_space_write_region_N(bus_space_tag_t tag, 324 * bus_space_handle_t bsh, bus_size_t offset, 325 * const u_intN_t *addr, size_t count); 326 * 327 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 328 * to bus space described by tag/handle starting at `offset'. 329 */ 330 331 #define __HPCMIPS_bus_space_write_region(BYTES,BITS) \ 332 static __inline void __CONCAT(bus_space_write_region_,BYTES) \ 333 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 334 __PB_TYPENAME(BITS) *, size_t); \ 335 \ 336 static __inline void \ 337 __CONCAT(bus_space_write_region_,BYTES)(bus_space_tag_t t, \ 338 bus_space_handle_t h, bus_size_t o, __PB_TYPENAME(BITS) *a, \ 339 size_t c) \ 340 { \ 341 \ 342 while (c--) { \ 343 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 344 o += BYTES; \ 345 } \ 346 } 347 348 __HPCMIPS_bus_space_write_region(1,8) 349 __HPCMIPS_bus_space_write_region(2,16) 350 __HPCMIPS_bus_space_write_region(4,32) 351 352 #if 0 /* Cause a link error for bus_space_write_region_8 */ 353 #define bus_space_write_region_8 \ 354 !!! bus_space_write_region_8 unimplemented !!! 355 #endif 356 357 #undef __HPCMIPS_bus_space_write_region 358 359 /* 360 * void bus_space_set_multi_N(bus_space_tag_t tag, 361 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 362 * size_t count); 363 * 364 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 365 * by tag/handle/offset `count' times. 366 */ 367 368 #define __HPCMIPS_bus_space_set_multi(BYTES,BITS) \ 369 static __inline void __CONCAT(bus_space_set_multi_,BYTES) \ 370 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 371 __PB_TYPENAME(BITS), size_t); \ 372 \ 373 static __inline void \ 374 __CONCAT(bus_space_set_multi_,BYTES)(bus_space_tag_t t, \ 375 bus_space_handle_t h, bus_size_t o, __PB_TYPENAME(BITS) v, size_t c)\ 376 { \ 377 \ 378 while (c--) \ 379 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 380 } 381 382 __HPCMIPS_bus_space_set_multi(1,8) 383 __HPCMIPS_bus_space_set_multi(2,16) 384 __HPCMIPS_bus_space_set_multi(4,32) 385 386 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 387 #define bus_space_set_multi_8 \ 388 !!! bus_space_set_multi_8 unimplemented !!! 389 #endif 390 391 #undef __HPCMIPS_bus_space_set_multi 392 393 /* 394 * void bus_space_set_region_N(bus_space_tag_t tag, 395 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 396 * size_t count); 397 * 398 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 399 * by tag/handle starting at `offset'. 400 */ 401 402 #define __HPCMIPS_bus_space_set_region(BYTES,BITS) \ 403 static __inline void __CONCAT(bus_space_set_region_,BYTES) \ 404 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 405 __PB_TYPENAME(BITS), size_t); \ 406 \ 407 static __inline void \ 408 __CONCAT(bus_space_set_region_,BYTES)(bus_space_tag_t t, \ 409 bus_space_handle_t h, bus_size_t o, __PB_TYPENAME(BITS) v, size_t c)\ 410 { \ 411 \ 412 while (c--) { \ 413 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 414 o += BYTES; \ 415 } \ 416 } 417 418 __HPCMIPS_bus_space_set_region(1,8) 419 __HPCMIPS_bus_space_set_region(2,16) 420 __HPCMIPS_bus_space_set_region(4,32) 421 422 #if 0 /* Cause a link error for bus_space_set_region_8 */ 423 #define bus_space_set_region_8 \ 424 !!! bus_space_set_region_8 unimplemented !!! 425 #endif 426 427 #undef __HPCMIPS_bus_space_set_region 428 429 /* 430 * void bus_space_copy_region_N(bus_space_tag_t tag, 431 * bus_space_handle_t bsh1, bus_size_t off1, 432 * bus_space_handle_t bsh2, bus_size_t off2, 433 * bus_size_t count); 434 * 435 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 436 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 437 */ 438 439 #define __HPCMIPS_copy_region(BYTES) \ 440 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 441 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 442 bus_space_handle_t, bus_size_t, bus_size_t); \ 443 \ 444 static __inline void \ 445 __CONCAT(bus_space_copy_region_,BYTES)(bus_space_tag_t t, \ 446 bus_space_handle_t h1, bus_size_t o1, bus_space_handle_t h2, \ 447 bus_size_t o2, bus_size_t c) \ 448 { \ 449 bus_size_t o; \ 450 \ 451 if ((h1 + o1) >= (h2 + o2)) { \ 452 /* src after dest: copy forward */ \ 453 for (o = 0; c != 0; c--, o += BYTES) \ 454 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 455 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 456 } else { \ 457 /* dest after src: copy backwards */ \ 458 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 459 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 460 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 461 } \ 462 } 463 464 __HPCMIPS_copy_region(1) 465 __HPCMIPS_copy_region(2) 466 __HPCMIPS_copy_region(4) 467 468 #if 0 /* Cause a link error for bus_space_copy_region_8 */ 469 #define bus_space_copy_region_8 \ 470 !!! bus_space_copy_region_8 unimplemented !!! 471 #endif 472 473 #undef __HPCMIPS_copy_region 474 475 /* 476 * Bus read/write barrier methods. 477 * 478 * void bus_space_barrier(bus_space_tag_t tag, 479 * bus_space_handle_t bsh, bus_size_t offset, 480 * bus_size_t len, int flags); 481 * 482 * On the MIPS, we just flush the write buffer. 483 */ 484 #define bus_space_barrier(t, h, o, l, f) \ 485 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)), \ 486 wbflush()) 487 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 488 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 489 490 #undef __PB_TYPENAME_PREFIX 491 #undef __PB_TYPENAME 492 493 /* 494 * Bus stream operations--defined in terms of non-stream counterparts 495 */ 496 #define __BUS_SPACE_HAS_STREAM_METHODS 1 497 #define bus_space_read_stream_1 bus_space_read_1 498 #define bus_space_read_stream_2 bus_space_read_2 499 #define bus_space_read_stream_4 bus_space_read_4 500 #define bus_space_read_stream_8 bus_space_read_8 501 #define bus_space_read_multi_stream_1 bus_space_read_multi_1 502 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 503 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 504 #define bus_space_read_multi_stream_8 bus_space_read_multi_8 505 #define bus_space_read_region_stream_1 bus_space_read_region_1 506 #define bus_space_read_region_stream_2 bus_space_read_region_2 507 #define bus_space_read_region_stream_4 bus_space_read_region_4 508 #define bus_space_read_region_stream_8 bus_space_read_region_8 509 #define bus_space_write_stream_1 bus_space_write_1 510 #define bus_space_write_stream_2 bus_space_write_2 511 #define bus_space_write_stream_4 bus_space_write_4 512 #define bus_space_write_stream_8 bus_space_write_8 513 #define bus_space_write_multi_stream_1 bus_space_write_multi_1 514 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 515 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 516 #define bus_space_write_multi_stream_8 bus_space_write_multi_8 517 #define bus_space_write_region_stream_1 bus_space_write_region_1 518 #define bus_space_write_region_stream_2 bus_space_write_region_2 519 #define bus_space_write_region_stream_4 bus_space_write_region_4 520 #define bus_space_write_region_stream_8 bus_space_write_region_8 521 522 /* 523 * Flags used in various bus DMA methods. 524 */ 525 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 526 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 527 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 528 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 529 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 530 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 531 #define BUS_DMA_BUS2 0x020 532 #define BUS_DMA_BUS3 0x040 533 #define BUS_DMA_BUS4 0x080 534 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 535 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 536 537 #define HPCMIPS_DMAMAP_COHERENT 0x100 /* no cache flush necessary on sync */ 538 539 /* Forwards needed by prototypes below. */ 540 struct mbuf; 541 struct uio; 542 543 /* 544 * Operations performed by bus_dmamap_sync(). 545 */ 546 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 547 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 548 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 549 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 550 551 typedef struct hpcmips_bus_dma_tag *bus_dma_tag_t; 552 typedef struct hpcmips_bus_dmamap *bus_dmamap_t; 553 554 /* 555 * bus_dma_segment_t 556 * 557 * Describes a single contiguous DMA transaction. Values 558 * are suitable for programming into DMA registers. 559 */ 560 struct hpcmips_bus_dma_segment { 561 bus_addr_t ds_addr; /* DMA address */ 562 bus_size_t ds_len; /* length of transfer */ 563 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 564 }; 565 typedef struct hpcmips_bus_dma_segment bus_dma_segment_t; 566 567 /* 568 * bus_dma_tag_t 569 * 570 * A machine-dependent opaque type describing the implementation of 571 * DMA for a given bus. 572 */ 573 574 struct hpcmips_bus_dma_tag { 575 /* 576 * DMA mapping methods. 577 */ 578 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 579 bus_size_t, bus_size_t, int, bus_dmamap_t *); 580 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 581 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 582 bus_size_t, struct proc *, int); 583 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 584 struct mbuf *, int); 585 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 586 struct uio *, int); 587 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 588 bus_dma_segment_t *, int, bus_size_t, int); 589 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 590 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 591 bus_addr_t, bus_size_t, int); 592 593 /* 594 * DMA memory utility functions. 595 */ 596 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 597 bus_size_t, bus_dma_segment_t *, int, int *, int); 598 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); 599 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 600 int, size_t, caddr_t *, int); 601 void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t); 602 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 603 int, off_t, int, int); 604 605 void *_dmamap_chipset_v; 606 }; 607 608 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 609 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 610 #define bus_dmamap_destroy(t, p) \ 611 (*(t)->_dmamap_destroy)((t), (p)) 612 #define bus_dmamap_load(t, m, b, s, p, f) \ 613 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 614 #define bus_dmamap_load_mbuf(t, m, b, f) \ 615 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 616 #define bus_dmamap_load_uio(t, m, u, f) \ 617 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 618 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 619 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 620 #define bus_dmamap_unload(t, p) \ 621 (*(t)->_dmamap_unload)((t), (p)) 622 #define bus_dmamap_sync(t, p, o, l, ops) \ 623 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 624 625 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 626 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 627 #define bus_dmamem_free(t, sg, n) \ 628 (*(t)->_dmamem_free)((t), (sg), (n)) 629 #define bus_dmamem_map(t, sg, n, s, k, f) \ 630 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 631 #define bus_dmamem_unmap(t, k, s) \ 632 (*(t)->_dmamem_unmap)((t), (k), (s)) 633 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 634 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 635 636 /* 637 * bus_dmamap_t 638 * 639 * Describes a DMA mapping. 640 */ 641 struct hpcmips_bus_dmamap { 642 /* 643 * PRIVATE MEMBERS: not for use my machine-independent code. 644 */ 645 bus_size_t _dm_size; /* largest DMA transfer mappable */ 646 int _dm_segcnt; /* number of segs this map can map */ 647 bus_size_t _dm_maxsegsz; /* largest possible segment */ 648 bus_size_t _dm_boundary; /* don't cross this */ 649 int _dm_flags; /* misc. flags */ 650 651 /* 652 * PUBLIC MEMBERS: these are used by machine-independent code. 653 */ 654 bus_size_t dm_mapsize; /* size of the mapping */ 655 int dm_nsegs; /* # valid segments in mapping */ 656 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 657 }; 658 659 #ifdef _HPCMIPS_BUS_DMA_PRIVATE 660 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 661 bus_size_t, int, bus_dmamap_t *); 662 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 663 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t, 664 struct proc *, int); 665 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); 666 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); 667 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *, 668 int, bus_size_t, int); 669 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 670 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t, 671 int); 672 int _bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 673 bus_dma_segment_t *, int, int *, int); 674 void _bus_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 675 int _bus_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 676 caddr_t *, int); 677 void _bus_dmamem_unmap(bus_dma_tag_t, caddr_t, size_t); 678 paddr_t _bus_dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, 679 int); 680 int _bus_dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, 681 bus_size_t, bus_dma_segment_t *, int, int *, int, vaddr_t, 682 vaddr_t); 683 684 extern struct hpcmips_bus_dma_tag hpcmips_default_bus_dma_tag; 685 #endif /* _HPCMIPS_BUS_DMA_PRIVATE */ 686 687 #endif /* _HPCMIPS_BUS_H_ */ 688
Indexes created Mon Sep 29 21:09:56 GMT 2025