isa_machdep.c revision 1.38
11.38Sdyoung/* $NetBSD: isa_machdep.c,v 1.38 2009/08/19 15:12:31 dyoung Exp $ */ 21.1Stakemura 31.16Such/*- 41.16Such * Copyright (c) 1999 The NetBSD Foundation, Inc. 51.1Stakemura * All rights reserved. 61.1Stakemura * 71.16Such * This code is derived from software contributed to The NetBSD Foundation 81.16Such * by UCHIYAMA Yasushi. 91.16Such * 101.1Stakemura * Redistribution and use in source and binary forms, with or without 111.1Stakemura * modification, are permitted provided that the following conditions 121.1Stakemura * are met: 131.1Stakemura * 1. Redistributions of source code must retain the above copyright 141.1Stakemura * notice, this list of conditions and the following disclaimer. 151.16Such * 2. Redistributions in binary form must reproduce the above copyright 161.16Such * notice, this list of conditions and the following disclaimer in the 171.16Such * documentation and/or other materials provided with the distribution. 181.1Stakemura * 191.16Such * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 201.16Such * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 211.16Such * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 221.16Such * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 231.16Such * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 241.16Such * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 251.16Such * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 261.16Such * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 271.16Such * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 281.16Such * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 291.16Such * POSSIBILITY OF SUCH DAMAGE. 301.1Stakemura */ 311.28Slukem 321.28Slukem#include <sys/cdefs.h> 331.38Sdyoung__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.38 2009/08/19 15:12:31 dyoung Exp $"); 341.16Such 351.16Such#include "opt_vr41xx.h" 361.16Such 371.1Stakemura#include <sys/param.h> 381.1Stakemura#include <sys/systm.h> 391.10Ssato#include <sys/reboot.h> 401.33Sad#include <sys/device.h> 411.1Stakemura 421.1Stakemura#include <dev/isa/isavar.h> 431.1Stakemura#include <dev/isa/isareg.h> 441.1Stakemura 451.1Stakemura#include <machine/platid.h> 461.1Stakemura#include <machine/platid_mask.h> 471.18Stakemura#include <machine/bus.h> 481.18Stakemura#include <machine/bus_space_hpcmips.h> 491.23Such#include <machine/debug.h> 501.1Stakemura 511.13Stakemura#include <dev/hpc/hpciovar.h> 521.13Stakemura 531.22Stakemura#include <hpcmips/vr/vripif.h> 541.1Stakemura 551.1Stakemura#include "locators.h" 561.1Stakemura 571.4Ssato#define VRISADEBUG 581.4Ssato 591.4Ssato#ifdef VRISADEBUG 601.4Ssato#ifndef VRISADEBUG_CONF 611.4Ssato#define VRISADEBUG_CONF 0 621.4Ssato#endif /* VRISADEBUG_CONF */ 631.4Ssatoint vrisa_debug = VRISADEBUG_CONF; 641.4Ssato#define DPRINTF(arg) if (vrisa_debug) printf arg; 651.23Such#define DBITDISP(mask) if (vrisa_debug) dbg_bit_print(mask); 661.8Sjdolecek#define VPRINTF(arg) if (bootverbose || vrisa_debug) printf arg; 671.4Ssato#else /* VRISADEBUG */ 681.4Ssato#define DPRINTF(arg) 691.23Such#define DBITDISP(mask) 701.8Sjdolecek#define VPRINTF(arg) if (bootverbose) printf arg; 711.4Ssato#endif /* VRISADEBUG */ 721.4Ssato 731.13Stakemura/* 741.13Stakemura * intrrupt no. encoding: 751.13Stakemura * 761.13Stakemura * 0x0000000f ISA IRQ# 771.13Stakemura * 0x00ff0000 GPIO port# 781.13Stakemura * 0x01000000 interrupt signal hold/through (1:hold/0:though) 791.13Stakemura * 0x02000000 interrupt detection level (1:low /0:high ) 801.13Stakemura * 0x04000000 interrupt detection trigger (1:edge/0:level ) 811.13Stakemura */ 821.13Stakemura#define INTR_IRQ(i) (((i)>> 0) & 0x0f) 831.13Stakemura#define INTR_PORT(i) (((i)>>16) & 0xff) 841.13Stakemura#define INTR_MODE(i) (((i)>>24) & 0x07) 851.13Stakemura#define INTR_NIRQS 16 861.13Stakemura 871.16Suchint vrisabprint(void *, const char *); 881.16Suchint vrisabmatch(struct device *, struct cfdata *, void *); 891.16Suchvoid vrisabattach(struct device *, struct device *, void *); 901.1Stakemura 911.1Stakemurastruct vrisab_softc { 921.1Stakemura struct device sc_dev; 931.13Stakemura hpcio_chip_t sc_hc; 941.13Stakemura int sc_intr_map[INTR_NIRQS]; /* ISA <-> GIU inerrupt line mapping */ 951.3Stakemura struct hpcmips_isa_chipset sc_isa_ic; 961.1Stakemura}; 971.1Stakemura 981.27SthorpejCFATTACH_DECL(vrisab, sizeof(struct vrisab_softc), 991.27Sthorpej vrisabmatch, vrisabattach, NULL, NULL); 1001.1Stakemura 1011.1Stakemura#ifdef DEBUG_FIND_PCIC 1021.1Stakemura#include <mips/cpuregs.h> 1031.1Stakemura#warning DEBUG_FIND_PCIC 1041.16Suchstatic void __find_pcic(void); 1051.1Stakemura#endif 1061.1Stakemura 1071.11Ssato#ifdef DEBUG_FIND_COMPORT 1081.11Ssato#include <mips/cpuregs.h> 1091.11Ssato#include <dev/ic/ns16550reg.h> 1101.11Ssato#include <dev/ic/comreg.h> 1111.11Ssato#warning DEBUG_FIND_COMPORT 1121.16Suchstatic void __find_comport(void); 1131.11Ssato#endif 1141.11Ssato 1151.1Stakemuraint 1161.16Suchvrisabmatch(struct device *parent, struct cfdata *match, void *aux) 1171.1Stakemura{ 1181.13Stakemura struct hpcio_attach_args *haa = aux; 1191.1Stakemura platid_mask_t mask; 1201.20Stakemura int n; 1211.20Stakemura 1221.25Sthorpej if (strcmp(haa->haa_busname, match->cf_name)) 1231.16Such return (0); 1241.16Such 1251.13Stakemura if (match->cf_loc[HPCIOIFCF_PLATFORM] == HPCIOIFCF_PLATFORM_DEFAULT) 1261.16Such return (1); 1271.16Such 1281.13Stakemura mask = PLATID_DEREF(match->cf_loc[HPCIOIFCF_PLATFORM]); 1291.20Stakemura if ((n = platid_match(&platid, &mask)) != 0) 1301.20Stakemura return (n + 2); 1311.16Such 1321.16Such return (0); 1331.1Stakemura} 1341.1Stakemura 1351.1Stakemuravoid 1361.16Suchvrisabattach(struct device *parent, struct device *self, void *aux) 1371.1Stakemura{ 1381.13Stakemura struct hpcio_attach_args *haa = aux; 1391.1Stakemura struct vrisab_softc *sc = (void*)self; 1401.1Stakemura struct isabus_attach_args iba; 1411.18Stakemura struct bus_space_tag_hpcmips *iot, *memt; 1421.1Stakemura bus_addr_t offset; 1431.1Stakemura int i; 1441.1Stakemura 1451.13Stakemura sc->sc_hc = (*haa->haa_getchip)(haa->haa_sc, VRIP_IOCHIP_VRGIU); 1461.3Stakemura sc->sc_isa_ic.ic_sc = sc; 1471.1Stakemura 1481.3Stakemura iba.iba_ic = &sc->sc_isa_ic; 1491.1Stakemura iba.iba_dmat = 0; /* XXX not yet */ 1501.1Stakemura 1511.1Stakemura /* Allocate ISA memory space */ 1521.19Stakemura memt = hpcmips_alloc_bus_space_tag(); 1531.32Sthorpej offset = device_cfdata(&sc->sc_dev)->cf_loc[VRISABIFCF_ISAMEMOFFSET]; 1541.19Stakemura hpcmips_init_bus_space(memt, 1551.19Stakemura (struct bus_space_tag_hpcmips *)haa->haa_iot, "ISA mem", 1561.18Stakemura VR_ISA_MEM_BASE + offset, VR_ISA_MEM_SIZE - offset); 1571.19Stakemura iba.iba_memt = &memt->bst; 1581.1Stakemura 1591.1Stakemura /* Allocate ISA port space */ 1601.19Stakemura iot = hpcmips_alloc_bus_space_tag(); 1611.32Sthorpej offset = device_cfdata(&sc->sc_dev)->cf_loc[VRISABIFCF_ISAPORTOFFSET]; 1621.19Stakemura hpcmips_init_bus_space(iot, 1631.19Stakemura (struct bus_space_tag_hpcmips *)haa->haa_iot, "ISA port", 1641.18Stakemura VR_ISA_PORT_BASE + offset, VR_ISA_PORT_SIZE - offset); 1651.19Stakemura iba.iba_iot = &iot->bst; 1661.1Stakemura 1671.1Stakemura#ifdef DEBUG_FIND_PCIC 1681.1Stakemura#warning DEBUG_FIND_PCIC 1691.1Stakemura __find_pcic(); 1701.1Stakemura#else 1711.1Stakemura /* Initialize ISA IRQ <-> GPIO mapping */ 1721.13Stakemura for (i = 0; i < INTR_NIRQS; i++) 1731.1Stakemura sc->sc_intr_map[i] = -1; 1741.15Senami printf(": ISA port %#x-%#x mem %#x-%#x\n", 1751.18Stakemura iot->base, iot->base + iot->size, 1761.18Stakemura memt->base, memt->base + memt->size); 1771.29Sdrochner config_found_ia(self, "isabus", &iba, vrisabprint); 1781.1Stakemura#endif 1791.11Ssato 1801.11Ssato#ifdef DEBUG_FIND_COMPORT 1811.11Ssato#warning DEBUG_FIND_COMPORT 1821.11Ssato __find_comport(); 1831.11Ssato#endif 1841.1Stakemura} 1851.1Stakemura 1861.1Stakemuraint 1871.16Suchvrisabprint(void *aux, const char *pnp) 1881.1Stakemura{ 1891.1Stakemura if (pnp) 1901.1Stakemura return (QUIET); 1911.16Such 1921.1Stakemura return (UNCONF); 1931.1Stakemura} 1941.1Stakemura 1951.1Stakemuravoid 1961.16Suchisa_attach_hook(struct device *parent, struct device *self, 1971.16Such struct isabus_attach_args *iba) 1981.1Stakemura{ 1991.16Such 2001.6Scgd} 2011.6Scgd 2021.37Sdyoungvoid 2031.38Sdyoungisa_detach_hook(isa_chipset_tag_t ic, device_t self) 2041.37Sdyoung{ 2051.37Sdyoung} 2061.37Sdyoung 2071.6Scgdconst struct evcnt * 2081.6Scgdisa_intr_evcnt(isa_chipset_tag_t ic, int irq) 2091.6Scgd{ 2101.6Scgd 2111.6Scgd /* XXX for now, no evcnt parent reported */ 2121.16Such return (NULL); 2131.1Stakemura} 2141.1Stakemura 2151.1Stakemuravoid * 2161.16Suchisa_intr_establish(isa_chipset_tag_t ic, int intr, int type, int level, 2171.16Such int (*ih_fun)(void*), void *ih_arg) 2181.1Stakemura{ 2191.3Stakemura struct vrisab_softc *sc = ic->ic_sc; 2201.3Stakemura int port, irq, mode; 2211.2Stakemura 2221.2Stakemura static int intr_modes[8] = { 2231.13Stakemura HPCIO_INTR_LEVEL_HIGH_THROUGH, 2241.13Stakemura HPCIO_INTR_LEVEL_HIGH_HOLD, 2251.13Stakemura HPCIO_INTR_LEVEL_LOW_THROUGH, 2261.13Stakemura HPCIO_INTR_LEVEL_LOW_HOLD, 2271.13Stakemura HPCIO_INTR_EDGE_THROUGH, 2281.13Stakemura HPCIO_INTR_EDGE_HOLD, 2291.13Stakemura HPCIO_INTR_EDGE_THROUGH, 2301.13Stakemura HPCIO_INTR_EDGE_HOLD, 2311.2Stakemura }; 2321.4Ssato#ifdef VRISADEBUG 2331.30She static const char* intr_mode_names[8] = { 2341.2Stakemura "level high through", 2351.2Stakemura "level high hold", 2361.2Stakemura "level low through", 2371.2Stakemura "level low hold", 2381.2Stakemura "edge through", 2391.2Stakemura "edge hold", 2401.2Stakemura "edge through", 2411.2Stakemura "edge hold", 2421.2Stakemura }; 2431.4Ssato#endif /* VRISADEBUG */ 2441.1Stakemura /* 2451.1Stakemura * ISA IRQ <-> GPIO port mapping 2461.1Stakemura */ 2471.2Stakemura irq = INTR_IRQ(intr); 2481.3Stakemura if (sc->sc_intr_map[irq] != -1) { 2491.3Stakemura /* already mapped */ 2501.3Stakemura intr = sc->sc_intr_map[irq]; 2511.2Stakemura } else { 2521.3Stakemura /* not mapped yet */ 2531.3Stakemura sc->sc_intr_map[irq] = intr; /* Register it */ 2541.1Stakemura } 2551.3Stakemura mode = INTR_MODE(intr); 2561.3Stakemura port = INTR_PORT(intr); 2571.3Stakemura 2581.14Stakemura VPRINTF(("ISA IRQ %d -> %s port %d, %s\n", 2591.16Such irq, sc->sc_hc->hc_name, port, intr_mode_names[mode])); 2601.3Stakemura 2611.1Stakemura /* Call Vr routine */ 2621.16Such return (hpcio_intr_establish(sc->sc_hc, port, intr_modes[mode], 2631.16Such ih_fun, ih_arg)); 2641.1Stakemura} 2651.1Stakemura 2661.1Stakemuravoid 2671.35Sdslisa_intr_disestablish(isa_chipset_tag_t ic, void *arg) 2681.1Stakemura{ 2691.3Stakemura struct vrisab_softc *sc = ic->ic_sc; 2701.1Stakemura /* Call Vr routine */ 2711.13Stakemura hpcio_intr_disestablish(sc->sc_hc, arg); 2721.1Stakemura} 2731.1Stakemura 2741.1Stakemuraint 2751.16Suchisa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq) 2761.1Stakemura{ 2771.1Stakemura /* XXX not coded yet. this is temporary XXX */ 2781.4Ssato DPRINTF(("isa_intr_alloc:")); 2791.23Such DBITDISP(mask); 2801.3Stakemura *irq = (ffs(mask) -1); /* XXX */ 2811.16Such 2821.16Such return (0); 2831.1Stakemura} 2841.1Stakemura 2851.1Stakemura#ifdef DEBUG_FIND_PCIC 2861.1Stakemura#warning DEBUG_FIND_PCIC 2871.1Stakemurastatic void 2881.1Stakemura__find_pcic(void) 2891.1Stakemura{ 2901.1Stakemura int i, j, step, found; 2911.1Stakemura u_int32_t addr; 2921.1Stakemura u_int8_t reg; 2931.1Stakemura int __read_revid (u_int32_t port) 2941.16Such { 2951.16Such addr = MIPS_PHYS_TO_KSEG1(i + port); 2961.16Such printf("%#x\r", i); 2971.16Such for (found = 0, j = 0; j < 0x100; j += 0x40) { 2981.16Such *((volatile u_int8_t *)addr) = j; 2991.16Such reg = *((volatile u_int8_t *)(addr + 1)); 3001.1Stakemura#ifdef DEBUG_FIND_PCIC_I82365SL_ONLY 3011.16Such if (reg == 0x82 || reg == 0x83) { 3021.1Stakemura#else 3031.17Sshin if ((reg & 0xc0) == 0x80) { 3041.1Stakemura#endif 3051.16Such found++; 3061.16Such } 3071.16Such if (found) 3081.16Such printf("\nfound %d socket at %#x" 3091.16Such "(base from %#x)\n", found, addr, 3101.16Such i + port - VR_ISA_PORT_BASE); 3111.17Sshin } 3121.16Such } 3131.1Stakemura step = 0x1000000; 3141.1Stakemura printf("\nFinding PCIC. Trying ISA port %#x-%#x step %#x\n", 3151.16Such VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step); 3161.16Such for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE; 3171.16Such i+= step) { 3181.1Stakemura __read_revid (0x3e0); 3191.1Stakemura __read_revid (0x3e2); 3201.11Ssato } 3211.11Ssato} 3221.16Such#endif /* DEBUG_FIND_PCIC */ 3231.11Ssato 3241.11Ssato 3251.11Ssato#ifdef DEBUG_FIND_COMPORT 3261.11Ssato#warning DEBUG_FIND_COMPORT 3271.11Ssato 3281.16Suchstatic int probe_com(u_int32_t); 3291.11Ssato 3301.16Suchstatic int 3311.16Suchprobe_com(u_int32_t port_addr) 3321.11Ssato{ 3331.16Such u_int32_t addr; 3341.16Such u_int8_t ubtmp1, ubtmp2; 3351.11Ssato 3361.16Such addr = MIPS_PHYS_TO_KSEG1(port_addr); 3371.11Ssato 3381.16Such *((volatile u_int8_t *)(addr + com_cfcr)) = LCR_8BITS; 3391.16Such *((volatile u_int8_t *)(addr + com_iir)) = 0; 3401.11Ssato 3411.16Such ubtmp1 = *((volatile u_int8_t *)(addr + com_cfcr)); 3421.16Such ubtmp2 = *((volatile u_int8_t *)(addr + com_iir)); 3431.11Ssato 3441.16Such if ((ubtmp1 != LCR_8BITS) || ((ubtmp2 & 0x38) != 0)) { 3451.16Such return (0); 3461.11Ssato } 3471.11Ssato 3481.16Such return (1); 3491.11Ssato} 3501.11Ssato 3511.11Ssatostatic void 3521.36Scegger__find_comport(void) 3531.11Ssato{ 3541.16Such int found; 3551.16Such u_int32_t port, step; 3561.11Ssato 3571.11Ssato found = 0; 3581.11Ssato step = 0x08; 3591.11Ssato 3601.11Ssato printf("Searching COM port. Trying ISA port %#x-%#x step %#x\n", 3611.16Such VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE - 1, step ); 3621.11Ssato 3631.16Such for (port = VR_ISA_PORT_BASE; 3641.16Such port < (VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE); port += step){ 3651.16Such if (probe_com(port)) { 3661.11Ssato found++; 3671.16Such printf("found %d at %#x\n", found, port); 3681.11Ssato } 3691.1Stakemura } 3701.1Stakemura} 3711.16Such#endif /* DEBUG_FIND_COMPORT */ 372