isa_machdep.c revision 1.2
1/* $NetBSD: isa_machdep.c,v 1.2 2000/03/04 13:43:19 takemura Exp $ */ 2 3/* 4 * Copyright (c) 1999, by UCHIYAMA Yasushi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28#include <sys/param.h> 29#include <sys/systm.h> 30#include <sys/device.h> 31 32#include <machine/bus.h> 33 34#include <dev/isa/isavar.h> 35#include <dev/isa/isareg.h> 36 37#include <machine/platid.h> 38#include <machine/platid_mask.h> 39 40#include <hpcmips/vr/vripreg.h> 41#include <hpcmips/vr/vripvar.h> 42#include <hpcmips/vr/vrgiureg.h> 43 44#include "locators.h" 45 46int vrisabprint __P((void*, const char*)); 47int vrisabmatch __P((struct device*, struct cfdata*, void*)); 48void vrisabattach __P((struct device*, struct device*, void*)); 49 50struct vrisab_softc { 51 struct device sc_dev; 52 vrgiu_chipset_tag_t sc_gc; 53 vrgiu_function_tag_t sc_gf; 54 int sc_intr_map[MAX_GPIO_INOUT]; /* ISA <-> GIU inerrupt line mapping */ 55}; 56 57struct cfattach vrisab_ca = { 58 sizeof(struct vrisab_softc), vrisabmatch, vrisabattach 59}; 60 61#ifdef DEBUG_FIND_PCIC 62#include <mips/cpuregs.h> 63#warning DEBUG_FIND_PCIC 64static void __find_pcic __P((void)); 65#endif 66 67int 68vrisabmatch(parent, match, aux) 69 struct device *parent; 70 struct cfdata *match; 71 void *aux; 72{ 73 struct gpbus_attach_args *gpa = aux; 74 platid_mask_t mask; 75 76 if (strcmp(gpa->gpa_busname, match->cf_driver->cd_name)) 77 return 0; 78 if (match->cf_loc[VRISABIFCF_PLATFORM] == VRISABIFCF_PLATFORM_DEFAULT) 79 return 1; 80 mask = PLATID_DEREF(match->cf_loc[VRISABIFCF_PLATFORM]); 81 if (platid_match(&platid, &mask)) 82 return 2; 83 return 0; 84} 85 86void 87vrisabattach(parent, self, aux) 88 struct device *parent; 89 struct device *self; 90 void *aux; 91{ 92 struct gpbus_attach_args *gpa = aux; 93 struct vrgiu_softc *chipset; 94 struct vrisab_softc *sc = (void*)self; 95 struct isabus_attach_args iba; 96 bus_addr_t offset; 97 int i; 98 99 sc->sc_gc = chipset = gpa->gpa_gc; 100 sc->sc_gf = gpa->gpa_gf; 101 102 iba.iba_busname = "isa"; 103 iba.iba_ic = sc; 104 iba.iba_dmat = 0; /* XXX not yet */ 105 106 /* Allocate ISA memory space */ 107 iba.iba_memt = hpcmips_alloc_bus_space_tag(); 108 strcpy(iba.iba_memt->t_name, "ISA mem"); 109 offset = sc->sc_dev.dv_cfdata->cf_loc[VRISABIFCF_ISAMEMOFFSET]; 110 iba.iba_memt->t_base = VR_ISA_MEM_BASE + offset; 111 iba.iba_memt->t_size = VR_ISA_MEM_SIZE - offset; 112 hpcmips_init_bus_space_extent(iba.iba_memt); 113 114 /* Allocate ISA port space */ 115 iba.iba_iot = hpcmips_alloc_bus_space_tag(); 116 strcpy(iba.iba_iot->t_name, "ISA port"); 117 /* Platform dependent setting. */ 118 offset = sc->sc_dev.dv_cfdata->cf_loc[VRISABIFCF_ISAPORTOFFSET]; 119 iba.iba_iot->t_base = VR_ISA_PORT_BASE + offset; 120 iba.iba_iot->t_size = VR_ISA_PORT_SIZE - offset; 121 122 hpcmips_init_bus_space_extent(iba.iba_iot); 123 124#ifdef DEBUG_FIND_PCIC 125#warning DEBUG_FIND_PCIC 126 __find_pcic(); 127#else 128 /* Initialize ISA IRQ <-> GPIO mapping */ 129 for (i = 0; i < MAX_GPIO_INOUT; i++) 130 sc->sc_intr_map[i] = -1; 131 printf (":ISA port %#x-%#x mem %#x-%#x\n", 132 iba.iba_iot->t_base, iba.iba_iot->t_base + iba.iba_iot->t_size, 133 iba.iba_memt->t_base, iba.iba_memt->t_base + iba.iba_memt->t_base); 134 config_found(self, &iba, vrisabprint); 135#endif 136} 137 138int 139vrisabprint(aux, pnp) 140 void *aux; 141 const char *pnp; 142{ 143 if (pnp) 144 return (QUIET); 145 return (UNCONF); 146} 147 148void 149isa_attach_hook(parent, self, iba) 150 struct device *parent, *self; 151 struct isabus_attach_args *iba; 152{ 153} 154 155void * 156isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg) 157 isa_chipset_tag_t ic; 158 int intr; 159 int type; /* XXX not yet */ 160 int level; /* XXX not yet */ 161 int (*ih_fun) __P((void*)); 162 void *ih_arg; 163{ 164 struct vrisab_softc *sc = (void*)ic; 165 int port, irq; 166 167 /* 168 * 'intr' encoding: 169 * 170 * 0x0000000f ISA IRQ# 171 * 0x00ff0000 GPIO port# (if port# is 0xff, it means 'not specified') 172 * 0x01000000 interrupt signal hold/through (1:hold/0:though) 173 * 0x02000000 interrupt detection level (1:low /0:high ) 174 * 0x04000000 interrupt detection trigger (1:edge/0:level ) 175 */ 176#define INTR_IRQ(i) (((i)>> 0) & 0x0f) 177#define INTR_PORT(i) (((i)>>16) & 0xff) 178#define INTR_MODE(i) (((i)>>24) & 0x07) 179#define INTR_PORTISNULL(p) ((p) == 0xff) 180#define INTR_PORTNULL 0x00ff0000 181 static int intr_modes[8] = { 182 VRGIU_INTR_LEVEL_HIGH_THROUGH, 183 VRGIU_INTR_LEVEL_HIGH_HOLD, 184 VRGIU_INTR_LEVEL_LOW_THROUGH, 185 VRGIU_INTR_LEVEL_LOW_HOLD, 186 VRGIU_INTR_EDGE_THROUGH, 187 VRGIU_INTR_EDGE_HOLD, 188 VRGIU_INTR_EDGE_THROUGH, 189 VRGIU_INTR_EDGE_HOLD, 190 }; 191 static char* intr_mode_names[8] = { 192 "level high through", 193 "level high hold", 194 "level low through", 195 "level low hold", 196 "edge through", 197 "edge hold", 198 "edge through", 199 "edge hold", 200 }; 201 202 /* 203 * ISA IRQ <-> GPIO port mapping 204 */ 205 irq = INTR_IRQ(intr); 206 port = INTR_PORT(intr); 207 if (INTR_PORTISNULL(port)) { 208 /* GPIO port not specfied */ 209 port = sc->sc_intr_map[irq]; /* Use Already mapped port */ 210 } else { 211 /* GPIO port specified. */ 212 if (sc->sc_intr_map[irq] != -1) 213 panic("isa_intr_establish: conflict GPIO line. %d <-> %d", 214 port, sc->sc_intr_map[irq]); 215 sc->sc_intr_map[irq] = port; /* Register it */ 216 printf("ISA IRQ %d -> GPIO port %d, %s\n", 217 irq, port, intr_mode_names[INTR_MODE(intr)]); 218 } 219 if (port == -1) 220 panic("isa_intr_establish: can't ISA IRQ to GIU port."); 221 /* Call Vr routine */ 222 return sc->sc_gf->gf_intr_establish(sc->sc_gc, port, 223 intr_modes[INTR_MODE(intr)], 224 level, ih_fun, ih_arg); 225} 226 227void 228isa_intr_disestablish(ic, arg) 229 isa_chipset_tag_t ic; 230 void *arg; 231{ 232 struct vrisab_softc *sc = (void*)ic; 233 /* Call Vr routine */ 234 sc->sc_gf->gf_intr_disestablish(sc->sc_gc, arg); 235} 236 237int 238isa_intr_alloc(ic, mask, type, irq) 239 isa_chipset_tag_t ic; 240 int mask; 241 int type; 242 int *irq; 243{ 244 /* XXX not coded yet. this is temporary XXX */ 245 printf ("isa_intr_alloc:"); 246 bitdisp32(mask); 247 *irq = ((ffs(mask) -1) | INTR_PORTNULL); /* XXX */ 248 return 0; 249} 250 251#ifdef DEBUG_FIND_PCIC 252#warning DEBUG_FIND_PCIC 253static void 254__find_pcic(void) 255{ 256 int i, j, step, found; 257 u_int32_t addr; 258 u_int8_t reg; 259 int __read_revid (u_int32_t port) 260 { 261 addr = MIPS_PHYS_TO_KSEG1(i + port); 262 printf("%#x\r", i); 263 for (found = 0, j = 0; j < 0x100; j += 0x40) { 264 *((volatile u_int8_t*)addr) = j; 265 reg = *((volatile u_int8_t*)(addr + 1)); 266#ifdef DEBUG_FIND_PCIC_I82365SL_ONLY 267 if (reg == 0x82 || reg == 0x83) { 268#else 269 if ((reg & 0xc0) == 0x80) { 270#endif 271 found++; 272 } 273 } 274 if (found) 275 printf("\nfound %d socket at %#x (base from %#x)\n", found, addr, 276 i + port - VR_ISA_PORT_BASE); 277 }; 278 step = 0x1000000; 279 printf("\nFinding PCIC. Trying ISA port %#x-%#x step %#x\n", 280 VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step); 281 for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE; i+= step) { 282 __read_revid (0x3e0); 283 __read_revid (0x3e2); 284 } 285} 286#endif 287 288 289