isa_machdep.c revision 1.4 
1/*	$NetBSD: isa_machdep.c,v 1.4 2000/03/10 01:30:06 sato Exp $	*/
2
3/*
4 * Copyright (c) 1999, by UCHIYAMA Yasushi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 *    derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28#include <sys/param.h>
29#include <sys/systm.h>
30#include <sys/device.h>
31
32#include <machine/bus.h>
33
34#include <dev/isa/isavar.h>
35#include <dev/isa/isareg.h>
36
37#include <machine/platid.h>
38#include <machine/platid_mask.h>
39
40#include <hpcmips/vr/vripreg.h>
41#include <hpcmips/vr/vripvar.h>
42#include <hpcmips/vr/vrgiureg.h>
43
44#include "locators.h"
45
46#define VRISADEBUG
47
48#ifdef VRISADEBUG
49#ifndef VRISADEBUG_CONF
50#define VRISADEBUG_CONF 0
51#endif /* VRISADEBUG_CONF */
52int vrisa_debug = VRISADEBUG_CONF;
53#define DPRINTF(arg) if (vrisa_debug) printf arg;
54#define DBITDISP32(mask) if (vrisa_debug) bitdisp32(mask);
55#else /* VRISADEBUG */
56#define DPRINTF(arg)
57#define DBITDISP32(mask)
58#endif /* VRISADEBUG */
59
60int	vrisabprint __P((void*, const char*));
61int	vrisabmatch __P((struct device*, struct cfdata*, void*));
62void	vrisabattach __P((struct device*, struct device*, void*));
63
64struct vrisab_softc {
65	struct device sc_dev;
66	vrgiu_chipset_tag_t sc_gc;
67	vrgiu_function_tag_t sc_gf;
68	int sc_intr_map[MAX_GPIO_INOUT]; /* ISA <-> GIU inerrupt line mapping */
69	struct hpcmips_isa_chipset sc_isa_ic;
70};
71
72struct cfattach vrisab_ca = {
73	sizeof(struct vrisab_softc), vrisabmatch, vrisabattach
74};
75
76#ifdef DEBUG_FIND_PCIC
77#include <mips/cpuregs.h>
78#warning DEBUG_FIND_PCIC
79static void __find_pcic __P((void));
80#endif
81
82int
83vrisabmatch(parent, match, aux)
84	struct device *parent;
85	struct cfdata *match;
86	void *aux;
87{
88	struct gpbus_attach_args *gpa = aux;
89	platid_mask_t mask;
90
91	if (strcmp(gpa->gpa_busname, match->cf_driver->cd_name))
92		return 0;
93	if (match->cf_loc[VRISABIFCF_PLATFORM] == VRISABIFCF_PLATFORM_DEFAULT)
94		return 1;
95	mask = PLATID_DEREF(match->cf_loc[VRISABIFCF_PLATFORM]);
96	if (platid_match(&platid, &mask))
97		return 2;
98	return 0;
99}
100
101void
102vrisabattach(parent, self, aux)
103	struct device *parent;
104	struct device *self;
105	void *aux;
106{
107	struct gpbus_attach_args *gpa = aux;
108	struct vrgiu_softc *chipset;
109	struct vrisab_softc *sc = (void*)self;
110	struct isabus_attach_args iba;
111	bus_addr_t offset;
112	int i;
113
114	sc->sc_gc = chipset = gpa->gpa_gc;
115	sc->sc_gf = gpa->gpa_gf;
116	sc->sc_isa_ic.ic_sc = sc;
117
118	iba.iba_busname = "isa";
119	iba.iba_ic	= &sc->sc_isa_ic;
120	iba.iba_dmat    = 0; /* XXX not yet */
121
122	/* Allocate ISA memory space */
123	iba.iba_memt    = hpcmips_alloc_bus_space_tag();
124	strcpy(iba.iba_memt->t_name, "ISA mem");
125	offset = sc->sc_dev.dv_cfdata->cf_loc[VRISABIFCF_ISAMEMOFFSET];
126	iba.iba_memt->t_base = VR_ISA_MEM_BASE + offset;
127	iba.iba_memt->t_size = VR_ISA_MEM_SIZE - offset;
128	hpcmips_init_bus_space_extent(iba.iba_memt);
129
130	/* Allocate ISA port space */
131	iba.iba_iot     = hpcmips_alloc_bus_space_tag();
132	strcpy(iba.iba_iot->t_name, "ISA port");
133	/* Platform dependent setting. */
134	offset = sc->sc_dev.dv_cfdata->cf_loc[VRISABIFCF_ISAPORTOFFSET];
135	iba.iba_iot->t_base = VR_ISA_PORT_BASE + offset;
136	iba.iba_iot->t_size = VR_ISA_PORT_SIZE - offset;
137
138	hpcmips_init_bus_space_extent(iba.iba_iot);
139
140#ifdef DEBUG_FIND_PCIC
141#warning DEBUG_FIND_PCIC
142	__find_pcic();
143#else
144	/* Initialize ISA IRQ <-> GPIO mapping */
145	for (i = 0; i < MAX_GPIO_INOUT; i++)
146		sc->sc_intr_map[i] = -1;
147	printf (":ISA port %#x-%#x mem %#x-%#x\n",
148		iba.iba_iot->t_base, iba.iba_iot->t_base + iba.iba_iot->t_size,
149		iba.iba_memt->t_base, iba.iba_memt->t_base + iba.iba_memt->t_base);
150	config_found(self, &iba, vrisabprint);
151#endif
152}
153
154int
155vrisabprint(aux, pnp)
156	void *aux;
157	const char *pnp;
158{
159	if (pnp)
160		return (QUIET);
161	return (UNCONF);
162}
163
164void
165isa_attach_hook(parent, self, iba)
166	struct device *parent, *self;
167	struct isabus_attach_args *iba;
168{
169}
170
171void *
172isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg)
173	isa_chipset_tag_t ic;
174	int intr;
175	int type;  /* XXX not yet */
176	int level;  /* XXX not yet */
177	int (*ih_fun) __P((void*));
178	void *ih_arg;
179{
180	struct vrisab_softc *sc = ic->ic_sc;
181	int port, irq, mode;
182
183	/*
184	 * 'intr' encoding:
185	 *
186	 * 0x0000000f ISA IRQ#
187	 * 0x00ff0000 GPIO port#
188	 * 0x01000000 interrupt signal hold/through	(1:hold/0:though)
189	 * 0x02000000 interrupt detection level		(1:low /0:high	)
190	 * 0x04000000 interrupt detection trigger	(1:edge/0:level	)
191	 */
192#define INTR_IRQ(i)	(((i)>> 0) & 0x0f)
193#define INTR_PORT(i)	(((i)>>16) & 0xff)
194#define INTR_MODE(i)	(((i)>>24) & 0x07)
195	static int intr_modes[8] = {
196		VRGIU_INTR_LEVEL_HIGH_THROUGH,
197		VRGIU_INTR_LEVEL_HIGH_HOLD,
198		VRGIU_INTR_LEVEL_LOW_THROUGH,
199		VRGIU_INTR_LEVEL_LOW_HOLD,
200		VRGIU_INTR_EDGE_THROUGH,
201		VRGIU_INTR_EDGE_HOLD,
202		VRGIU_INTR_EDGE_THROUGH,
203		VRGIU_INTR_EDGE_HOLD,
204	};
205#ifdef VRISADEBUG
206	static char* intr_mode_names[8] = {
207		"level high through",
208		"level high hold",
209		"level low through",
210		"level low hold",
211		"edge through",
212		"edge hold",
213		"edge through",
214		"edge hold",
215	};
216#endif /* VRISADEBUG */
217	/*
218	 * ISA IRQ <-> GPIO port mapping
219	 */
220	irq = INTR_IRQ(intr);
221	if (sc->sc_intr_map[irq] != -1) {
222		/* already mapped */
223		intr = sc->sc_intr_map[irq];
224	} else {
225		/* not mapped yet */
226		sc->sc_intr_map[irq] = intr; /* Register it */
227	}
228	mode = INTR_MODE(intr);
229	port = INTR_PORT(intr);
230
231	DPRINTF(("ISA IRQ %d -> GPIO port %d, %s\n",
232	       irq, port, intr_mode_names[mode]));
233
234	/* Call Vr routine */
235	return sc->sc_gf->gf_intr_establish(sc->sc_gc, port,
236					    intr_modes[mode],
237					    level, ih_fun, ih_arg);
238}
239
240void
241isa_intr_disestablish(ic, arg)
242	isa_chipset_tag_t ic;
243	void *arg;
244{
245	struct vrisab_softc *sc = ic->ic_sc;
246	/* Call Vr routine */
247	sc->sc_gf->gf_intr_disestablish(sc->sc_gc, arg);
248}
249
250int
251isa_intr_alloc(ic, mask, type, irq)
252	isa_chipset_tag_t ic;
253	int mask;
254	int type;
255	int *irq;
256{
257	/* XXX not coded yet. this is temporary XXX */
258	DPRINTF(("isa_intr_alloc:"));
259	DBITDISP32(mask);
260	*irq = (ffs(mask) -1); /* XXX */
261	return 0;
262}
263
264#ifdef DEBUG_FIND_PCIC
265#warning DEBUG_FIND_PCIC
266static void
267__find_pcic(void)
268{
269	int i, j, step, found;
270	u_int32_t addr;
271	u_int8_t reg;
272	int __read_revid (u_int32_t port)
273		{
274			addr = MIPS_PHYS_TO_KSEG1(i + port);
275			printf("%#x\r", i);
276			for (found = 0, j = 0; j < 0x100; j += 0x40) {
277				*((volatile u_int8_t*)addr) = j;
278				reg = *((volatile u_int8_t*)(addr + 1));
279#ifdef DEBUG_FIND_PCIC_I82365SL_ONLY
280				if (reg == 0x82 || reg == 0x83) {
281#else
282				if ((reg & 0xc0) == 0x80) {
283#endif
284					found++;
285				}
286			}
287			if (found)
288				printf("\nfound %d socket at %#x (base from %#x)\n", found, addr,
289				       i + port - VR_ISA_PORT_BASE);
290		};
291	step = 0x1000000;
292	printf("\nFinding PCIC. Trying ISA port %#x-%#x step %#x\n",
293	       VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step);
294	for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE; i+= step) {
295		__read_revid (0x3e0);
296		__read_revid (0x3e2);
297	}
298}
299#endif
300