isa_machdep.c revision 1.5
1/*	$NetBSD: isa_machdep.c,v 1.5 2000/04/03 03:40:00 sato Exp $	*/
2
3/*
4 * Copyright (c) 1999, by UCHIYAMA Yasushi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 *    derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28#include <sys/param.h>
29#include <sys/systm.h>
30#include <sys/device.h>
31
32#include <machine/bus.h>
33
34#include <dev/isa/isavar.h>
35#include <dev/isa/isareg.h>
36
37#include <machine/platid.h>
38#include <machine/platid_mask.h>
39
40#include <hpcmips/hpcmips/machdep.h>
41#include <hpcmips/vr/vripreg.h>
42#include <hpcmips/vr/vripvar.h>
43#include <hpcmips/vr/vrgiureg.h>
44
45#include "locators.h"
46
47#define VRISADEBUG
48
49#ifdef VRISADEBUG
50#ifndef VRISADEBUG_CONF
51#define VRISADEBUG_CONF 0
52#endif /* VRISADEBUG_CONF */
53int vrisa_debug = VRISADEBUG_CONF;
54#define DPRINTF(arg) if (vrisa_debug) printf arg;
55#define DBITDISP32(mask) if (vrisa_debug) bitdisp32(mask);
56#define VPRINTF(arg) if (hpcmips_verbose || vrisa_debug) printf arg;
57#else /* VRISADEBUG */
58#define DPRINTF(arg)
59#define DBITDISP32(mask)
60#define VPRINTF(arg) if (hpcmips_verbose) printf arg;
61#endif /* VRISADEBUG */
62
63int	vrisabprint __P((void*, const char*));
64int	vrisabmatch __P((struct device*, struct cfdata*, void*));
65void	vrisabattach __P((struct device*, struct device*, void*));
66
67struct vrisab_softc {
68	struct device sc_dev;
69	vrgiu_chipset_tag_t sc_gc;
70	vrgiu_function_tag_t sc_gf;
71	int sc_intr_map[MAX_GPIO_INOUT]; /* ISA <-> GIU inerrupt line mapping */
72	struct hpcmips_isa_chipset sc_isa_ic;
73};
74
75struct cfattach vrisab_ca = {
76	sizeof(struct vrisab_softc), vrisabmatch, vrisabattach
77};
78
79#ifdef DEBUG_FIND_PCIC
80#include <mips/cpuregs.h>
81#warning DEBUG_FIND_PCIC
82static void __find_pcic __P((void));
83#endif
84
85int
86vrisabmatch(parent, match, aux)
87	struct device *parent;
88	struct cfdata *match;
89	void *aux;
90{
91	struct gpbus_attach_args *gpa = aux;
92	platid_mask_t mask;
93
94	if (strcmp(gpa->gpa_busname, match->cf_driver->cd_name))
95		return 0;
96	if (match->cf_loc[VRISABIFCF_PLATFORM] == VRISABIFCF_PLATFORM_DEFAULT)
97		return 1;
98	mask = PLATID_DEREF(match->cf_loc[VRISABIFCF_PLATFORM]);
99	if (platid_match(&platid, &mask))
100		return 2;
101	return 0;
102}
103
104void
105vrisabattach(parent, self, aux)
106	struct device *parent;
107	struct device *self;
108	void *aux;
109{
110	struct gpbus_attach_args *gpa = aux;
111	struct vrgiu_softc *chipset;
112	struct vrisab_softc *sc = (void*)self;
113	struct isabus_attach_args iba;
114	bus_addr_t offset;
115	int i;
116
117	sc->sc_gc = chipset = gpa->gpa_gc;
118	sc->sc_gf = gpa->gpa_gf;
119	sc->sc_isa_ic.ic_sc = sc;
120
121	iba.iba_busname = "isa";
122	iba.iba_ic	= &sc->sc_isa_ic;
123	iba.iba_dmat    = 0; /* XXX not yet */
124
125	/* Allocate ISA memory space */
126	iba.iba_memt    = hpcmips_alloc_bus_space_tag();
127	strcpy(iba.iba_memt->t_name, "ISA mem");
128	offset = sc->sc_dev.dv_cfdata->cf_loc[VRISABIFCF_ISAMEMOFFSET];
129	iba.iba_memt->t_base = VR_ISA_MEM_BASE + offset;
130	iba.iba_memt->t_size = VR_ISA_MEM_SIZE - offset;
131	hpcmips_init_bus_space_extent(iba.iba_memt);
132
133	/* Allocate ISA port space */
134	iba.iba_iot     = hpcmips_alloc_bus_space_tag();
135	strcpy(iba.iba_iot->t_name, "ISA port");
136	/* Platform dependent setting. */
137	offset = sc->sc_dev.dv_cfdata->cf_loc[VRISABIFCF_ISAPORTOFFSET];
138	iba.iba_iot->t_base = VR_ISA_PORT_BASE + offset;
139	iba.iba_iot->t_size = VR_ISA_PORT_SIZE - offset;
140
141	hpcmips_init_bus_space_extent(iba.iba_iot);
142
143#ifdef DEBUG_FIND_PCIC
144#warning DEBUG_FIND_PCIC
145	__find_pcic();
146#else
147	/* Initialize ISA IRQ <-> GPIO mapping */
148	for (i = 0; i < MAX_GPIO_INOUT; i++)
149		sc->sc_intr_map[i] = -1;
150	printf (":ISA port %#x-%#x mem %#x-%#x\n",
151		iba.iba_iot->t_base, iba.iba_iot->t_base + iba.iba_iot->t_size,
152		iba.iba_memt->t_base, iba.iba_memt->t_base + iba.iba_memt->t_base);
153	config_found(self, &iba, vrisabprint);
154#endif
155}
156
157int
158vrisabprint(aux, pnp)
159	void *aux;
160	const char *pnp;
161{
162	if (pnp)
163		return (QUIET);
164	return (UNCONF);
165}
166
167void
168isa_attach_hook(parent, self, iba)
169	struct device *parent, *self;
170	struct isabus_attach_args *iba;
171{
172}
173
174void *
175isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg)
176	isa_chipset_tag_t ic;
177	int intr;
178	int type;  /* XXX not yet */
179	int level;  /* XXX not yet */
180	int (*ih_fun) __P((void*));
181	void *ih_arg;
182{
183	struct vrisab_softc *sc = ic->ic_sc;
184	int port, irq, mode;
185
186	/*
187	 * 'intr' encoding:
188	 *
189	 * 0x0000000f ISA IRQ#
190	 * 0x00ff0000 GPIO port#
191	 * 0x01000000 interrupt signal hold/through	(1:hold/0:though)
192	 * 0x02000000 interrupt detection level		(1:low /0:high	)
193	 * 0x04000000 interrupt detection trigger	(1:edge/0:level	)
194	 */
195#define INTR_IRQ(i)	(((i)>> 0) & 0x0f)
196#define INTR_PORT(i)	(((i)>>16) & 0xff)
197#define INTR_MODE(i)	(((i)>>24) & 0x07)
198	static int intr_modes[8] = {
199		VRGIU_INTR_LEVEL_HIGH_THROUGH,
200		VRGIU_INTR_LEVEL_HIGH_HOLD,
201		VRGIU_INTR_LEVEL_LOW_THROUGH,
202		VRGIU_INTR_LEVEL_LOW_HOLD,
203		VRGIU_INTR_EDGE_THROUGH,
204		VRGIU_INTR_EDGE_HOLD,
205		VRGIU_INTR_EDGE_THROUGH,
206		VRGIU_INTR_EDGE_HOLD,
207	};
208#ifdef VRISADEBUG
209	static char* intr_mode_names[8] = {
210		"level high through",
211		"level high hold",
212		"level low through",
213		"level low hold",
214		"edge through",
215		"edge hold",
216		"edge through",
217		"edge hold",
218	};
219#endif /* VRISADEBUG */
220	/*
221	 * ISA IRQ <-> GPIO port mapping
222	 */
223	irq = INTR_IRQ(intr);
224	if (sc->sc_intr_map[irq] != -1) {
225		/* already mapped */
226		intr = sc->sc_intr_map[irq];
227	} else {
228		/* not mapped yet */
229		sc->sc_intr_map[irq] = intr; /* Register it */
230	}
231	mode = INTR_MODE(intr);
232	port = INTR_PORT(intr);
233
234	VPRINTF(("ISA IRQ %d -> GPIO port %d, %s\n",
235	       irq, port, intr_mode_names[mode]));
236
237	/* Call Vr routine */
238	return sc->sc_gf->gf_intr_establish(sc->sc_gc, port,
239					    intr_modes[mode],
240					    level, ih_fun, ih_arg);
241}
242
243void
244isa_intr_disestablish(ic, arg)
245	isa_chipset_tag_t ic;
246	void *arg;
247{
248	struct vrisab_softc *sc = ic->ic_sc;
249	/* Call Vr routine */
250	sc->sc_gf->gf_intr_disestablish(sc->sc_gc, arg);
251}
252
253int
254isa_intr_alloc(ic, mask, type, irq)
255	isa_chipset_tag_t ic;
256	int mask;
257	int type;
258	int *irq;
259{
260	/* XXX not coded yet. this is temporary XXX */
261	DPRINTF(("isa_intr_alloc:"));
262	DBITDISP32(mask);
263	*irq = (ffs(mask) -1); /* XXX */
264	return 0;
265}
266
267#ifdef DEBUG_FIND_PCIC
268#warning DEBUG_FIND_PCIC
269static void
270__find_pcic(void)
271{
272	int i, j, step, found;
273	u_int32_t addr;
274	u_int8_t reg;
275	int __read_revid (u_int32_t port)
276		{
277			addr = MIPS_PHYS_TO_KSEG1(i + port);
278			printf("%#x\r", i);
279			for (found = 0, j = 0; j < 0x100; j += 0x40) {
280				*((volatile u_int8_t*)addr) = j;
281				reg = *((volatile u_int8_t*)(addr + 1));
282#ifdef DEBUG_FIND_PCIC_I82365SL_ONLY
283				if (reg == 0x82 || reg == 0x83) {
284#else
285				if ((reg & 0xc0) == 0x80) {
286#endif
287					found++;
288				}
289			}
290			if (found)
291				printf("\nfound %d socket at %#x (base from %#x)\n", found, addr,
292				       i + port - VR_ISA_PORT_BASE);
293		};
294	step = 0x1000000;
295	printf("\nFinding PCIC. Trying ISA port %#x-%#x step %#x\n",
296	       VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step);
297	for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE; i+= step) {
298		__read_revid (0x3e0);
299		__read_revid (0x3e2);
300	}
301}
302#endif
303