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com.c revision 1.1
      1  1.1  igy /*	$NetBSD: com.c,v 1.1 2003/05/01 07:02:01 igy Exp $	*/
      2  1.1  igy 
      3  1.1  igy /*-
      4  1.1  igy  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
      5  1.1  igy  * All rights reserved.
      6  1.1  igy  *
      7  1.1  igy  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  igy  * by Charles M. Hannum.
      9  1.1  igy  *
     10  1.1  igy  * Redistribution and use in source and binary forms, with or without
     11  1.1  igy  * modification, are permitted provided that the following conditions
     12  1.1  igy  * are met:
     13  1.1  igy  * 1. Redistributions of source code must retain the above copyright
     14  1.1  igy  *    notice, this list of conditions and the following disclaimer.
     15  1.1  igy  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  igy  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  igy  *    documentation and/or other materials provided with the distribution.
     18  1.1  igy  * 3. All advertising materials mentioning features or use of this software
     19  1.1  igy  *    must display the following acknowledgement:
     20  1.1  igy  *        This product includes software developed by the NetBSD
     21  1.1  igy  *        Foundation, Inc. and its contributors.
     22  1.1  igy  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  igy  *    contributors may be used to endorse or promote products derived
     24  1.1  igy  *    from this software without specific prior written permission.
     25  1.1  igy  *
     26  1.1  igy  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  igy  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  igy  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  igy  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  igy  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  igy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  igy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  igy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  igy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  igy  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  igy  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  igy  */
     38  1.1  igy 
     39  1.1  igy /*
     40  1.1  igy  * Copyright (c) 1991 The Regents of the University of California.
     41  1.1  igy  * All rights reserved.
     42  1.1  igy  *
     43  1.1  igy  * Redistribution and use in source and binary forms, with or without
     44  1.1  igy  * modification, are permitted provided that the following conditions
     45  1.1  igy  * are met:
     46  1.1  igy  * 1. Redistributions of source code must retain the above copyright
     47  1.1  igy  *    notice, this list of conditions and the following disclaimer.
     48  1.1  igy  * 2. Redistributions in binary form must reproduce the above copyright
     49  1.1  igy  *    notice, this list of conditions and the following disclaimer in the
     50  1.1  igy  *    documentation and/or other materials provided with the distribution.
     51  1.1  igy  * 3. All advertising materials mentioning features or use of this software
     52  1.1  igy  *    must display the following acknowledgement:
     53  1.1  igy  *	This product includes software developed by the University of
     54  1.1  igy  *	California, Berkeley and its contributors.
     55  1.1  igy  * 4. Neither the name of the University nor the names of its contributors
     56  1.1  igy  *    may be used to endorse or promote products derived from this software
     57  1.1  igy  *    without specific prior written permission.
     58  1.1  igy  *
     59  1.1  igy  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     60  1.1  igy  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     61  1.1  igy  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     62  1.1  igy  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     63  1.1  igy  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     64  1.1  igy  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     65  1.1  igy  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66  1.1  igy  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67  1.1  igy  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68  1.1  igy  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69  1.1  igy  * SUCH DAMAGE.
     70  1.1  igy  *
     71  1.1  igy  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     72  1.1  igy  */
     73  1.1  igy 
     74  1.1  igy #include <sys/param.h>
     75  1.1  igy 
     76  1.1  igy #include <lib/libsa/stand.h>
     77  1.1  igy 
     78  1.1  igy #include <hpcmips/vr/vripreg.h>
     79  1.1  igy #include <hpcmips/vr/cmureg.h>
     80  1.1  igy 
     81  1.1  igy #include <dev/ic/comreg.h>
     82  1.1  igy #include <dev/ic/ns16550reg.h>
     83  1.1  igy #include <dev/ic/st16650reg.h>
     84  1.1  igy #define com_lcr com_cfcr
     85  1.1  igy 
     86  1.1  igy #include "extern.h"
     87  1.1  igy 
     88  1.1  igy #if 0
     89  1.1  igy #define	VRCOM_FREQ	18432000	/* 18.432kHz */
     90  1.1  igy #endif
     91  1.1  igy 
     92  1.1  igy int
     93  1.1  igy iskey(void)
     94  1.1  igy {
     95  1.1  igy 	return ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_RXRDY);
     96  1.1  igy }
     97  1.1  igy 
     98  1.1  igy int
     99  1.1  igy getchar(void)
    100  1.1  igy {
    101  1.1  igy 	u_int8_t	stat;
    102  1.1  igy 	u_int8_t	c;
    103  1.1  igy 
    104  1.1  igy 	/* block until a character becomes available */
    105  1.1  igy 	while (!ISKEY)
    106  1.1  igy 		;
    107  1.1  igy 
    108  1.1  igy 	c = REGREAD_1(VR4181_SIU_ADDR, com_data);
    109  1.1  igy 	stat = REGREAD_1(VR4181_SIU_ADDR, com_iir);
    110  1.1  igy 
    111  1.1  igy 	return c;
    112  1.1  igy }
    113  1.1  igy 
    114  1.1  igy static void
    115  1.1  igy comcnputc(int c)
    116  1.1  igy {
    117  1.1  igy 	int	timo;
    118  1.1  igy 
    119  1.1  igy 	/* wait for any pending transmission to finish */
    120  1.1  igy 	timo = 150000;
    121  1.1  igy 	while (!ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_TXRDY)
    122  1.1  igy 	       && --timo)
    123  1.1  igy 		continue;
    124  1.1  igy 
    125  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_data, c);
    126  1.1  igy 
    127  1.1  igy 	/* wait for this transmission to complete */
    128  1.1  igy 	timo = 1500000;
    129  1.1  igy 	while (!ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_TXRDY)
    130  1.1  igy 	       && --timo)
    131  1.1  igy 		continue;
    132  1.1  igy }
    133  1.1  igy 
    134  1.1  igy void
    135  1.1  igy putchar(int c)
    136  1.1  igy {
    137  1.1  igy 	if (c == '\n')
    138  1.1  igy 		comcnputc('\r');
    139  1.1  igy 	comcnputc(c);
    140  1.1  igy }
    141  1.1  igy 
    142  1.1  igy /*
    143  1.1  igy  * Initialize UART for use as console or KGDB line.
    144  1.1  igy  */
    145  1.1  igy void
    146  1.1  igy comcninit(void)
    147  1.1  igy {
    148  1.1  igy 	int		rate;
    149  1.1  igy 
    150  1.1  igy 	/* enable divisor latch access and set bit rate */
    151  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_DLAB);
    152  1.1  igy 	rate = 10; /* 115200bps with VRCOM_FREQ */
    153  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_dlbl, rate);
    154  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_dlbh, rate >> 8);
    155  1.1  igy 
    156  1.1  igy 	/*
    157  1.1  igy 	 * disable divisor latch access and,
    158  1.1  igy 	 * set "8bit non-parity 1 stop bit"
    159  1.1  igy 	 */
    160  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_8BITS);
    161  1.1  igy 
    162  1.1  igy 	/* disable all interrupt */
    163  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_ier, 0);
    164  1.1  igy 
    165  1.1  igy 	/* enable FIFO */
    166  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_fifo,
    167  1.1  igy 		   FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
    168  1.1  igy 
    169  1.1  igy 	/* set DTR and RTS low */
    170  1.1  igy 	REGWRITE_1(VR4181_SIU_ADDR, com_mcr, MCR_DTR | MCR_RTS);
    171  1.1  igy }
    172