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extern.h revision 1.2.2.1
      1  1.2.2.1  skrll /* $NetBSD: extern.h,v 1.2.2.1 2004/08/03 10:35:18 skrll Exp $ */
      2      1.1    igy 
      3      1.1    igy /*
      4  1.2.2.1  skrll  * Copyright (c) 2003 Naoto Shimazaki.
      5      1.1    igy  * All rights reserved.
      6      1.1    igy  *
      7      1.1    igy  * Redistribution and use in source and binary forms, with or without
      8      1.1    igy  * modification, are permitted provided that the following conditions
      9      1.1    igy  * are met:
     10      1.1    igy  * 1. Redistributions of source code must retain the above copyright
     11      1.1    igy  *    notice, this list of conditions and the following disclaimer.
     12      1.1    igy  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1    igy  *    notice, this list of conditions and the following disclaimer in the
     14      1.1    igy  *    documentation and/or other materials provided with the distribution.
     15      1.1    igy  *
     16  1.2.2.1  skrll  * THIS SOFTWARE IS PROVIDED BY NAOTO SHIMAZAKI AND CONTRIBUTORS ``AS IS''
     17  1.2.2.1  skrll  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     18  1.2.2.1  skrll  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  1.2.2.1  skrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE NAOTO OR CONTRIBUTORS BE
     20  1.2.2.1  skrll  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21      1.1    igy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22      1.1    igy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23      1.1    igy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24      1.1    igy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  1.2.2.1  skrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     26  1.2.2.1  skrll  * THE POSSIBILITY OF SUCH DAMAGE.
     27      1.1    igy  */
     28      1.1    igy 
     29      1.1    igy #ifndef _LOCORE
     30      1.1    igy #include <sys/types.h>
     31  1.2.2.1  skrll 
     32  1.2.2.1  skrll #include <netinet/in.h>
     33  1.2.2.1  skrll #include <netinet/in_systm.h>
     34  1.2.2.1  skrll 
     35  1.2.2.1  skrll #include <lib/libsa/net.h>
     36  1.2.2.1  skrll #include <lib/libsa/netif.h>
     37  1.2.2.1  skrll 
     38      1.1    igy #include <mips/cpuregs.h>
     39      1.1    igy 
     40      1.1    igy #include <dev/ic/comreg.h>
     41      1.1    igy #include <dev/ic/ns16550reg.h>
     42      1.1    igy #include <dev/ic/st16650reg.h>
     43      1.1    igy #define com_lcr com_cfcr
     44      1.1    igy 
     45      1.1    igy struct bootmenu_command {
     46      1.1    igy 	const char	*c_name;
     47      1.1    igy 	void (*c_fn)(char*);
     48      1.1    igy };
     49      1.1    igy 
     50  1.2.2.1  skrll #define BOOTOPT_MAGIC	0x4c43424fU	/* LCBO */
     51  1.2.2.1  skrll #define B_F_USE_BOOTP	0x00000001
     52  1.2.2.1  skrll 
     53  1.2.2.1  skrll struct boot_option {
     54  1.2.2.1  skrll 	u_int32_t	b_magic;
     55  1.2.2.1  skrll 	u_int32_t	b_flags;
     56  1.2.2.1  skrll 	struct in_addr	b_remote_ip;
     57  1.2.2.1  skrll 	struct in_addr	b_local_ip;
     58  1.2.2.1  skrll 	struct in_addr	b_gate_ip;
     59  1.2.2.1  skrll 	u_long		b_netmask;
     60  1.2.2.1  skrll 	char		b_pathname[FNAME_SIZE];
     61  1.2.2.1  skrll };
     62  1.2.2.1  skrll 
     63      1.1    igy #define ROMCS0_BASE	0xbe000000U
     64      1.1    igy #define ROMCS3_BASE	0xbf800000U
     65      1.1    igy #define FLASH_BASE	ROMCS0_BASE
     66  1.2.2.1  skrll #define BOOTOPTS_BASE	0xbfd20000U
     67  1.2.2.1  skrll 
     68  1.2.2.1  skrll /* ElapsedTime registers */
     69  1.2.2.1  skrll #define VRETIMEL	0x0b0000c0
     70  1.2.2.1  skrll #define VRETIMEM	0x0b0000c2
     71  1.2.2.1  skrll #define VRETIMEH	0x0b0000c4
     72      1.1    igy 
     73      1.1    igy #ifdef ROMICE
     74      1.1    igy #define KERN_ROMBASE	0x80800000U
     75      1.1    igy #else
     76      1.1    igy #define KERN_ROMBASE	0xbf800000U
     77      1.1    igy #endif
     78      1.1    igy 
     79      1.1    igy #define __REG_1(reg)	*((volatile u_int8_t*) (reg))
     80      1.1    igy #define __REG_2(reg)	*((volatile u_int16_t*) (reg))
     81      1.1    igy #define __REG_4(reg)	*((volatile u_int32_t*) (reg))
     82      1.1    igy 
     83      1.1    igy #define ISSET(t, f)	((t) & (f))
     84      1.1    igy 
     85      1.1    igy #define REGWRITE_1(base, off, val)	\
     86      1.1    igy 		(__REG_1(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
     87      1.1    igy 		 = (val))
     88      1.1    igy #define REGWRITE_2(base, off, val)	\
     89      1.1    igy 		(__REG_2(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
     90      1.1    igy 		 = (val))
     91      1.1    igy #define REGWRITE_4(base, off, val)	\
     92      1.1    igy 		(__REG_4(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
     93      1.1    igy 		 = (val))
     94      1.1    igy 
     95      1.1    igy #define REGREAD_1(base, off)	\
     96      1.1    igy 		(__REG_1(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
     97      1.1    igy #define REGREAD_2(base, off)	\
     98      1.1    igy 		(__REG_2(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
     99      1.1    igy #define REGREAD_4(base, off)	\
    100      1.1    igy 		(__REG_4(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
    101      1.1    igy 
    102      1.1    igy #define ISKEY	ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_RXRDY)
    103      1.1    igy 
    104      1.1    igy #define bus_space_write_1(iot, ioh, off, val)	REGWRITE_1((ioh), (off), (val))
    105      1.1    igy #define bus_space_write_2(iot, ioh, off, val)	REGWRITE_2((ioh), (off), (val))
    106      1.1    igy #define bus_space_write_4(iot, ioh, off, val)	REGWRITE_4((ioh), (off), (val))
    107      1.1    igy #define bus_space_read_1(iot, ioh, off)	REGREAD_1((ioh), (off))
    108      1.1    igy #define bus_space_read_2(iot, ioh, off)	REGREAD_2((ioh), (off))
    109      1.1    igy #define bus_space_read_4(iot, ioh, off)	REGREAD_4((ioh), (off))
    110      1.1    igy typedef void		*bus_space_tag_t;
    111      1.1    igy typedef u_int32_t	bus_space_handle_t;
    112      1.1    igy typedef size_t		bus_size_t;
    113      1.1    igy 
    114  1.2.2.1  skrll extern struct netif_driver	cs_driver;
    115  1.2.2.1  skrll extern struct boot_option	bootopts;
    116  1.2.2.1  skrll 
    117      1.1    igy void comcninit(void);
    118      1.1    igy int iskey(void);
    119      1.1    igy void start_netbsd(void);
    120      1.1    igy int i28f128_probe(void *base);
    121      1.1    igy int i28f128_region_write(void *dst, const void *src, size_t len);
    122      1.2    igy 
    123      1.2    igy /* dev_flash */
    124      1.2    igy int flash_strategy(void *, int, daddr_t, size_t, void *, size_t *);
    125      1.2    igy int flash_open(struct open_file *, ...);
    126      1.2    igy int flash_close(struct open_file *);
    127      1.2    igy int flash_ioctl(struct open_file *, u_long, void *);
    128      1.1    igy 
    129  1.2.2.1  skrll /* dev_net */
    130  1.2.2.1  skrll int net_strategy(void *, int, daddr_t, size_t, void *, size_t *);
    131  1.2.2.1  skrll int net_open(struct open_file *, ...);
    132  1.2.2.1  skrll int net_close(struct open_file *);
    133  1.2.2.1  skrll int net_ioctl(struct open_file *, u_long, void *);
    134  1.2.2.1  skrll 
    135      1.1    igy #endif /* !_LOCORE */
    136      1.1    igy 
    137      1.1    igy #define	LCBOOT_STARTADDR	0x80001000
    138      1.1    igy #define	LCBOOT_ROMSTARTADDR	0xbfd01000
    139      1.1    igy #define	NETBSD_STARTADDR	0x80040000
    140