extern.h revision 1.5 1 1.5 tsutsui /* $NetBSD: extern.h,v 1.5 2022/09/05 14:14:42 tsutsui Exp $ */
2 1.1 igy
3 1.1 igy /*
4 1.3 igy * Copyright (c) 2003 Naoto Shimazaki.
5 1.1 igy * All rights reserved.
6 1.1 igy *
7 1.1 igy * Redistribution and use in source and binary forms, with or without
8 1.1 igy * modification, are permitted provided that the following conditions
9 1.1 igy * are met:
10 1.1 igy * 1. Redistributions of source code must retain the above copyright
11 1.1 igy * notice, this list of conditions and the following disclaimer.
12 1.1 igy * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 igy * notice, this list of conditions and the following disclaimer in the
14 1.1 igy * documentation and/or other materials provided with the distribution.
15 1.1 igy *
16 1.3 igy * THIS SOFTWARE IS PROVIDED BY NAOTO SHIMAZAKI AND CONTRIBUTORS ``AS IS''
17 1.3 igy * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 1.3 igy * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.3 igy * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE NAOTO OR CONTRIBUTORS BE
20 1.3 igy * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 igy * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 igy * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 igy * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 igy * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.3 igy * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 1.3 igy * THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 igy */
28 1.1 igy
29 1.1 igy #ifndef _LOCORE
30 1.1 igy #include <sys/types.h>
31 1.3 igy
32 1.3 igy #include <netinet/in.h>
33 1.3 igy #include <netinet/in_systm.h>
34 1.3 igy
35 1.3 igy #include <lib/libsa/net.h>
36 1.3 igy #include <lib/libsa/netif.h>
37 1.3 igy
38 1.1 igy #include <mips/cpuregs.h>
39 1.1 igy
40 1.1 igy #include <dev/ic/comreg.h>
41 1.1 igy #include <dev/ic/ns16550reg.h>
42 1.1 igy #include <dev/ic/st16650reg.h>
43 1.1 igy #define com_lcr com_cfcr
44 1.1 igy
45 1.1 igy struct bootmenu_command {
46 1.1 igy const char *c_name;
47 1.1 igy void (*c_fn)(char*);
48 1.1 igy };
49 1.1 igy
50 1.3 igy #define BOOTOPT_MAGIC 0x4c43424fU /* LCBO */
51 1.3 igy #define B_F_USE_BOOTP 0x00000001
52 1.3 igy
53 1.3 igy struct boot_option {
54 1.3 igy u_int32_t b_magic;
55 1.3 igy u_int32_t b_flags;
56 1.3 igy struct in_addr b_remote_ip;
57 1.3 igy struct in_addr b_local_ip;
58 1.3 igy struct in_addr b_gate_ip;
59 1.3 igy u_long b_netmask;
60 1.3 igy char b_pathname[FNAME_SIZE];
61 1.3 igy };
62 1.3 igy
63 1.1 igy #define ROMCS0_BASE 0xbe000000U
64 1.1 igy #define ROMCS3_BASE 0xbf800000U
65 1.1 igy #define FLASH_BASE ROMCS0_BASE
66 1.3 igy #define BOOTOPTS_BASE 0xbfd20000U
67 1.3 igy
68 1.3 igy /* ElapsedTime registers */
69 1.3 igy #define VRETIMEL 0x0b0000c0
70 1.3 igy #define VRETIMEM 0x0b0000c2
71 1.3 igy #define VRETIMEH 0x0b0000c4
72 1.1 igy
73 1.1 igy #ifdef ROMICE
74 1.1 igy #define KERN_ROMBASE 0x80800000U
75 1.1 igy #else
76 1.1 igy #define KERN_ROMBASE 0xbf800000U
77 1.1 igy #endif
78 1.1 igy
79 1.1 igy #define __REG_1(reg) *((volatile u_int8_t*) (reg))
80 1.1 igy #define __REG_2(reg) *((volatile u_int16_t*) (reg))
81 1.1 igy #define __REG_4(reg) *((volatile u_int32_t*) (reg))
82 1.1 igy
83 1.1 igy #define REGWRITE_1(base, off, val) \
84 1.1 igy (__REG_1(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
85 1.1 igy = (val))
86 1.1 igy #define REGWRITE_2(base, off, val) \
87 1.1 igy (__REG_2(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
88 1.1 igy = (val))
89 1.1 igy #define REGWRITE_4(base, off, val) \
90 1.1 igy (__REG_4(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))) \
91 1.1 igy = (val))
92 1.1 igy
93 1.1 igy #define REGREAD_1(base, off) \
94 1.1 igy (__REG_1(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
95 1.1 igy #define REGREAD_2(base, off) \
96 1.1 igy (__REG_2(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
97 1.1 igy #define REGREAD_4(base, off) \
98 1.1 igy (__REG_4(MIPS_PHYS_TO_KSEG1((u_int32_t) (base) + (off))))
99 1.1 igy
100 1.1 igy #define ISKEY ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_RXRDY)
101 1.1 igy
102 1.1 igy #define bus_space_write_1(iot, ioh, off, val) REGWRITE_1((ioh), (off), (val))
103 1.1 igy #define bus_space_write_2(iot, ioh, off, val) REGWRITE_2((ioh), (off), (val))
104 1.1 igy #define bus_space_write_4(iot, ioh, off, val) REGWRITE_4((ioh), (off), (val))
105 1.1 igy #define bus_space_read_1(iot, ioh, off) REGREAD_1((ioh), (off))
106 1.1 igy #define bus_space_read_2(iot, ioh, off) REGREAD_2((ioh), (off))
107 1.1 igy #define bus_space_read_4(iot, ioh, off) REGREAD_4((ioh), (off))
108 1.1 igy typedef void *bus_space_tag_t;
109 1.1 igy typedef u_int32_t bus_space_handle_t;
110 1.1 igy typedef size_t bus_size_t;
111 1.1 igy
112 1.3 igy extern struct netif_driver cs_driver;
113 1.3 igy extern struct boot_option bootopts;
114 1.3 igy
115 1.1 igy void comcninit(void);
116 1.1 igy int iskey(void);
117 1.1 igy void start_netbsd(void);
118 1.1 igy int i28f128_probe(void *base);
119 1.1 igy int i28f128_region_write(void *dst, const void *src, size_t len);
120 1.2 igy
121 1.2 igy /* dev_flash */
122 1.2 igy int flash_strategy(void *, int, daddr_t, size_t, void *, size_t *);
123 1.2 igy int flash_open(struct open_file *, ...);
124 1.2 igy int flash_close(struct open_file *);
125 1.2 igy int flash_ioctl(struct open_file *, u_long, void *);
126 1.3 igy
127 1.3 igy /* dev_net */
128 1.3 igy int net_strategy(void *, int, daddr_t, size_t, void *, size_t *);
129 1.3 igy int net_open(struct open_file *, ...);
130 1.3 igy int net_close(struct open_file *);
131 1.3 igy int net_ioctl(struct open_file *, u_long, void *);
132 1.1 igy
133 1.1 igy #endif /* !_LOCORE */
134 1.1 igy
135 1.1 igy #define LCBOOT_STARTADDR 0x80001000
136 1.1 igy #define LCBOOT_ROMSTARTADDR 0xbfd01000
137 1.1 igy #define NETBSD_STARTADDR 0x80040000
138