i28f128reg.h revision 1.4 1 1.4 christos /* $NetBSD: i28f128reg.h,v 1.4 2005/12/11 12:17:34 christos Exp $ */
2 1.1 igy
3 1.1 igy /*
4 1.3 igy * Copyright (c) 2003 Naoto Shimazaki.
5 1.1 igy * All rights reserved.
6 1.1 igy *
7 1.1 igy * Redistribution and use in source and binary forms, with or without
8 1.1 igy * modification, are permitted provided that the following conditions
9 1.1 igy * are met:
10 1.1 igy * 1. Redistributions of source code must retain the above copyright
11 1.1 igy * notice, this list of conditions and the following disclaimer.
12 1.1 igy * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 igy * notice, this list of conditions and the following disclaimer in the
14 1.1 igy * documentation and/or other materials provided with the distribution.
15 1.1 igy *
16 1.3 igy * THIS SOFTWARE IS PROVIDED BY NAOTO SHIMAZAKI AND CONTRIBUTORS ``AS IS''
17 1.3 igy * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 1.3 igy * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.3 igy * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE NAOTO OR CONTRIBUTORS BE
20 1.3 igy * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 igy * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 igy * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 igy * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 igy * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.3 igy * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 1.3 igy * THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 igy */
28 1.1 igy
29 1.1 igy /*
30 1.1 igy * Flash Memory Writer
31 1.1 igy */
32 1.1 igy
33 1.1 igy #define I28F128_BLOCK_SIZE 0x20000 /* 128Kbyte */
34 1.1 igy #define I28F128_BLOCK_MASK 0x1ffff /* 128Kbyte */
35 1.1 igy
36 1.2 igy #define I28F128_WBUF_SIZE 0x20
37 1.2 igy
38 1.1 igy #define I28F128_MANUFACT 0x89
39 1.1 igy #define I28F128_DEVCODE 0x18
40 1.1 igy #define I28F128_PRIM_COMM0 0x01
41 1.1 igy #define I28F128_PRIM_COMM1 0x00
42 1.1 igy #define I28F128_PRIM_EXT_TBL0 0x31
43 1.1 igy #define I28F128_PRIM_EXT_TBL1 0x00
44 1.1 igy
45 1.1 igy #define I28F128_RESET 0xff
46 1.1 igy #define I28F128_READ_ARRAY I28F128_RESET
47 1.1 igy #define I28F128_READ_ID 0x90
48 1.1 igy #define I28F128_READ_STATUS 0x70
49 1.1 igy #define I28F128_CLEAR_STATUS 0x50
50 1.1 igy
51 1.1 igy #define I28F128_BLK_ERASE_1ST 0x20
52 1.1 igy #define I28F128_BLK_ERASE_2ND 0xd0
53 1.1 igy #define I28F128_WORDBYTE_PROG 0x40
54 1.2 igy #define I28F128_WRITE_BUFFER 0xe8
55 1.2 igy #define I28F128_WBUF_CONFIRM 0xd0
56 1.1 igy
57 1.1 igy #define I28F128_S_READY 0x80
58 1.1 igy #define I28F128_S_ERASE_SUSPEND 0x40
59 1.1 igy #define I28F128_S_ERASE_ERROR 0x20
60 1.1 igy #define I28F128_S_PROG_ERROR 0x10
61 1.1 igy #define I28F128_S_LOW_VOLTAGE 0x08
62 1.1 igy #define I28F128_S_PROG_SUSPEND 0x04
63 1.1 igy #define I28F128_S_BLOCK_LOCKED 0x02
64 1.2 igy
65 1.2 igy #define I28F128_XS_BUF_AVAIL 0x80
66