Home | History | Annotate | Line # | Download | only in pbsdboot
tx39xx.c revision 1.1.4.1
      1      1.1  takemura /* $NetBSD: */
      2      1.1  takemura 
      3      1.1  takemura /*-
      4      1.1  takemura  * Copyright (c) 1999 Shin Takemura, UCHIYAMA Yasushi
      5      1.1  takemura  * All rights reserved.
      6      1.1  takemura  *
      7      1.1  takemura  * This software is part of the PocketBSD.
      8      1.1  takemura  *
      9      1.1  takemura  * Redistribution and use in source and binary forms, with or without
     10      1.1  takemura  * modification, are permitted provided that the following conditions
     11      1.1  takemura  * are met:
     12      1.1  takemura  * 1. Redistributions of source code must retain the above copyright
     13      1.1  takemura  *    notice, this list of conditions and the following disclaimer.
     14      1.1  takemura  * 2. Redistributions in binary form must reproduce the above copyright
     15      1.1  takemura  *    notice, this list of conditions and the following disclaimer in the
     16      1.1  takemura  *    documentation and/or other materials provided with the distribution.
     17      1.1  takemura  * 3. All advertising materials mentioning features or use of this software
     18      1.1  takemura  *    must display the following acknowledgement:
     19      1.1  takemura  *	This product includes software developed by the PocketBSD project
     20      1.1  takemura  *	and its contributors.
     21      1.1  takemura  * 4. Neither the name of the project nor the names of its contributors
     22      1.1  takemura  *    may be used to endorse or promote products derived from this software
     23      1.1  takemura  *    without specific prior written permission.
     24      1.1  takemura  *
     25      1.1  takemura  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     26      1.1  takemura  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     27      1.1  takemura  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     28      1.1  takemura  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     29      1.1  takemura  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     30      1.1  takemura  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     31      1.1  takemura  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     32      1.1  takemura  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     33      1.1  takemura  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     34      1.1  takemura  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     35      1.1  takemura  * SUCH DAMAGE.
     36      1.1  takemura  *
     37      1.1  takemura  */
     38      1.1  takemura 
     39      1.1  takemura #include <pbsdboot.h>
     40      1.1  takemura 
     41      1.1  takemura extern void tx39xx_asm_code();
     42      1.1  takemura extern void tx39xx_asm_code_end();
     43      1.1  takemura void tx39xx_asm_code_holder __P((void));
     44      1.1  takemura 
     45  1.1.4.1      fvdl #define TX39_SYSADDR_CONFIG_REG		0x10C00000
     46  1.1.4.1      fvdl #define TX39_SYSADDR_CONFIG_REG_LEN	0x00200000
     47  1.1.4.1      fvdl typedef int tx_chipset_tag_t;
     48  1.1.4.1      fvdl u_int32_t __tx39conf_addr;
     49  1.1.4.1      fvdl 
     50  1.1.4.1      fvdl u_int32_t
     51  1.1.4.1      fvdl tx_conf_read(t, reg)
     52  1.1.4.1      fvdl 	tx_chipset_tag_t t;
     53  1.1.4.1      fvdl 	int reg;
     54  1.1.4.1      fvdl {
     55  1.1.4.1      fvdl 	return *((u_int32_t*)(__tx39conf_addr + reg));
     56  1.1.4.1      fvdl }
     57  1.1.4.1      fvdl 
     58  1.1.4.1      fvdl void
     59  1.1.4.1      fvdl tx_conf_write(t, reg, val)
     60  1.1.4.1      fvdl 	tx_chipset_tag_t t;
     61  1.1.4.1      fvdl 	int reg;
     62  1.1.4.1      fvdl 	u_int32_t val;
     63  1.1.4.1      fvdl {
     64  1.1.4.1      fvdl 	u_int32_t addr = (u_int32_t)t;
     65  1.1.4.1      fvdl 	*((u_int32_t*)(__tx39conf_addr +reg)) = val;
     66  1.1.4.1      fvdl }
     67  1.1.4.1      fvdl 
     68      1.1  takemura void
     69      1.1  takemura tx39xx_init(SYSTEM_INFO *info)
     70      1.1  takemura {
     71      1.1  takemura 	/* 4KByte page */
     72      1.1  takemura 	system_info.si_pagesize = info->dwPageSize;
     73      1.1  takemura 	/* DRAM Bank 0/1 physical addr range */
     74      1.1  takemura 	system_info.si_dramstart = 0x04000000;
     75      1.1  takemura 	system_info.si_drammaxsize = 0x04000000;
     76      1.1  takemura 	/* Pointer for bootstrap code */
     77      1.1  takemura 	system_info.si_asmcode = (unsigned char*)tx39xx_asm_code;
     78      1.1  takemura 	system_info.si_asmcodelen = (unsigned char*)tx39xx_asm_code_end
     79      1.1  takemura 		- system_info.si_asmcode;
     80      1.1  takemura 	system_info.si_boot = mips_boot;
     81  1.1.4.1      fvdl 	system_info.si_intrvec = 0x80;
     82  1.1.4.1      fvdl 
     83  1.1.4.1      fvdl 	__tx39conf_addr = (int)VirtualAlloc(0, TX39_SYSADDR_CONFIG_REG_LEN, MEM_RESERVE,
     84  1.1.4.1      fvdl 			    PAGE_NOACCESS);
     85  1.1.4.1      fvdl 	if (!VirtualCopy((LPVOID)__tx39conf_addr,
     86  1.1.4.1      fvdl 			 (LPVOID)(TX39_SYSADDR_CONFIG_REG >> 8),
     87  1.1.4.1      fvdl 			 TX39_SYSADDR_CONFIG_REG_LEN,
     88  1.1.4.1      fvdl 			 PAGE_READWRITE|PAGE_NOCACHE|PAGE_PHYSICAL)) {
     89  1.1.4.1      fvdl 		msg_printf(MSG_ERROR, whoami,
     90  1.1.4.1      fvdl 			   TEXT("Mapping TX39 configuration register failed.\n"));
     91  1.1.4.1      fvdl 	}
     92      1.1  takemura }
     93      1.1  takemura 
     94      1.1  takemura void
     95      1.1  takemura tx39xx_asm_code_holder()
     96      1.1  takemura {
     97  1.1.4.1      fvdl 	/*
     98  1.1.4.1      fvdl 	 * void
     99  1.1.4.1      fvdl 	 * startprog(register struct map_s *map)
    100  1.1.4.1      fvdl 	 * {
    101  1.1.4.1      fvdl 	 *   register unsigned char *addr;
    102  1.1.4.1      fvdl 	 *   register unsigned char *p;
    103  1.1.4.1      fvdl 	 *   register int i;
    104  1.1.4.1      fvdl 	 *
    105  1.1.4.1      fvdl 	 *   addr = map->base;
    106  1.1.4.1      fvdl 	 *   i = 0;
    107  1.1.4.1      fvdl 	 *   while (p = map->leaf[i / map->leafsize][i % map->leafsize]) {
    108  1.1.4.1      fvdl 	 *     register unsigned char *pe = p + map->pagesize;
    109  1.1.4.1      fvdl 	 *     while (p < pe) {
    110  1.1.4.1      fvdl 	 *       *addr++ = *p++;
    111  1.1.4.1      fvdl 	 *     }
    112  1.1.4.1      fvdl 	 *     i++;
    113  1.1.4.1      fvdl 	 *   }
    114  1.1.4.1      fvdl 	 * }
    115  1.1.4.1      fvdl 	 *
    116  1.1.4.1      fvdl 	 *  register assignment:
    117  1.1.4.1      fvdl 	 *    struct map_s *map		a0
    118  1.1.4.1      fvdl 	 *    unsigned char *addr	a1
    119  1.1.4.1      fvdl 	 *    unsigned char *p		a2
    120  1.1.4.1      fvdl 	 *    unsigned char *pe		a3
    121  1.1.4.1      fvdl 	 *    int i			t0
    122  1.1.4.1      fvdl 	 *
    123  1.1.4.1      fvdl 	 * struct map_s {
    124  1.1.4.1      fvdl 	 *   caddr_t entry;	+0
    125  1.1.4.1      fvdl 	 *   caddr_t base;	+4
    126  1.1.4.1      fvdl 	 *   int pagesize;	+8
    127  1.1.4.1      fvdl 	 *   int leafsize;	+12
    128  1.1.4.1      fvdl 	 *   int nleaves;	+16
    129  1.1.4.1      fvdl 	 *   caddr_t arg0;	+20
    130  1.1.4.1      fvdl 	 *   caddr_t arg1;  +24
    131  1.1.4.1      fvdl 	 *   caddr_t arg2;	+28
    132  1.1.4.1      fvdl 	 *   caddr_t arg3;	+32
    133  1.1.4.1      fvdl 	 *   caddr_t *leaf[32];	+36
    134  1.1.4.1      fvdl 	 *
    135  1.1.4.1      fvdl 	 */
    136      1.1  takemura 	__asm(
    137  1.1.4.1      fvdl 		".set noreorder;"
    138  1.1.4.1      fvdl 		".globl tx39xx_asm_code;"
    139      1.1  takemura 		"tx39xx_asm_code:"
    140  1.1.4.1      fvdl 		"lui	a0, 0x0000;"
    141  1.1.4.1      fvdl 		"ori	a0, 0x0000;"
    142      1.1  takemura 
    143  1.1.4.1      fvdl 		/* Disable interrupt */
    144  1.1.4.1      fvdl 		"nop;"
    145  1.1.4.1      fvdl 		"mtc0	zero, $12;"
    146  1.1.4.1      fvdl 		"nop;"
    147  1.1.4.1      fvdl 		/*
    148  1.1.4.1      fvdl 		 * XXX Disable TX3922 write-back mode. for TX3912, no meaning.
    149  1.1.4.1      fvdl 		 * XXX Should be removed
    150  1.1.4.1      fvdl 		 */
    151  1.1.4.1      fvdl 		"mfc0	t0, $3;"
    152  1.1.4.1      fvdl 		"nop;"
    153  1.1.4.1      fvdl 		"li	t1, 0xffffdfff;"
    154  1.1.4.1      fvdl 		"and	t0, t0, t1;"
    155  1.1.4.1      fvdl 		"mtc0	t0, $3;"
    156  1.1.4.1      fvdl 		"nop;nop;nop;nop;"
    157  1.1.4.1      fvdl 		/*
    158  1.1.4.1      fvdl 		 * Copy kernel to bootaddr
    159  1.1.4.1      fvdl 		 */
    160  1.1.4.1      fvdl 		/* addr = map->base;	*/
    161      1.1  takemura 		"lw	a1, 4(a0);"
    162      1.1  takemura 
    163  1.1.4.1      fvdl 		/*   i = 0;		*/
    164      1.1  takemura 		"ori	t0, zero, 0;"
    165      1.1  takemura 
    166  1.1.4.1      fvdl 	" loop_start:"
    167      1.1  takemura 
    168  1.1.4.1      fvdl 		/*   while (p = map->leaf[i / map->leafsize][i % map->leafsize]) { */
    169  1.1.4.1      fvdl 		/*   t1 = map->leafsize */
    170      1.1  takemura 		"lw	t1, 12(a0);"
    171      1.1  takemura 
    172  1.1.4.1      fvdl 		/*   lo = i / map->leafsize, hi = i % map->leafsize */
    173      1.1  takemura 		"addu	t3, zero, t0;"
    174      1.1  takemura 		"div	t3, t1;"
    175  1.1.4.1      fvdl 		/*   t2 = map->leaf */
    176      1.1  takemura 		"addiu	t2, a0, 36;"
    177  1.1.4.1      fvdl 		/*   t3 = i / map->leafsize */
    178      1.1  takemura 		"nop;"
    179      1.1  takemura 		"mflo	t3;"
    180  1.1.4.1      fvdl 		/*   t2 = map->leaf[i / map->leafsize] */
    181      1.1  takemura 		"sll	t3, t3, 2;"
    182      1.1  takemura 		"addu	t2, t2, t3;"
    183      1.1  takemura 		"lw	t2, 0(t2);"
    184  1.1.4.1      fvdl 		/*   t3 = i % map->leafsize */
    185      1.1  takemura 		"mfhi	t3;"
    186      1.1  takemura 
    187  1.1.4.1      fvdl 		/*   p = map->leaf[i / map->leafsize][i % map->leafsize] */
    188      1.1  takemura 		"sll	t3, t3, 2;"
    189      1.1  takemura 		"addu	t2, t2, t3;"
    190      1.1  takemura 		"lw	a2, 0(t2);"
    191      1.1  takemura 
    192  1.1.4.1      fvdl 		/*		if (p == NULL) {	*/
    193  1.1.4.1      fvdl 		/*			break;			*/
    194  1.1.4.1      fvdl 		/*		}					*/
    195      1.1  takemura 		"beq	a2, zero, loop_end;"
    196      1.1  takemura 		"nop;"
    197      1.1  takemura 
    198  1.1.4.1      fvdl 		/*     register unsigned char *pe = p + map->pagesize; */
    199      1.1  takemura 		"lw	t1, 8(a0);"
    200      1.1  takemura 		"add	a3, a2, t1;"
    201      1.1  takemura 
    202  1.1.4.1      fvdl 		/*		while (p < pe) {		*/
    203  1.1.4.1      fvdl 	"loop_start2:"
    204      1.1  takemura 		"sltu        t1, a2, a3;"
    205      1.1  takemura 		"beq         zero,t1,loop_end2;"
    206      1.1  takemura 		"nop;"
    207      1.1  takemura 
    208  1.1.4.1      fvdl 		/*			*addr++ = *p++;	*/
    209      1.1  takemura 		"lw	t1, 0(a2);"
    210      1.1  takemura 		"sw	t1, 0(a1);"
    211      1.1  takemura 		"addi	a2, a2, 4;"
    212      1.1  takemura 		"addi	a1, a1, 4;"
    213      1.1  takemura 
    214  1.1.4.1      fvdl 		/*		}	*/
    215      1.1  takemura 		"beq	zero, zero, loop_start2;"
    216      1.1  takemura 		"nop;"
    217      1.1  takemura 
    218  1.1.4.1      fvdl 		/*     i++;	*/
    219  1.1.4.1      fvdl 	"loop_end2:"
    220      1.1  takemura 		"addi	t0, t0, 1;"
    221      1.1  takemura 		"beq	zero, zero, loop_start;"
    222      1.1  takemura 		"nop;"
    223      1.1  takemura 
    224  1.1.4.1      fvdl 	"loop_end:"
    225  1.1.4.1      fvdl 		"move t3, a0;"
    226  1.1.4.1      fvdl 	);
    227      1.1  takemura 
    228      1.1  takemura 	/*
    229  1.1.4.1      fvdl 	 * Flush cache
    230      1.1  takemura 	 */
    231  1.1.4.1      fvdl 	__asm(
    232  1.1.4.1      fvdl 		"li	t1, 16384;"
    233  1.1.4.1      fvdl 		"li	t2, 8192;"
    234  1.1.4.1      fvdl 
    235  1.1.4.1      fvdl 		/* Disable I-cache */
    236  1.1.4.1      fvdl 		"li	t5, ~0x00000020;"
    237  1.1.4.1      fvdl 		"mfc0	t6, $3;"
    238  1.1.4.1      fvdl 		"and	t5, t5, t6;"
    239  1.1.4.1      fvdl 		"nop;"
    240  1.1.4.1      fvdl 		"mtc0	t5, $3;"
    241  1.1.4.1      fvdl 		/* Stop streaming */
    242  1.1.4.1      fvdl 		"beq	zero, zero, 1f;"
    243  1.1.4.1      fvdl 		"nop;"
    244  1.1.4.1      fvdl 	"1:"
    245  1.1.4.1      fvdl 		/* Flush I-cache */
    246  1.1.4.1      fvdl 		"li	t0, 0x80000000;"
    247  1.1.4.1      fvdl 		"addu	t1, t0, t1;"
    248  1.1.4.1      fvdl 		"subu	t1, t1, 128;"
    249  1.1.4.1      fvdl 	"2:"
    250  1.1.4.1      fvdl 		".word 0xbd000000;"
    251  1.1.4.1      fvdl 		".word 0xbd000010;"
    252  1.1.4.1      fvdl 		".word 0xbd000020;"
    253  1.1.4.1      fvdl 		".word 0xbd000030;"
    254  1.1.4.1      fvdl 		".word 0xbd000040;"
    255  1.1.4.1      fvdl 		".word 0xbd000050;"
    256  1.1.4.1      fvdl 		".word 0xbd000060;"
    257  1.1.4.1      fvdl 		".word 0xbd000070;"
    258  1.1.4.1      fvdl 		"bne	t0, t1, 2b;"
    259  1.1.4.1      fvdl 		"addu	t0, t0, 128;"
    260  1.1.4.1      fvdl 
    261  1.1.4.1      fvdl 		/* Flush D-cache */
    262  1.1.4.1      fvdl 		"li	t0, 0x80000000;"
    263  1.1.4.1      fvdl 		"addu	t1, t0, t2;"
    264  1.1.4.1      fvdl 
    265  1.1.4.1      fvdl 	"3:"
    266  1.1.4.1      fvdl 		"lw	t2, 0(t0);"
    267  1.1.4.1      fvdl 		"bne	t1, t0, 3b;"
    268  1.1.4.1      fvdl 		"addiu	t0, t0, 4;"
    269  1.1.4.1      fvdl 
    270  1.1.4.1      fvdl 		/* Enable I-cache */
    271  1.1.4.1      fvdl 		"nop;"
    272  1.1.4.1      fvdl 		"mtc0	t6, $3;"
    273  1.1.4.1      fvdl 		"nop;"
    274  1.1.4.1      fvdl 	);
    275  1.1.4.1      fvdl 	/*
    276  1.1.4.1      fvdl 	 *  Jump to kernel entry
    277  1.1.4.1      fvdl 	 */
    278  1.1.4.1      fvdl 	__asm(
    279  1.1.4.1      fvdl 
    280  1.1.4.1      fvdl 		"lw	t0, 0(t3);"	/* entry addr */
    281  1.1.4.1      fvdl 		"lw	a1, 24(t3);"	/* arg1 */
    282  1.1.4.1      fvdl 		"lw	a2, 28(t3);"	/* arg2 */
    283  1.1.4.1      fvdl 		"lw	a3, 32(t3);"	/* arg3 */
    284  1.1.4.1      fvdl 		"lw	a0, 20(t3);"	/* arg0 */
    285      1.1  takemura 		"jr	t0;"
    286      1.1  takemura 		"nop;"
    287      1.1  takemura 
    288      1.1  takemura 		".globl tx39xx_asm_code_end;"
    289      1.1  takemura 		"tx39xx_asm_code_end: nop;"
    290      1.1  takemura 		".set reorder;	"
    291      1.1  takemura 	);
    292      1.1  takemura }
    293