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tx39xx.c revision 1.5 
      1 /* $NetBSD: tx39xx.c,v 1.5 2000/01/16 23:30:13 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999 Shin Takemura, UCHIYAMA Yasushi
      5  * All rights reserved.
      6  *
      7  * This software is part of the PocketBSD.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed by the PocketBSD project
     20  *	and its contributors.
     21  * 4. Neither the name of the project nor the names of its contributors
     22  *    may be used to endorse or promote products derived from this software
     23  *    without specific prior written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     35  * SUCH DAMAGE.
     36  *
     37  */
     38 
     39 #include <pbsdboot.h>
     40 
     41 extern void tx39xx_asm_code();
     42 extern void tx39xx_asm_code_end();
     43 void tx39xx_asm_code_holder __P((void));
     44 
     45 #define TX39_SYSADDR_CONFIG_REG		0x10C00000
     46 #define TX39_SYSADDR_CONFIG_REG_LEN	0x00200000
     47 typedef int tx_chipset_tag_t;
     48 u_int32_t __tx39conf_addr;
     49 
     50 u_int32_t
     51 tx_conf_read(t, reg)
     52 	tx_chipset_tag_t t;
     53 	int reg;
     54 {
     55 	return *((u_int32_t*)(__tx39conf_addr + reg));
     56 }
     57 
     58 void
     59 tx_conf_write(t, reg, val)
     60 	tx_chipset_tag_t t;
     61 	int reg;
     62 	u_int32_t val;
     63 {
     64 	u_int32_t addr = (u_int32_t)t;
     65 	*((u_int32_t*)(__tx39conf_addr +reg)) = val;
     66 }
     67 
     68 void
     69 tx39xx_init(SYSTEM_INFO *info)
     70 {
     71 	/* 4KByte page */
     72 	system_info.si_pagesize = info->dwPageSize;
     73 	/* DRAM Bank 0/1 physical addr range */
     74 	system_info.si_dramstart = 0x04000000;
     75 	system_info.si_drammaxsize = 0x04000000;
     76 	/* Pointer for bootstrap code */
     77 	system_info.si_asmcode = (unsigned char*)tx39xx_asm_code;
     78 	system_info.si_asmcodelen = (unsigned char*)tx39xx_asm_code_end
     79 		- system_info.si_asmcode;
     80 	system_info.si_boot = mips_boot;
     81 	system_info.si_intrvec = 0x80;
     82 
     83 	__tx39conf_addr = (int)VirtualAlloc(0, TX39_SYSADDR_CONFIG_REG_LEN, MEM_RESERVE,
     84 			    PAGE_NOACCESS);
     85 	if (!VirtualCopy((LPVOID)__tx39conf_addr,
     86 			 (LPVOID)(TX39_SYSADDR_CONFIG_REG >> 8),
     87 			 TX39_SYSADDR_CONFIG_REG_LEN,
     88 			 PAGE_READWRITE|PAGE_NOCACHE|PAGE_PHYSICAL)) {
     89 		msg_printf(MSG_ERROR, whoami,
     90 			   TEXT("Mapping TX39 configuration register failed.\n"));
     91 	}
     92 }
     93 
     94 void
     95 tx39xx_asm_code_holder()
     96 {
     97 	/*
     98 	 * void
     99 	 * startprog(register struct map_s *map)
    100 	 * {
    101 	 *   register unsigned char *addr;
    102 	 *   register unsigned char *p;
    103 	 *   register int i;
    104 	 *
    105 	 *   addr = map->base;
    106 	 *   i = 0;
    107 	 *   while (p = map->leaf[i / map->leafsize][i % map->leafsize]) {
    108 	 *     register unsigned char *pe = p + map->pagesize;
    109 	 *     while (p < pe) {
    110 	 *       *addr++ = *p++;
    111 	 *     }
    112 	 *     i++;
    113 	 *   }
    114 	 * }
    115 	 *
    116 	 *  register assignment:
    117 	 *    struct map_s *map		a0
    118 	 *    unsigned char *addr	a1
    119 	 *    unsigned char *p		a2
    120 	 *    unsigned char *pe		a3
    121 	 *    int i			t0
    122 	 *
    123 	 * struct map_s {
    124 	 *   caddr_t entry;	+0
    125 	 *   caddr_t base;	+4
    126 	 *   int pagesize;	+8
    127 	 *   int leafsize;	+12
    128 	 *   int nleaves;	+16
    129 	 *   caddr_t arg0;	+20
    130 	 *   caddr_t arg1;  +24
    131 	 *   caddr_t arg2;	+28
    132 	 *   caddr_t arg3;	+32
    133 	 *   caddr_t *leaf[32];	+36
    134 	 *
    135 	 */
    136 	__asm(
    137 		".set noreorder;"
    138 		".globl tx39xx_asm_code;"
    139 		"tx39xx_asm_code:"
    140 		"lui	a0, 0x0000;"
    141 		"ori	a0, 0x0000;"
    142 
    143 		/* Disable interrupt */
    144 		"nop;"
    145 		"mtc0	zero, $12;"
    146 		"nop;"
    147 
    148 		/*
    149 		 * Copy kernel to bootaddr
    150 		 */
    151 		/* addr = map->base;	*/
    152 		"lw	a1, 4(a0);"
    153 
    154 		/*   i = 0;		*/
    155 		"ori	t0, zero, 0;"
    156 
    157 	" loop_start:"
    158 
    159 		/*   while (p = map->leaf[i / map->leafsize][i % map->leafsize]) { */
    160 		/*   t1 = map->leafsize */
    161 		"lw	t1, 12(a0);"
    162 
    163 		/*   lo = i / map->leafsize, hi = i % map->leafsize */
    164 		"addu	t3, zero, t0;"
    165 		"div	t3, t1;"
    166 		/*   t2 = map->leaf */
    167 		"addiu	t2, a0, 36;"
    168 		/*   t3 = i / map->leafsize */
    169 		"nop;"
    170 		"mflo	t3;"
    171 		/*   t2 = map->leaf[i / map->leafsize] */
    172 		"sll	t3, t3, 2;"
    173 		"addu	t2, t2, t3;"
    174 		"lw	t2, 0(t2);"
    175 		/*   t3 = i % map->leafsize */
    176 		"mfhi	t3;"
    177 
    178 		/*   p = map->leaf[i / map->leafsize][i % map->leafsize] */
    179 		"sll	t3, t3, 2;"
    180 		"addu	t2, t2, t3;"
    181 		"lw	a2, 0(t2);"
    182 
    183 		/*		if (p == NULL) {	*/
    184 		/*			break;			*/
    185 		/*		}					*/
    186 		"beq	a2, zero, loop_end;"
    187 		"nop;"
    188 
    189 		/*     register unsigned char *pe = p + map->pagesize; */
    190 		"lw	t1, 8(a0);"
    191 		"add	a3, a2, t1;"
    192 
    193 		/*		while (p < pe) {		*/
    194 	"loop_start2:"
    195 		"sltu        t1, a2, a3;"
    196 		"beq         zero,t1,loop_end2;"
    197 		"nop;"
    198 
    199 		/*			*addr++ = *p++;	*/
    200 		"lw	t1, 0(a2);"
    201 		"sw	t1, 0(a1);"
    202 		"addi	a2, a2, 4;"
    203 		"addi	a1, a1, 4;"
    204 
    205 		/*		}	*/
    206 		"beq	zero, zero, loop_start2;"
    207 		"nop;"
    208 
    209 		/*     i++;	*/
    210 	"loop_end2:"
    211 		"addi	t0, t0, 1;"
    212 		"beq	zero, zero, loop_start;"
    213 		"nop;"
    214 
    215 	"loop_end:"
    216 		"move t3, a0;"
    217 	);
    218 
    219 	/*
    220 	 * Flush cache
    221 	 */
    222 	__asm(
    223 		"li	t1, 16384;"
    224 		"li	t2, 8192;"
    225 
    226 		/* Disable I-cache */
    227 		"li	t5, ~0x00000020;"
    228 		"mfc0	t6, $3;"
    229 		"and	t5, t5, t6;"
    230 		"nop;"
    231 		"mtc0	t5, $3;"
    232 		/* Stop streaming */
    233 		"beq	zero, zero, 1f;"
    234 		"nop;"
    235 	"1:"
    236 		/* Flush I-cache */
    237 		"li	t0, 0x80000000;"
    238 		"addu	t1, t0, t1;"
    239 		"subu	t1, t1, 128;"
    240 	"2:"
    241 		".word 0xbd000000;"
    242 		".word 0xbd000010;"
    243 		".word 0xbd000020;"
    244 		".word 0xbd000030;"
    245 		".word 0xbd000040;"
    246 		".word 0xbd000050;"
    247 		".word 0xbd000060;"
    248 		".word 0xbd000070;"
    249 		"bne	t0, t1, 2b;"
    250 		"addu	t0, t0, 128;"
    251 
    252 		/* Flush D-cache */
    253 		"li	t0, 0x80000000;"
    254 		"addu	t1, t0, t2;"
    255 
    256 	"3:"
    257 		"lw	t2, 0(t0);"
    258 		"bne	t1, t0, 3b;"
    259 		"addiu	t0, t0, 4;"
    260 
    261 		/* Enable I-cache */
    262 		"nop;"
    263 		"mtc0	t6, $3;"
    264 		"nop;"
    265 	);
    266 	/*
    267 	 *  Jump to kernel entry
    268 	 */
    269 	__asm(
    270 
    271 		"lw	t0, 0(t3);"	/* entry addr */
    272 		"lw	a1, 24(t3);"	/* arg1 */
    273 		"lw	a2, 28(t3);"	/* arg2 */
    274 		"lw	a3, 32(t3);"	/* arg3 */
    275 		"lw	a0, 20(t3);"	/* arg0 */
    276 		"jr	t0;"
    277 		"nop;"
    278 
    279 		".globl tx39xx_asm_code_end;"
    280 		"tx39xx_asm_code_end: nop;"
    281 		".set reorder;	"
    282 	);
    283 }
    284