Home | History | Annotate | Line # | Download | only in tx
tx39.c revision 1.25
      1  1.25       uch /*	$NetBSD: tx39.c,v 1.25 2001/09/16 15:45:45 uch Exp $ */
      2   1.1       uch 
      3  1.17       uch /*-
      4  1.20       uch  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  1.20       uch  * All rights reserved.
      6  1.20       uch  *
      7  1.20       uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.20       uch  * by UCHIYAMA Yasushi.
      9   1.1       uch  *
     10   1.1       uch  * Redistribution and use in source and binary forms, with or without
     11   1.1       uch  * modification, are permitted provided that the following conditions
     12   1.1       uch  * are met:
     13   1.1       uch  * 1. Redistributions of source code must retain the above copyright
     14   1.1       uch  *    notice, this list of conditions and the following disclaimer.
     15  1.16       uch  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.16       uch  *    notice, this list of conditions and the following disclaimer in the
     17  1.16       uch  *    documentation and/or other materials provided with the distribution.
     18  1.20       uch  * 3. All advertising materials mentioning features or use of this software
     19  1.20       uch  *    must display the following acknowledgement:
     20  1.20       uch  *        This product includes software developed by the NetBSD
     21  1.20       uch  *        Foundation, Inc. and its contributors.
     22  1.20       uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.20       uch  *    contributors may be used to endorse or promote products derived
     24  1.20       uch  *    from this software without specific prior written permission.
     25   1.1       uch  *
     26  1.20       uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.20       uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.20       uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.20       uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.20       uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.20       uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.20       uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.20       uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.20       uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.20       uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.20       uch  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1       uch  */
     38   1.1       uch 
     39   1.1       uch #include "opt_tx39_debug.h"
     40   1.5       uch #include "m38813c.h"
     41   1.6       uch #include "tc5165buf.h"
     42   1.1       uch 
     43   1.1       uch #include <sys/param.h>
     44   1.1       uch #include <sys/systm.h>
     45   1.1       uch #include <sys/device.h>
     46  1.14      shin #include <sys/kcore.h>
     47   1.1       uch 
     48   1.1       uch #include <machine/locore.h>   /* cpu_id */
     49   1.1       uch #include <machine/bootinfo.h> /* bootinfo */
     50   1.1       uch #include <machine/sysconf.h>  /* platform */
     51   1.1       uch 
     52   1.6       uch #include <machine/platid.h>
     53   1.6       uch #include <machine/platid_mask.h>
     54   1.6       uch 
     55   1.1       uch #include <machine/bus.h>
     56   1.1       uch #include <machine/intr.h>
     57   1.1       uch 
     58  1.13      sato #include <hpcmips/hpcmips/machdep.h> /* cpu_name */
     59   1.1       uch 
     60   1.1       uch #include <hpcmips/tx/tx39biureg.h>
     61   1.1       uch #include <hpcmips/tx/tx39reg.h>
     62   1.1       uch #include <hpcmips/tx/tx39var.h>
     63   1.1       uch #ifdef TX391X
     64   1.1       uch #include <hpcmips/tx/tx3912videovar.h>
     65   1.1       uch #endif
     66   1.1       uch 
     67   1.1       uch #include <sys/termios.h>
     68   1.1       uch #include <sys/ttydefaults.h>
     69   1.1       uch #include <hpcmips/tx/tx39uartvar.h>
     70   1.1       uch #ifndef CONSPEED
     71   1.1       uch #define CONSPEED TTYDEF_SPEED
     72   1.1       uch #endif
     73   1.1       uch 
     74   1.5       uch /* console keyboard */
     75   1.5       uch #if NM38813C > 0
     76   1.5       uch #include <hpcmips/dev/m38813cvar.h>
     77   1.1       uch #endif
     78   1.6       uch #if NTC5165BUF > 0
     79   1.6       uch #include <hpcmips/dev/tc5165bufvar.h>
     80   1.6       uch #endif
     81   1.1       uch 
     82   1.1       uch struct tx_chipset_tag tx_chipset;
     83   1.1       uch 
     84   1.1       uch #ifdef TX39_DEBUG
     85   1.1       uch u_int32_t tx39debugflag;
     86   1.1       uch #endif
     87   1.1       uch 
     88  1.20       uch void	tx_init(void);
     89  1.20       uch int	tx39icu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     90  1.20       uch void	tx39clock_cpuspeed(int*, int*);
     91   1.1       uch 
     92   1.1       uch /* TX39-specific initialization vector */
     93  1.20       uch void	tx_cons_init(void);
     94  1.20       uch void    tx_fb_init(caddr_t*);
     95  1.20       uch void    tx_mem_init(paddr_t);
     96  1.20       uch void	tx_find_dram(paddr_t, paddr_t);
     97  1.20       uch void	tx_reboot(int, char *);
     98  1.20       uch int	tx_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     99   1.1       uch 
    100  1.14      shin extern phys_ram_seg_t mem_clusters[];
    101  1.14      shin extern int mem_cluster_cnt;
    102  1.14      shin 
    103   1.1       uch void
    104   1.1       uch tx_init()
    105   1.1       uch {
    106   1.1       uch 	tx_chipset_tag_t tc;
    107   1.1       uch 	int model, rev;
    108   1.8       uch 	int cpuclock;
    109   1.1       uch 
    110   1.1       uch 	tc = tx_conf_get_tag();
    111   1.1       uch 	/*
    112   1.1       uch 	 * Platform Specific Function Hooks
    113   1.1       uch 	 */
    114  1.25       uch 	platform.cpu_idle	= NULL; /* not implemented yet */
    115  1.25       uch 	platform.cons_init	= tx_cons_init;
    116  1.25       uch 	platform.fb_init	= tx_fb_init;
    117  1.25       uch 	platform.mem_init	= tx_mem_init;
    118  1.25       uch 	platform.reboot		= tx_reboot;
    119  1.25       uch 	platform.iointr		= tx39icu_intr;
    120   1.1       uch 
    121  1.19       cgd 	model = MIPS_PRID_REV(cpu_id);
    122   1.1       uch 
    123   1.1       uch 	switch (model) {
    124   1.1       uch 	default:
    125  1.23       uch 		/* Unknown TOSHIBA TX39-series */
    126  1.19       cgd 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
    127   1.1       uch 		break;
    128   1.1       uch 	case TMPR3912:
    129   1.8       uch 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    130   1.8       uch 
    131  1.13      sato 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
    132  1.23       uch 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    133  1.20       uch 		tc->tc_chipset = __TX391X;
    134   1.1       uch 		break;
    135   1.1       uch 	case TMPR3922:
    136   1.8       uch 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    137   1.1       uch 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    138   1.8       uch 
    139  1.13      sato 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
    140  1.23       uch 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
    141  1.23       uch 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    142  1.20       uch 		tc->tc_chipset = __TX392X;
    143   1.1       uch 		break;
    144   1.1       uch 	}
    145   1.1       uch }
    146   1.1       uch 
    147   1.1       uch void
    148   1.1       uch tx_fb_init(kernend)
    149   1.1       uch 	caddr_t *kernend;
    150   1.1       uch {
    151   1.1       uch #ifdef TX391X
    152  1.16       uch 	paddr_t fb_end;
    153   1.1       uch 
    154  1.16       uch 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
    155  1.23       uch 	    mem_clusters[0].size - 1);
    156  1.16       uch 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
    157  1.16       uch 
    158   1.1       uch 	/* Skip V-RAM area */
    159  1.16       uch 	*kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end);
    160   1.1       uch #endif /* TX391X */
    161   1.1       uch #ifdef TX392X
    162   1.1       uch 	/*
    163   1.1       uch 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    164   1.7       uch 	 * at this time, frame buffer device is disabled.
    165   1.1       uch 	 */
    166   1.1       uch 	bootinfo->fb_addr = 0;
    167   1.1       uch #endif /* TX392X */
    168   1.1       uch }
    169   1.1       uch 
    170  1.14      shin void
    171   1.1       uch tx_mem_init(kernend)
    172  1.14      shin 	paddr_t kernend;
    173   1.1       uch {
    174  1.14      shin 	mem_clusters[0].start = 0;
    175  1.14      shin 	mem_clusters[0].size = kernend;
    176  1.14      shin 	mem_cluster_cnt = 1;
    177  1.14      shin 	/* search DRAM bank 0 */
    178  1.14      shin 	tx_find_dram(kernend, 0x02000000);
    179   1.1       uch 
    180  1.14      shin 	/* search DRAM bank 1 */
    181  1.14      shin 	tx_find_dram(0x02000000, 0x04000000);
    182   1.5       uch 	/*
    183   1.5       uch 	 *  Clear currently unused D-RAM area
    184   1.5       uch 	 *  (For reboot Windows CE clearly)
    185   1.5       uch 	 */
    186  1.14      shin 	memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF -
    187  1.23       uch 	    (KERNBASE + 0x800));
    188   1.2  takemura }
    189   1.2  takemura 
    190   1.2  takemura void
    191  1.14      shin tx_find_dram(start, end)
    192  1.14      shin 	paddr_t start, end;
    193   1.2  takemura {
    194  1.14      shin 	caddr_t page, startaddr, endaddr;
    195  1.14      shin 
    196  1.14      shin 	startaddr = (void*)MIPS_PHYS_TO_KSEG1(start);
    197  1.14      shin 	endaddr = (void*)MIPS_PHYS_TO_KSEG1(end);
    198   1.1       uch 
    199   1.1       uch #define DRAM_MAGIC0 0xac1dcafe
    200   1.1       uch #define DRAM_MAGIC1 0x19700220
    201   1.1       uch 
    202   1.1       uch 	page = startaddr;
    203  1.14      shin 	if (badaddr(page, 4))
    204  1.14      shin 		return;
    205  1.14      shin 
    206  1.17       uch 	*(volatile int *)(page + 0) = DRAM_MAGIC0;
    207  1.17       uch 	*(volatile int *)(page + 4) = DRAM_MAGIC1;
    208  1.14      shin 	wbflush();
    209  1.14      shin 
    210  1.17       uch 	if (*(volatile int *)(page + 0) != DRAM_MAGIC0 ||
    211  1.17       uch 	    *(volatile int *)(page + 4) != DRAM_MAGIC1)
    212  1.14      shin 		return;
    213  1.14      shin 
    214  1.14      shin 	for (page += NBPG; page < endaddr; page += NBPG) {
    215  1.14      shin 		if (badaddr(page, 4))
    216  1.14      shin 			return;
    217  1.14      shin 
    218  1.17       uch 		if (*(volatile int *)(page + 0) == DRAM_MAGIC0 &&
    219  1.17       uch 		    *(volatile int *)(page + 4) == DRAM_MAGIC1) {
    220  1.17       uch 			goto memend_found;
    221   1.1       uch 		}
    222   1.1       uch 	}
    223  1.14      shin 
    224  1.17       uch 	/* check for 32MByte memory */
    225  1.17       uch 	page -= NBPG;
    226  1.17       uch 	*(volatile int *)(page + 0) = DRAM_MAGIC0;
    227  1.17       uch 	*(volatile int *)(page + 4) = DRAM_MAGIC1;
    228  1.17       uch 	wbflush();
    229  1.17       uch 
    230  1.17       uch 	if (*(volatile int *)(page + 0) != DRAM_MAGIC0 ||
    231  1.17       uch 	    *(volatile int *)(page + 4) != DRAM_MAGIC1)
    232  1.17       uch 		return; /* no memory in this bank */
    233  1.17       uch 
    234  1.17       uch  memend_found:
    235  1.17       uch 	mem_clusters[mem_cluster_cnt].start = start;
    236  1.17       uch 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
    237  1.17       uch 
    238  1.17       uch 	/* skip kernel area */
    239  1.17       uch 	if (mem_cluster_cnt == 1)
    240  1.17       uch 		mem_clusters[mem_cluster_cnt].size -= start;
    241  1.17       uch 
    242  1.17       uch 	mem_cluster_cnt++;
    243  1.14      shin }
    244  1.14      shin 
    245  1.14      shin void
    246  1.14      shin tx_reboot(howto, bootstr)
    247  1.14      shin 	int howto;
    248  1.14      shin 	char *bootstr;
    249  1.14      shin {
    250  1.14      shin 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    251   1.1       uch }
    252   1.1       uch 
    253   1.1       uch void
    254   1.1       uch tx_cons_init()
    255   1.1       uch {
    256   1.1       uch 	int slot;
    257  1.20       uch #define CONSPLATIDMATCH(p)						\
    258   1.6       uch 	platid_match(&platid, &platid_mask_MACH_##p)
    259   1.1       uch 
    260   1.1       uch #ifdef SERIALCONSSLOT
    261   1.1       uch 	slot = SERIALCONSSLOT;
    262   1.1       uch #else
    263   1.1       uch 	slot = TX39_UARTA;
    264   1.1       uch #endif
    265   1.1       uch 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    266  1.23       uch 		if(txcom_cnattach(slot, CONSPEED,
    267  1.23       uch 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    268   1.1       uch 			panic("tx_cons_init: can't attach serial console.");
    269   1.1       uch 		}
    270   1.5       uch 	} else {
    271   1.6       uch #if NM38813C > 0
    272   1.6       uch 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    273  1.23       uch 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    274  1.10       uch 			goto panic;
    275   1.6       uch 		}
    276   1.6       uch #endif
    277   1.6       uch #if NTC5165BUF > 0
    278  1.10       uch 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    279  1.23       uch 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
    280  1.10       uch 			goto panic;
    281  1.10       uch 		}
    282  1.10       uch 
    283   1.6       uch 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    284  1.23       uch 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    285  1.10       uch 			goto panic;
    286  1.10       uch 		}
    287  1.10       uch 
    288  1.10       uch 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
    289  1.23       uch 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
    290  1.10       uch 			goto panic;
    291   1.5       uch 		}
    292   1.5       uch #endif
    293   1.1       uch 	}
    294  1.10       uch 
    295  1.10       uch 	return;
    296  1.10       uch  panic:
    297  1.10       uch 	panic("tx_cons_init: can't init console");
    298  1.10       uch 	/* NOTREACHED */
    299   1.1       uch }
    300   1.1       uch 
    301   1.1       uch void
    302   1.1       uch tx_conf_register_intr(t, intrt)
    303   1.1       uch 	tx_chipset_tag_t t;
    304   1.1       uch 	void *intrt;
    305   1.1       uch {
    306  1.20       uch 	KASSERT(t == &tx_chipset);
    307   1.1       uch 
    308   1.1       uch 	tx_chipset.tc_intrt = intrt;
    309   1.1       uch }
    310   1.1       uch 
    311   1.9       uch void
    312   1.9       uch tx_conf_register_power(t, powert)
    313   1.9       uch 	tx_chipset_tag_t t;
    314   1.9       uch 	void *powert;
    315   1.9       uch {
    316  1.20       uch 	KASSERT(t == &tx_chipset);
    317   1.9       uch 
    318   1.9       uch 	tx_chipset.tc_powert = powert;
    319   1.9       uch }
    320   1.9       uch 
    321   1.9       uch void
    322   1.9       uch tx_conf_register_clock(t, clockt)
    323   1.9       uch 	tx_chipset_tag_t t;
    324   1.9       uch 	void *clockt;
    325   1.9       uch {
    326  1.20       uch 	KASSERT(t == &tx_chipset);
    327   1.9       uch 
    328   1.9       uch 	tx_chipset.tc_clockt = clockt;
    329  1.11       uch }
    330  1.11       uch 
    331  1.11       uch void
    332  1.11       uch tx_conf_register_sound(t, soundt)
    333  1.11       uch 	tx_chipset_tag_t t;
    334  1.11       uch 	void *soundt;
    335  1.11       uch {
    336  1.20       uch 	KASSERT(t == &tx_chipset);
    337  1.11       uch 
    338  1.11       uch 	tx_chipset.tc_soundt = soundt;
    339  1.18       uch }
    340  1.18       uch 
    341  1.18       uch void
    342  1.18       uch tx_conf_register_video(t, videot)
    343  1.18       uch 	tx_chipset_tag_t t;
    344  1.18       uch 	void *videot;
    345  1.18       uch {
    346  1.20       uch 	KASSERT(t == &tx_chipset);
    347  1.18       uch 
    348  1.18       uch 	tx_chipset.tc_videot = videot;
    349   1.9       uch }
    350   1.1       uch 
    351   1.1       uch int
    352   1.1       uch __is_set_print(reg, mask, name)
    353   1.1       uch 	u_int32_t reg;
    354   1.1       uch 	int mask;
    355   1.1       uch 	char *name;
    356   1.1       uch {
    357   1.9       uch 	const char onoff[2] = "_x";
    358   1.9       uch 	int ret = reg & mask ? 1 : 0;
    359   1.9       uch 
    360   1.9       uch 	printf("%s[%c] ", name, onoff[ret]);
    361   1.9       uch 
    362  1.23       uch 	return (ret);
    363   1.1       uch }
    364