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tx39.c revision 1.33.16.2
      1  1.33.16.2      yamt /*	$NetBSD: tx39.c,v 1.33.16.2 2007/09/03 14:26:10 yamt Exp $ */
      2        1.1       uch 
      3       1.17       uch /*-
      4       1.20       uch  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5       1.20       uch  * All rights reserved.
      6       1.20       uch  *
      7       1.20       uch  * This code is derived from software contributed to The NetBSD Foundation
      8       1.20       uch  * by UCHIYAMA Yasushi.
      9        1.1       uch  *
     10        1.1       uch  * Redistribution and use in source and binary forms, with or without
     11        1.1       uch  * modification, are permitted provided that the following conditions
     12        1.1       uch  * are met:
     13        1.1       uch  * 1. Redistributions of source code must retain the above copyright
     14        1.1       uch  *    notice, this list of conditions and the following disclaimer.
     15       1.16       uch  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.16       uch  *    notice, this list of conditions and the following disclaimer in the
     17       1.16       uch  *    documentation and/or other materials provided with the distribution.
     18       1.20       uch  * 3. All advertising materials mentioning features or use of this software
     19       1.20       uch  *    must display the following acknowledgement:
     20       1.20       uch  *        This product includes software developed by the NetBSD
     21       1.20       uch  *        Foundation, Inc. and its contributors.
     22       1.20       uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.20       uch  *    contributors may be used to endorse or promote products derived
     24       1.20       uch  *    from this software without specific prior written permission.
     25        1.1       uch  *
     26       1.20       uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.20       uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.20       uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.20       uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.20       uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.20       uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.20       uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.20       uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.20       uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.20       uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.20       uch  * POSSIBILITY OF SUCH DAMAGE.
     37        1.1       uch  */
     38       1.33     lukem 
     39       1.33     lukem #include <sys/cdefs.h>
     40  1.33.16.2      yamt __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.33.16.2 2007/09/03 14:26:10 yamt Exp $");
     41        1.1       uch 
     42       1.27       uch #include "opt_vr41xx.h"
     43       1.27       uch #include "opt_tx39xx.h"
     44        1.5       uch #include "m38813c.h"
     45        1.6       uch #include "tc5165buf.h"
     46        1.1       uch 
     47        1.1       uch #include <sys/param.h>
     48        1.1       uch #include <sys/systm.h>
     49        1.1       uch 
     50       1.32   thorpej #include <uvm/uvm_extern.h>
     51       1.32   thorpej 
     52       1.28       uch #include <mips/cache.h>
     53       1.28       uch 
     54        1.1       uch #include <machine/locore.h>   /* cpu_id */
     55        1.1       uch #include <machine/bootinfo.h> /* bootinfo */
     56        1.1       uch #include <machine/sysconf.h>  /* platform */
     57        1.1       uch 
     58        1.6       uch #include <machine/platid.h>
     59        1.6       uch #include <machine/platid_mask.h>
     60        1.6       uch 
     61        1.1       uch #include <machine/bus.h>
     62        1.1       uch 
     63        1.1       uch #include <hpcmips/tx/tx39biureg.h>
     64        1.1       uch #include <hpcmips/tx/tx39reg.h>
     65        1.1       uch #include <hpcmips/tx/tx39var.h>
     66        1.1       uch #ifdef TX391X
     67        1.1       uch #include <hpcmips/tx/tx3912videovar.h>
     68        1.1       uch #endif
     69        1.1       uch 
     70        1.1       uch #include <sys/termios.h>
     71        1.1       uch #include <sys/ttydefaults.h>
     72        1.1       uch #include <hpcmips/tx/tx39uartvar.h>
     73        1.1       uch #ifndef CONSPEED
     74        1.1       uch #define CONSPEED TTYDEF_SPEED
     75        1.1       uch #endif
     76        1.1       uch 
     77        1.5       uch /* console keyboard */
     78        1.5       uch #if NM38813C > 0
     79        1.5       uch #include <hpcmips/dev/m38813cvar.h>
     80        1.1       uch #endif
     81        1.6       uch #if NTC5165BUF > 0
     82        1.6       uch #include <hpcmips/dev/tc5165bufvar.h>
     83        1.6       uch #endif
     84        1.1       uch 
     85        1.1       uch struct tx_chipset_tag tx_chipset;
     86        1.1       uch 
     87       1.20       uch void	tx_init(void);
     88       1.27       uch #if defined(VR41XX) && defined(TX39XX)
     89       1.27       uch #define	TX_INTR	tx_intr
     90       1.27       uch #else
     91       1.27       uch #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
     92       1.27       uch #endif
     93       1.27       uch 
     94       1.27       uch extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     95       1.27       uch 
     96       1.26       uch void	tx39clock_cpuspeed(int *, int *);
     97        1.1       uch 
     98        1.1       uch /* TX39-specific initialization vector */
     99       1.20       uch void	tx_cons_init(void);
    100  1.33.16.2      yamt void    tx_fb_init(void **);
    101       1.20       uch void    tx_mem_init(paddr_t);
    102       1.20       uch void	tx_find_dram(paddr_t, paddr_t);
    103       1.20       uch void	tx_reboot(int, char *);
    104        1.1       uch 
    105        1.1       uch void
    106        1.1       uch tx_init()
    107        1.1       uch {
    108        1.1       uch 	tx_chipset_tag_t tc;
    109        1.1       uch 	int model, rev;
    110        1.8       uch 	int cpuclock;
    111        1.1       uch 
    112        1.1       uch 	tc = tx_conf_get_tag();
    113        1.1       uch 	/*
    114        1.1       uch 	 * Platform Specific Function Hooks
    115        1.1       uch 	 */
    116       1.27       uch 	platform.cpu_intr	= TX_INTR;
    117       1.25       uch 	platform.cpu_idle	= NULL; /* not implemented yet */
    118       1.25       uch 	platform.cons_init	= tx_cons_init;
    119       1.25       uch 	platform.fb_init	= tx_fb_init;
    120       1.25       uch 	platform.mem_init	= tx_mem_init;
    121       1.25       uch 	platform.reboot		= tx_reboot;
    122       1.27       uch 
    123        1.1       uch 
    124       1.19       cgd 	model = MIPS_PRID_REV(cpu_id);
    125        1.1       uch 
    126        1.1       uch 	switch (model) {
    127        1.1       uch 	default:
    128       1.23       uch 		/* Unknown TOSHIBA TX39-series */
    129       1.19       cgd 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
    130        1.1       uch 		break;
    131        1.1       uch 	case TMPR3912:
    132        1.8       uch 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    133        1.8       uch 
    134       1.13      sato 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
    135       1.23       uch 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    136       1.20       uch 		tc->tc_chipset = __TX391X;
    137        1.1       uch 		break;
    138        1.1       uch 	case TMPR3922:
    139        1.8       uch 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    140        1.1       uch 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    141        1.8       uch 
    142       1.13      sato 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
    143       1.23       uch 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
    144       1.23       uch 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    145       1.20       uch 		tc->tc_chipset = __TX392X;
    146        1.1       uch 		break;
    147        1.1       uch 	}
    148        1.1       uch }
    149        1.1       uch 
    150        1.1       uch void
    151  1.33.16.2      yamt tx_fb_init(void **kernend)
    152        1.1       uch {
    153        1.1       uch #ifdef TX391X
    154       1.16       uch 	paddr_t fb_end;
    155        1.1       uch 
    156       1.16       uch 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
    157       1.23       uch 	    mem_clusters[0].size - 1);
    158       1.16       uch 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
    159       1.16       uch 
    160        1.1       uch 	/* Skip V-RAM area */
    161  1.33.16.2      yamt 	*kernend = (void *)MIPS_PHYS_TO_KSEG0(fb_end);
    162        1.1       uch #endif /* TX391X */
    163        1.1       uch #ifdef TX392X
    164        1.1       uch 	/*
    165        1.1       uch 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    166        1.7       uch 	 * at this time, frame buffer device is disabled.
    167        1.1       uch 	 */
    168        1.1       uch 	bootinfo->fb_addr = 0;
    169        1.1       uch #endif /* TX392X */
    170        1.1       uch }
    171        1.1       uch 
    172       1.14      shin void
    173       1.26       uch tx_mem_init(paddr_t kernend)
    174        1.1       uch {
    175       1.26       uch 
    176       1.14      shin 	mem_clusters[0].start = 0;
    177       1.14      shin 	mem_clusters[0].size = kernend;
    178       1.14      shin 	mem_cluster_cnt = 1;
    179       1.14      shin 	/* search DRAM bank 0 */
    180       1.14      shin 	tx_find_dram(kernend, 0x02000000);
    181        1.1       uch 
    182       1.14      shin 	/* search DRAM bank 1 */
    183       1.14      shin 	tx_find_dram(0x02000000, 0x04000000);
    184        1.2  takemura }
    185        1.2  takemura 
    186        1.2  takemura void
    187       1.26       uch tx_find_dram(paddr_t start, paddr_t end)
    188        1.2  takemura {
    189  1.33.16.2      yamt 	char *page, *startaddr, *endaddr;
    190       1.28       uch 	u_int32_t magic0, magic1;
    191  1.33.16.1      yamt #define MAGIC0		(*(volatile u_int32_t *)(page + 0))
    192  1.33.16.1      yamt #define MAGIC1		(*(volatile u_int32_t *)(page + 4))
    193       1.14      shin 
    194  1.33.16.2      yamt 	startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
    195  1.33.16.2      yamt 	endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
    196        1.1       uch 
    197        1.1       uch 	page = startaddr;
    198       1.14      shin 	if (badaddr(page, 4))
    199       1.14      shin 		return;
    200       1.14      shin 
    201       1.28       uch 	do {
    202       1.28       uch 		magic0 = random();
    203       1.28       uch 		magic1 = random();
    204       1.28       uch 	} while (MAGIC0 == magic0 || MAGIC0 == magic1);
    205       1.28       uch 
    206       1.28       uch 	MAGIC0 = magic0;
    207       1.28       uch 	MAGIC1 = magic1;
    208       1.14      shin 	wbflush();
    209       1.14      shin 
    210       1.28       uch 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    211       1.14      shin 		return;
    212       1.14      shin 
    213       1.32   thorpej 	for (page += PAGE_SIZE; page < endaddr; page += PAGE_SIZE) {
    214       1.14      shin 		if (badaddr(page, 4))
    215       1.14      shin 			return;
    216       1.28       uch 		if (MAGIC0 == magic0 &&
    217       1.28       uch 		    MAGIC1 == magic1) {
    218       1.17       uch 			goto memend_found;
    219        1.1       uch 		}
    220        1.1       uch 	}
    221       1.14      shin 
    222       1.17       uch 	/* check for 32MByte memory */
    223       1.32   thorpej 	page -= PAGE_SIZE;
    224       1.28       uch 	MAGIC0 = magic0;
    225       1.28       uch 	MAGIC1 = magic1;
    226       1.17       uch 	wbflush();
    227       1.28       uch 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    228       1.17       uch 		return; /* no memory in this bank */
    229       1.17       uch 
    230       1.17       uch  memend_found:
    231       1.17       uch 	mem_clusters[mem_cluster_cnt].start = start;
    232       1.17       uch 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
    233       1.29       uch 
    234       1.29       uch 	/* skip kernel area */
    235       1.29       uch 	if (mem_cluster_cnt == 1)
    236       1.29       uch 		mem_clusters[mem_cluster_cnt].size -= start;
    237       1.29       uch 
    238       1.17       uch 	mem_cluster_cnt++;
    239       1.28       uch #undef MAGIC0
    240       1.28       uch #undef MAGIC1
    241       1.14      shin }
    242       1.14      shin 
    243       1.14      shin void
    244       1.26       uch tx_reboot(int howto, char *bootstr)
    245       1.14      shin {
    246       1.26       uch 
    247       1.14      shin 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    248        1.1       uch }
    249        1.1       uch 
    250        1.1       uch void
    251        1.1       uch tx_cons_init()
    252        1.1       uch {
    253        1.1       uch 	int slot;
    254       1.20       uch #define CONSPLATIDMATCH(p)						\
    255        1.6       uch 	platid_match(&platid, &platid_mask_MACH_##p)
    256        1.1       uch 
    257        1.1       uch #ifdef SERIALCONSSLOT
    258        1.1       uch 	slot = SERIALCONSSLOT;
    259        1.1       uch #else
    260        1.1       uch 	slot = TX39_UARTA;
    261        1.1       uch #endif
    262        1.1       uch 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    263       1.23       uch 		if(txcom_cnattach(slot, CONSPEED,
    264       1.23       uch 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    265        1.1       uch 			panic("tx_cons_init: can't attach serial console.");
    266        1.1       uch 		}
    267        1.5       uch 	} else {
    268        1.6       uch #if NM38813C > 0
    269        1.6       uch 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    270       1.23       uch 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    271       1.10       uch 			goto panic;
    272        1.6       uch 		}
    273        1.6       uch #endif
    274        1.6       uch #if NTC5165BUF > 0
    275       1.10       uch 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    276       1.23       uch 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
    277       1.10       uch 			goto panic;
    278       1.10       uch 		}
    279       1.10       uch 
    280        1.6       uch 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    281       1.23       uch 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    282       1.10       uch 			goto panic;
    283       1.10       uch 		}
    284       1.10       uch 
    285       1.10       uch 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
    286       1.23       uch 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
    287       1.10       uch 			goto panic;
    288        1.5       uch 		}
    289        1.5       uch #endif
    290        1.1       uch 	}
    291       1.10       uch 
    292       1.10       uch 	return;
    293       1.10       uch  panic:
    294       1.10       uch 	panic("tx_cons_init: can't init console");
    295       1.10       uch 	/* NOTREACHED */
    296        1.1       uch }
    297        1.1       uch 
    298        1.1       uch void
    299       1.26       uch tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
    300        1.1       uch {
    301       1.26       uch 
    302       1.20       uch 	KASSERT(t == &tx_chipset);
    303        1.1       uch 	tx_chipset.tc_intrt = intrt;
    304        1.1       uch }
    305        1.1       uch 
    306        1.9       uch void
    307       1.26       uch tx_conf_register_power(tx_chipset_tag_t t, void *powert)
    308        1.9       uch {
    309       1.26       uch 
    310       1.20       uch 	KASSERT(t == &tx_chipset);
    311        1.9       uch 	tx_chipset.tc_powert = powert;
    312        1.9       uch }
    313        1.9       uch 
    314        1.9       uch void
    315       1.26       uch tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
    316        1.9       uch {
    317       1.26       uch 
    318       1.20       uch 	KASSERT(t == &tx_chipset);
    319        1.9       uch 	tx_chipset.tc_clockt = clockt;
    320       1.11       uch }
    321       1.11       uch 
    322       1.11       uch void
    323       1.26       uch tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
    324       1.11       uch {
    325       1.26       uch 
    326       1.20       uch 	KASSERT(t == &tx_chipset);
    327       1.11       uch 	tx_chipset.tc_soundt = soundt;
    328       1.18       uch }
    329       1.18       uch 
    330       1.18       uch void
    331       1.26       uch tx_conf_register_video(tx_chipset_tag_t t, void *videot)
    332       1.18       uch {
    333       1.26       uch 
    334       1.20       uch 	KASSERT(t == &tx_chipset);
    335       1.18       uch 	tx_chipset.tc_videot = videot;
    336        1.1       uch }
    337