Home | History | Annotate | Line # | Download | only in tx
tx39.c revision 1.1 
      1 /*	$NetBSD: tx39.c,v 1.1 1999/11/20 19:56:31 uch Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1999, by UCHIYAMA Yasushi
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the developer may NOT be used to endorse or promote products
     13  *    derived from this software without specific prior written permission.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  *
     27  */
     28 
     29 #include "opt_tx39_debug.h"
     30 #include "fb.h"
     31 #include "cckbd.h"
     32 
     33 #include <sys/param.h>
     34 #include <sys/systm.h>
     35 #include <sys/device.h>
     36 
     37 #include <machine/locore.h>   /* cpu_id */
     38 #include <machine/bootinfo.h> /* bootinfo */
     39 #include <machine/sysconf.h>  /* platform */
     40 
     41 #include <machine/bus.h>
     42 #include <machine/intr.h>
     43 
     44 #include <hpcmips/hpcmips/machdep.h> /* cpu_model */
     45 #include <hpcmips/dev/biconsvar.h>
     46 #include <hpcmips/dev/bicons.h>
     47 
     48 #include <hpcmips/tx/tx39biureg.h>
     49 #include <hpcmips/tx/tx39reg.h>
     50 #include <hpcmips/tx/tx39var.h>
     51 #ifdef TX391X
     52 #include <hpcmips/tx/tx3912videovar.h>
     53 #endif
     54 
     55 #include <sys/termios.h>
     56 #include <sys/ttydefaults.h>
     57 #include <hpcmips/tx/tx39uartvar.h>
     58 #ifndef CONSPEED
     59 #define CONSPEED TTYDEF_SPEED
     60 #endif
     61 
     62 #if NFB > 0
     63 #include <dev/rcons/raster.h>
     64 #include <dev/wscons/wsdisplayvar.h>
     65 #include <arch/hpcmips/dev/fbvar.h>
     66 #endif
     67 
     68 #if NCCKBD > 0
     69 #include <hpcmips/dev/cckbdvar.h>
     70 #endif
     71 
     72 extern unsigned nullclkread __P((void));
     73 extern unsigned (*clkread) __P((void));
     74 
     75 struct tx_chipset_tag tx_chipset;
     76 
     77 #ifdef TX39_DEBUG
     78 u_int32_t tx39debugflag;
     79 #endif
     80 
     81 void	tx_init __P((void));
     82 int	tx39icu_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
     83 int	tx39_find_dram __P((u_int32_t, u_int32_t));
     84 
     85 /* TX39-specific initialization vector */
     86 void	tx_os_init __P((void));
     87 void	tx_bus_reset __P((void));
     88 void	tx_cons_init __P((void));
     89 void	tx_device_register __P((struct device *, void *));
     90 void    tx_fb_init __P((caddr_t*));
     91 int     tx_mem_init __P((caddr_t));
     92 int	tx_intr __P((u_int32_t mask, u_int32_t pc, u_int32_t statusReg, u_int32_t causeReg));
     93 
     94 void
     95 tx_init()
     96 {
     97 	tx_chipset_tag_t tc;
     98 	int model, rev;
     99 
    100 	tc = tx_conf_get_tag();
    101 	/*
    102 	 * Platform Specific Function Hooks
    103 	 */
    104 	platform.os_init = tx_os_init;
    105 	platform.bus_reset = tx_bus_reset;
    106 	platform.cons_init = tx_cons_init;
    107 	platform.device_register = tx_device_register;
    108 	platform.fb_init = tx_fb_init;
    109 	platform.mem_init = tx_mem_init;
    110 
    111 	model = (cpu_id.cpu.cp_majrev << 4)| cpu_id.cpu.cp_minrev;
    112 
    113 	switch (model) {
    114 	default:
    115 		 /* Unknown TOSHIBA TX39-series */
    116 		sprintf(cpu_model, "Unknown TOSHIBA TX39-series %x.%x",
    117 			cpu_id.cpu.cp_majrev, cpu_id.cpu.cp_minrev);
    118 		break;
    119 	case TMPR3912:
    120 		sprintf(cpu_model, "TOSHIBA TMPR3912");
    121 		cpuspeed = 50; /* XXX Should calibrate XXX */
    122 		break;
    123 	case TMPR3922:
    124 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    125 		sprintf(cpu_model, "TOSHIBA TMPR3922 rev. %x.%x",
    126 			(rev >> 4) & 0xf, rev & 0xf);
    127 		cpuspeed = 100; /* XXX Should calibrate XXX */
    128 		break;
    129 	}
    130 }
    131 
    132 void
    133 tx_os_init()
    134 {
    135 	/*
    136 	 * Set up interrupt handling and I/O addresses.
    137 	 */
    138 	mips_hardware_intr = tx39icu_intr;
    139 
    140 	splvec.splbio = MIPS_SPL_2_4;
    141 	splvec.splnet = MIPS_SPL_2_4;
    142 	splvec.spltty = MIPS_SPL_2_4;
    143 	splvec.splimp = MIPS_SPL_2_4;
    144 	splvec.splclock = MIPS_SPL_2_4;
    145 	splvec.splstatclock = MIPS_SPL_2_4;
    146 
    147 	/* no high resolution timer circuit; possibly never called */
    148 	clkread = nullclkread;
    149 }
    150 
    151 void
    152 tx_fb_init(kernend)
    153 	caddr_t *kernend;
    154 {
    155 #ifdef TX391X
    156 	tx_chipset_tag_t tc;
    157 	u_int32_t fb_start, fb_addr, fb_size, fb_line_bytes;
    158 
    159 	/* Initialize to access TX39 configuration register */
    160 	tc = tx_conf_get_tag();
    161 
    162 	fb_start = MIPS_KSEG0_TO_PHYS(*kernend);
    163 	tx3912video_init(tc, fb_start, bootinfo->fb_width,
    164 			bootinfo->fb_height, &fb_addr, &fb_size,
    165 			&fb_line_bytes);
    166 
    167 	/* Set bootinfo for bicons */
    168 	bootinfo->fb_line_bytes = fb_line_bytes;
    169 	bootinfo->fb_addr = (unsigned char*)MIPS_PHYS_TO_KSEG1(fb_addr);
    170 
    171 	/* Skip V-RAM area */
    172 	*kernend += fb_size;
    173 #endif /* TX391X */
    174 #ifdef TX392X
    175 	/*
    176 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    177 	 * at this time, bicons is disabled.
    178 	 */
    179 	bootinfo->fb_addr = 0;
    180 #endif /* TX392X */
    181 }
    182 
    183 int
    184 tx_mem_init(kernend)
    185 	caddr_t kernend; /* kseg0 */
    186 {
    187 	u_int32_t startaddr, endaddr;
    188 	int npage, xpage, kpage;
    189 
    190 	startaddr = MIPS_PHYS_TO_KSEG1(
    191 		(btoc((u_int32_t)kernend - MIPS_KSEG0_START)) << PGSHIFT);
    192 	endaddr = MIPS_PHYS_TO_KSEG1(TX39_SYSADDR_DRAMBANK0CS1 +
    193 				     TX39_SYSADDR_DRAMBANK_LEN);
    194 	kpage = btoc(MIPS_KSEG1_TO_PHYS(startaddr));
    195 	/* D-RAM bank0 */
    196 	npage = tx39_find_dram(startaddr, endaddr);
    197 
    198 	printf("DRAM bank0: %d pages (%dMByte) reserved %d pages\n", npage + 1,
    199 	       ((npage  + 1) * NBPG) / 0x100000, kpage + 1);
    200 	npage -= kpage; /* exclude kernel area */
    201 	/* Clear DRAM area */
    202 	memset((void*)startaddr, 0, npage * NBPG);
    203 
    204 	/* D-RAM bank1 XXX find only. not usable yet */
    205 	startaddr = MIPS_PHYS_TO_KSEG1(TX39_SYSADDR_DRAMBANK1CS1);
    206 	endaddr = MIPS_PHYS_TO_KSEG1(TX39_SYSADDR_DRAMBANK1CS1 +
    207 				     TX39_SYSADDR_DRAMBANK_LEN);
    208 	xpage = tx39_find_dram(startaddr, endaddr);
    209 	printf("DRAM bank1: %d pages (%dMByte) ...but not usable yet\n",
    210 	       xpage + 1, ((xpage + 1) * NBPG) / 0x100000);
    211 
    212 	/* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
    213 	memset((void*)startaddr, 0, npage * NBPG);
    214 	memset((void*)(KERNBASE + 0x400), 0, KERNTEXTOFF - KERNBASE - 0x800);
    215 
    216 	return npage; /* Return bank0's memory only */
    217 }
    218 
    219 int
    220 tx39_find_dram(startaddr, endaddr)
    221 	u_int32_t startaddr; /* kseg1 */
    222 	u_int32_t endaddr;    /* kseg1 */
    223 {
    224 #define DRAM_MAGIC0 0xac1dcafe
    225 #define DRAM_MAGIC1 0x19700220
    226 	u_int32_t page;
    227 	int npage;
    228 
    229 	page = startaddr;
    230 	((volatile int *)page)[0] = DRAM_MAGIC0;
    231 	((volatile int *)page)[4] = DRAM_MAGIC1;
    232 	page += NBPG;
    233 	for (npage = 0; page < endaddr; page += NBPG, npage++) {
    234 		if ((((volatile int *)page)[0] == DRAM_MAGIC0 &&
    235 		     ((volatile int *)page)[4] == DRAM_MAGIC1)) {
    236 			return npage;
    237 		}
    238 	}
    239 	/* no memory in this bank */
    240 	return 0;
    241 }
    242 
    243 void
    244 tx_bus_reset()
    245 {
    246 	/* hpcmips port don't use */
    247 }
    248 
    249 void
    250 tx_cons_init()
    251 {
    252 	int slot;
    253 
    254 #ifdef SERIALCONSSLOT
    255 	slot = SERIALCONSSLOT;
    256 #else
    257 	slot = TX39_UARTA;
    258 #endif
    259 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    260 		if(txcom_cnattach(slot, CONSPEED,
    261 				  (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    262 			panic("tx_cons_init: can't attach serial console.");
    263 		}
    264 	}
    265 #if NFB > 0
    266 	if(fb_cnattach(0, 0, 0, 0)) {
    267 		panic("tx_cons_init: can't init fb console");
    268 	}
    269 #endif
    270 #if NCCKBD > 0
    271 	if(cckbd_cnattach(0, 0)) {
    272 		panic("tx_cons_init: can't init cckbd as console");
    273 	}
    274 #endif
    275 
    276 }
    277 
    278 void
    279 tx_device_register(dev, aux)
    280 	struct device *dev;
    281 	void *aux;
    282 {
    283 	/* hpcmips port don't use */
    284 }
    285 
    286 void
    287 tx_conf_register_intr(t, intrt)
    288 	tx_chipset_tag_t t;
    289 	void *intrt;
    290 {
    291 	if (tx_chipset.tc_intrt) {
    292 		panic("duplicate intrt");
    293 	}
    294 
    295 	if (t != &tx_chipset) {
    296 		panic("bogus tx_chipset_tag");
    297 	}
    298 
    299 	tx_chipset.tc_intrt = intrt;
    300 }
    301 
    302 #ifdef TX39_PREFER_FUNCTION
    303 tx_chipset_tag_t
    304 tx_conf_get_tag()
    305 {
    306 	return (tx_chipset_tag_t)&tx_chipset;
    307 }
    308 
    309 txreg_t
    310 tx_conf_read(t, reg)
    311 	tx_chipset_tag_t t;
    312 	int reg;
    313 {
    314 	return *((txreg_t*)(TX39_SYSADDR_CONFIG_REG_KSEG1 + reg));
    315 }
    316 
    317 void
    318 tx_conf_write(t, reg, val)
    319 	tx_chipset_tag_t t;
    320 	int reg;
    321 	txreg_t val;
    322 {
    323 	*((txreg_t*)(TX39_SYSADDR_CONFIG_REG_KSEG1 + reg)) = val;
    324 }
    325 #endif /* TX39_PREFER_FUNCTION */
    326 
    327 int
    328 __is_set_print(reg, mask, name)
    329 	u_int32_t reg;
    330 	int mask;
    331 	char *name;
    332 {
    333 	if (reg & mask) {
    334 		printf("%s ", name);
    335 		return 1;
    336 	}
    337 	return 0;
    338 }
    339