tx39.c revision 1.25
1 /* $NetBSD: tx39.c,v 1.25 2001/09/16 15:45:45 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_tx39_debug.h" 40 #include "m38813c.h" 41 #include "tc5165buf.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/kcore.h> 47 48 #include <machine/locore.h> /* cpu_id */ 49 #include <machine/bootinfo.h> /* bootinfo */ 50 #include <machine/sysconf.h> /* platform */ 51 52 #include <machine/platid.h> 53 #include <machine/platid_mask.h> 54 55 #include <machine/bus.h> 56 #include <machine/intr.h> 57 58 #include <hpcmips/hpcmips/machdep.h> /* cpu_name */ 59 60 #include <hpcmips/tx/tx39biureg.h> 61 #include <hpcmips/tx/tx39reg.h> 62 #include <hpcmips/tx/tx39var.h> 63 #ifdef TX391X 64 #include <hpcmips/tx/tx3912videovar.h> 65 #endif 66 67 #include <sys/termios.h> 68 #include <sys/ttydefaults.h> 69 #include <hpcmips/tx/tx39uartvar.h> 70 #ifndef CONSPEED 71 #define CONSPEED TTYDEF_SPEED 72 #endif 73 74 /* console keyboard */ 75 #if NM38813C > 0 76 #include <hpcmips/dev/m38813cvar.h> 77 #endif 78 #if NTC5165BUF > 0 79 #include <hpcmips/dev/tc5165bufvar.h> 80 #endif 81 82 struct tx_chipset_tag tx_chipset; 83 84 #ifdef TX39_DEBUG 85 u_int32_t tx39debugflag; 86 #endif 87 88 void tx_init(void); 89 int tx39icu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t); 90 void tx39clock_cpuspeed(int*, int*); 91 92 /* TX39-specific initialization vector */ 93 void tx_cons_init(void); 94 void tx_fb_init(caddr_t*); 95 void tx_mem_init(paddr_t); 96 void tx_find_dram(paddr_t, paddr_t); 97 void tx_reboot(int, char *); 98 int tx_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t); 99 100 extern phys_ram_seg_t mem_clusters[]; 101 extern int mem_cluster_cnt; 102 103 void 104 tx_init() 105 { 106 tx_chipset_tag_t tc; 107 int model, rev; 108 int cpuclock; 109 110 tc = tx_conf_get_tag(); 111 /* 112 * Platform Specific Function Hooks 113 */ 114 platform.cpu_idle = NULL; /* not implemented yet */ 115 platform.cons_init = tx_cons_init; 116 platform.fb_init = tx_fb_init; 117 platform.mem_init = tx_mem_init; 118 platform.reboot = tx_reboot; 119 platform.iointr = tx39icu_intr; 120 121 model = MIPS_PRID_REV(cpu_id); 122 123 switch (model) { 124 default: 125 /* Unknown TOSHIBA TX39-series */ 126 sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model); 127 break; 128 case TMPR3912: 129 tx39clock_cpuspeed(&cpuclock, &cpuspeed); 130 131 sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz", 132 cpuclock / 1000000, (cpuclock % 1000000) / 10000); 133 tc->tc_chipset = __TX391X; 134 break; 135 case TMPR3922: 136 tx39clock_cpuspeed(&cpuclock, &cpuspeed); 137 rev = tx_conf_read(tc, TX3922_REVISION_REG); 138 139 sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x " 140 "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf, 141 cpuclock / 1000000, (cpuclock % 1000000) / 10000); 142 tc->tc_chipset = __TX392X; 143 break; 144 } 145 } 146 147 void 148 tx_fb_init(kernend) 149 caddr_t *kernend; 150 { 151 #ifdef TX391X 152 paddr_t fb_end; 153 154 fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start + 155 mem_clusters[0].size - 1); 156 tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end); 157 158 /* Skip V-RAM area */ 159 *kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end); 160 #endif /* TX391X */ 161 #ifdef TX392X 162 /* 163 * Plum V-RAM isn't accessible until pmap_bootstrap, 164 * at this time, frame buffer device is disabled. 165 */ 166 bootinfo->fb_addr = 0; 167 #endif /* TX392X */ 168 } 169 170 void 171 tx_mem_init(kernend) 172 paddr_t kernend; 173 { 174 mem_clusters[0].start = 0; 175 mem_clusters[0].size = kernend; 176 mem_cluster_cnt = 1; 177 /* search DRAM bank 0 */ 178 tx_find_dram(kernend, 0x02000000); 179 180 /* search DRAM bank 1 */ 181 tx_find_dram(0x02000000, 0x04000000); 182 /* 183 * Clear currently unused D-RAM area 184 * (For reboot Windows CE clearly) 185 */ 186 memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - 187 (KERNBASE + 0x800)); 188 } 189 190 void 191 tx_find_dram(start, end) 192 paddr_t start, end; 193 { 194 caddr_t page, startaddr, endaddr; 195 196 startaddr = (void*)MIPS_PHYS_TO_KSEG1(start); 197 endaddr = (void*)MIPS_PHYS_TO_KSEG1(end); 198 199 #define DRAM_MAGIC0 0xac1dcafe 200 #define DRAM_MAGIC1 0x19700220 201 202 page = startaddr; 203 if (badaddr(page, 4)) 204 return; 205 206 *(volatile int *)(page + 0) = DRAM_MAGIC0; 207 *(volatile int *)(page + 4) = DRAM_MAGIC1; 208 wbflush(); 209 210 if (*(volatile int *)(page + 0) != DRAM_MAGIC0 || 211 *(volatile int *)(page + 4) != DRAM_MAGIC1) 212 return; 213 214 for (page += NBPG; page < endaddr; page += NBPG) { 215 if (badaddr(page, 4)) 216 return; 217 218 if (*(volatile int *)(page + 0) == DRAM_MAGIC0 && 219 *(volatile int *)(page + 4) == DRAM_MAGIC1) { 220 goto memend_found; 221 } 222 } 223 224 /* check for 32MByte memory */ 225 page -= NBPG; 226 *(volatile int *)(page + 0) = DRAM_MAGIC0; 227 *(volatile int *)(page + 4) = DRAM_MAGIC1; 228 wbflush(); 229 230 if (*(volatile int *)(page + 0) != DRAM_MAGIC0 || 231 *(volatile int *)(page + 4) != DRAM_MAGIC1) 232 return; /* no memory in this bank */ 233 234 memend_found: 235 mem_clusters[mem_cluster_cnt].start = start; 236 mem_clusters[mem_cluster_cnt].size = page - startaddr; 237 238 /* skip kernel area */ 239 if (mem_cluster_cnt == 1) 240 mem_clusters[mem_cluster_cnt].size -= start; 241 242 mem_cluster_cnt++; 243 } 244 245 void 246 tx_reboot(howto, bootstr) 247 int howto; 248 char *bootstr; 249 { 250 goto *(u_int32_t *)MIPS_RESET_EXC_VEC; 251 } 252 253 void 254 tx_cons_init() 255 { 256 int slot; 257 #define CONSPLATIDMATCH(p) \ 258 platid_match(&platid, &platid_mask_MACH_##p) 259 260 #ifdef SERIALCONSSLOT 261 slot = SERIALCONSSLOT; 262 #else 263 slot = TX39_UARTA; 264 #endif 265 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) { 266 if(txcom_cnattach(slot, CONSPEED, 267 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) { 268 panic("tx_cons_init: can't attach serial console."); 269 } 270 } else { 271 #if NM38813C > 0 272 if(CONSPLATIDMATCH(VICTOR_INTERLINK) && 273 m38813c_cnattach(TX39_SYSADDR_CARD1)) { 274 goto panic; 275 } 276 #endif 277 #if NTC5165BUF > 0 278 if(CONSPLATIDMATCH(COMPAQ_C) && 279 tc5165buf_cnattach(TX39_SYSADDR_CS3)) { 280 goto panic; 281 } 282 283 if(CONSPLATIDMATCH(SHARP_TELIOS) && 284 tc5165buf_cnattach(TX39_SYSADDR_CS1)) { 285 goto panic; 286 } 287 288 if(CONSPLATIDMATCH(SHARP_MOBILON) && 289 tc5165buf_cnattach(TX39_SYSADDR_MCS0)) { 290 goto panic; 291 } 292 #endif 293 } 294 295 return; 296 panic: 297 panic("tx_cons_init: can't init console"); 298 /* NOTREACHED */ 299 } 300 301 void 302 tx_conf_register_intr(t, intrt) 303 tx_chipset_tag_t t; 304 void *intrt; 305 { 306 KASSERT(t == &tx_chipset); 307 308 tx_chipset.tc_intrt = intrt; 309 } 310 311 void 312 tx_conf_register_power(t, powert) 313 tx_chipset_tag_t t; 314 void *powert; 315 { 316 KASSERT(t == &tx_chipset); 317 318 tx_chipset.tc_powert = powert; 319 } 320 321 void 322 tx_conf_register_clock(t, clockt) 323 tx_chipset_tag_t t; 324 void *clockt; 325 { 326 KASSERT(t == &tx_chipset); 327 328 tx_chipset.tc_clockt = clockt; 329 } 330 331 void 332 tx_conf_register_sound(t, soundt) 333 tx_chipset_tag_t t; 334 void *soundt; 335 { 336 KASSERT(t == &tx_chipset); 337 338 tx_chipset.tc_soundt = soundt; 339 } 340 341 void 342 tx_conf_register_video(t, videot) 343 tx_chipset_tag_t t; 344 void *videot; 345 { 346 KASSERT(t == &tx_chipset); 347 348 tx_chipset.tc_videot = videot; 349 } 350 351 int 352 __is_set_print(reg, mask, name) 353 u_int32_t reg; 354 int mask; 355 char *name; 356 { 357 const char onoff[2] = "_x"; 358 int ret = reg & mask ? 1 : 0; 359 360 printf("%s[%c] ", name, onoff[ret]); 361 362 return (ret); 363 } 364
Indexes created Fri Oct 31 11:10:07 GMT 2025