tx39.c revision 1.26 1 /* $NetBSD: tx39.c,v 1.26 2001/09/17 17:03:45 uch Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include "opt_tx39_debug.h"
40 #include "m38813c.h"
41 #include "tc5165buf.h"
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45
46 #include <machine/locore.h> /* cpu_id */
47 #include <machine/bootinfo.h> /* bootinfo */
48 #include <machine/sysconf.h> /* platform */
49
50 #include <machine/platid.h>
51 #include <machine/platid_mask.h>
52
53 #include <machine/bus.h>
54
55 #include <hpcmips/hpcmips/machdep.h> /* cpu_name, mem_cluster */
56
57 #include <hpcmips/tx/tx39biureg.h>
58 #include <hpcmips/tx/tx39reg.h>
59 #include <hpcmips/tx/tx39var.h>
60 #ifdef TX391X
61 #include <hpcmips/tx/tx3912videovar.h>
62 #endif
63
64 #include <sys/termios.h>
65 #include <sys/ttydefaults.h>
66 #include <hpcmips/tx/tx39uartvar.h>
67 #ifndef CONSPEED
68 #define CONSPEED TTYDEF_SPEED
69 #endif
70
71 /* console keyboard */
72 #if NM38813C > 0
73 #include <hpcmips/dev/m38813cvar.h>
74 #endif
75 #if NTC5165BUF > 0
76 #include <hpcmips/dev/tc5165bufvar.h>
77 #endif
78
79 struct tx_chipset_tag tx_chipset;
80
81 #ifdef TX39_DEBUG
82 u_int32_t tx39debugflag;
83 #endif
84
85 void tx_init(void);
86 int tx39icu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
87 void tx39clock_cpuspeed(int *, int *);
88
89 /* TX39-specific initialization vector */
90 void tx_cons_init(void);
91 void tx_fb_init(caddr_t *);
92 void tx_mem_init(paddr_t);
93 void tx_find_dram(paddr_t, paddr_t);
94 void tx_reboot(int, char *);
95 int tx_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
96
97 void
98 tx_init()
99 {
100 tx_chipset_tag_t tc;
101 int model, rev;
102 int cpuclock;
103
104 tc = tx_conf_get_tag();
105 /*
106 * Platform Specific Function Hooks
107 */
108 platform.cpu_idle = NULL; /* not implemented yet */
109 platform.cons_init = tx_cons_init;
110 platform.fb_init = tx_fb_init;
111 platform.mem_init = tx_mem_init;
112 platform.reboot = tx_reboot;
113 platform.iointr = tx39icu_intr;
114
115 model = MIPS_PRID_REV(cpu_id);
116
117 switch (model) {
118 default:
119 /* Unknown TOSHIBA TX39-series */
120 sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
121 break;
122 case TMPR3912:
123 tx39clock_cpuspeed(&cpuclock, &cpuspeed);
124
125 sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
126 cpuclock / 1000000, (cpuclock % 1000000) / 10000);
127 tc->tc_chipset = __TX391X;
128 break;
129 case TMPR3922:
130 tx39clock_cpuspeed(&cpuclock, &cpuspeed);
131 rev = tx_conf_read(tc, TX3922_REVISION_REG);
132
133 sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
134 "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
135 cpuclock / 1000000, (cpuclock % 1000000) / 10000);
136 tc->tc_chipset = __TX392X;
137 break;
138 }
139 }
140
141 void
142 tx_fb_init(caddr_t *kernend)
143 {
144 #ifdef TX391X
145 paddr_t fb_end;
146
147 fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
148 mem_clusters[0].size - 1);
149 tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
150
151 /* Skip V-RAM area */
152 *kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end);
153 #endif /* TX391X */
154 #ifdef TX392X
155 /*
156 * Plum V-RAM isn't accessible until pmap_bootstrap,
157 * at this time, frame buffer device is disabled.
158 */
159 bootinfo->fb_addr = 0;
160 #endif /* TX392X */
161 }
162
163 void
164 tx_mem_init(paddr_t kernend)
165 {
166
167 mem_clusters[0].start = 0;
168 mem_clusters[0].size = kernend;
169 mem_cluster_cnt = 1;
170 /* search DRAM bank 0 */
171 tx_find_dram(kernend, 0x02000000);
172
173 /* search DRAM bank 1 */
174 tx_find_dram(0x02000000, 0x04000000);
175 /*
176 * Clear currently unused D-RAM area
177 * (For reboot Windows CE clearly)
178 */
179 memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF -
180 (KERNBASE + 0x800));
181 }
182
183 void
184 tx_find_dram(paddr_t start, paddr_t end)
185 {
186 caddr_t page, startaddr, endaddr;
187
188 startaddr = (void*)MIPS_PHYS_TO_KSEG1(start);
189 endaddr = (void*)MIPS_PHYS_TO_KSEG1(end);
190
191 #define DRAM_MAGIC0 0xac1dcafe
192 #define DRAM_MAGIC1 0x19700220
193
194 page = startaddr;
195 if (badaddr(page, 4))
196 return;
197
198 *(volatile int *)(page + 0) = DRAM_MAGIC0;
199 *(volatile int *)(page + 4) = DRAM_MAGIC1;
200 wbflush();
201
202 if (*(volatile int *)(page + 0) != DRAM_MAGIC0 ||
203 *(volatile int *)(page + 4) != DRAM_MAGIC1)
204 return;
205
206 for (page += NBPG; page < endaddr; page += NBPG) {
207 if (badaddr(page, 4))
208 return;
209
210 if (*(volatile int *)(page + 0) == DRAM_MAGIC0 &&
211 *(volatile int *)(page + 4) == DRAM_MAGIC1) {
212 goto memend_found;
213 }
214 }
215
216 /* check for 32MByte memory */
217 page -= NBPG;
218 *(volatile int *)(page + 0) = DRAM_MAGIC0;
219 *(volatile int *)(page + 4) = DRAM_MAGIC1;
220 wbflush();
221
222 if (*(volatile int *)(page + 0) != DRAM_MAGIC0 ||
223 *(volatile int *)(page + 4) != DRAM_MAGIC1)
224 return; /* no memory in this bank */
225
226 memend_found:
227 mem_clusters[mem_cluster_cnt].start = start;
228 mem_clusters[mem_cluster_cnt].size = page - startaddr;
229
230 /* skip kernel area */
231 if (mem_cluster_cnt == 1)
232 mem_clusters[mem_cluster_cnt].size -= start;
233
234 mem_cluster_cnt++;
235 }
236
237 void
238 tx_reboot(int howto, char *bootstr)
239 {
240
241 goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
242 }
243
244 void
245 tx_cons_init()
246 {
247 int slot;
248 #define CONSPLATIDMATCH(p) \
249 platid_match(&platid, &platid_mask_MACH_##p)
250
251 #ifdef SERIALCONSSLOT
252 slot = SERIALCONSSLOT;
253 #else
254 slot = TX39_UARTA;
255 #endif
256 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
257 if(txcom_cnattach(slot, CONSPEED,
258 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
259 panic("tx_cons_init: can't attach serial console.");
260 }
261 } else {
262 #if NM38813C > 0
263 if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
264 m38813c_cnattach(TX39_SYSADDR_CARD1)) {
265 goto panic;
266 }
267 #endif
268 #if NTC5165BUF > 0
269 if(CONSPLATIDMATCH(COMPAQ_C) &&
270 tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
271 goto panic;
272 }
273
274 if(CONSPLATIDMATCH(SHARP_TELIOS) &&
275 tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
276 goto panic;
277 }
278
279 if(CONSPLATIDMATCH(SHARP_MOBILON) &&
280 tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
281 goto panic;
282 }
283 #endif
284 }
285
286 return;
287 panic:
288 panic("tx_cons_init: can't init console");
289 /* NOTREACHED */
290 }
291
292 void
293 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
294 {
295
296 KASSERT(t == &tx_chipset);
297 tx_chipset.tc_intrt = intrt;
298 }
299
300 void
301 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
302 {
303
304 KASSERT(t == &tx_chipset);
305 tx_chipset.tc_powert = powert;
306 }
307
308 void
309 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
310 {
311
312 KASSERT(t == &tx_chipset);
313 tx_chipset.tc_clockt = clockt;
314 }
315
316 void
317 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
318 {
319
320 KASSERT(t == &tx_chipset);
321 tx_chipset.tc_soundt = soundt;
322 }
323
324 void
325 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
326 {
327
328 KASSERT(t == &tx_chipset);
329 tx_chipset.tc_videot = videot;
330 }
331
332 int
333 __is_set_print(u_int32_t reg, int mask, char *name)
334 {
335 const char onoff[2] = "_x";
336 int ret = reg & mask ? 1 : 0;
337
338 printf("%s[%c] ", name, onoff[ret]);
339
340 return (ret);
341 }
342