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tx39.c revision 1.27 
      1 /*	$NetBSD: tx39.c,v 1.27 2001/09/23 14:32:53 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include "opt_vr41xx.h"
     40 #include "opt_tx39xx.h"
     41 #include "opt_tx39_debug.h"
     42 #include "m38813c.h"
     43 #include "tc5165buf.h"
     44 
     45 #include <sys/param.h>
     46 #include <sys/systm.h>
     47 
     48 #include <machine/locore.h>   /* cpu_id */
     49 #include <machine/bootinfo.h> /* bootinfo */
     50 #include <machine/sysconf.h>  /* platform */
     51 
     52 #include <machine/platid.h>
     53 #include <machine/platid_mask.h>
     54 
     55 #include <machine/bus.h>
     56 
     57 #include <hpcmips/hpcmips/machdep.h> /* cpu_name, mem_cluster */
     58 
     59 #include <hpcmips/tx/tx39biureg.h>
     60 #include <hpcmips/tx/tx39reg.h>
     61 #include <hpcmips/tx/tx39var.h>
     62 #ifdef TX391X
     63 #include <hpcmips/tx/tx3912videovar.h>
     64 #endif
     65 
     66 #include <sys/termios.h>
     67 #include <sys/ttydefaults.h>
     68 #include <hpcmips/tx/tx39uartvar.h>
     69 #ifndef CONSPEED
     70 #define CONSPEED TTYDEF_SPEED
     71 #endif
     72 
     73 /* console keyboard */
     74 #if NM38813C > 0
     75 #include <hpcmips/dev/m38813cvar.h>
     76 #endif
     77 #if NTC5165BUF > 0
     78 #include <hpcmips/dev/tc5165bufvar.h>
     79 #endif
     80 
     81 struct tx_chipset_tag tx_chipset;
     82 
     83 #ifdef TX39_DEBUG
     84 u_int32_t tx39debugflag;
     85 #endif
     86 
     87 void	tx_init(void);
     88 #if defined(VR41XX) && defined(TX39XX)
     89 #define	TX_INTR	tx_intr
     90 #else
     91 #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
     92 #endif
     93 
     94 extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     95 
     96 void	tx39clock_cpuspeed(int *, int *);
     97 
     98 /* TX39-specific initialization vector */
     99 void	tx_cons_init(void);
    100 void    tx_fb_init(caddr_t *);
    101 void    tx_mem_init(paddr_t);
    102 void	tx_find_dram(paddr_t, paddr_t);
    103 void	tx_reboot(int, char *);
    104 
    105 void
    106 tx_init()
    107 {
    108 	tx_chipset_tag_t tc;
    109 	int model, rev;
    110 	int cpuclock;
    111 
    112 	tc = tx_conf_get_tag();
    113 	/*
    114 	 * Platform Specific Function Hooks
    115 	 */
    116 	platform.cpu_intr	= TX_INTR;
    117 	platform.cpu_idle	= NULL; /* not implemented yet */
    118 	platform.cons_init	= tx_cons_init;
    119 	platform.fb_init	= tx_fb_init;
    120 	platform.mem_init	= tx_mem_init;
    121 	platform.reboot		= tx_reboot;
    122 
    123 
    124 	model = MIPS_PRID_REV(cpu_id);
    125 
    126 	switch (model) {
    127 	default:
    128 		/* Unknown TOSHIBA TX39-series */
    129 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
    130 		break;
    131 	case TMPR3912:
    132 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    133 
    134 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
    135 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    136 		tc->tc_chipset = __TX391X;
    137 		break;
    138 	case TMPR3922:
    139 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    140 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    141 
    142 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
    143 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
    144 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    145 		tc->tc_chipset = __TX392X;
    146 		break;
    147 	}
    148 }
    149 
    150 void
    151 tx_fb_init(caddr_t *kernend)
    152 {
    153 #ifdef TX391X
    154 	paddr_t fb_end;
    155 
    156 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
    157 	    mem_clusters[0].size - 1);
    158 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
    159 
    160 	/* Skip V-RAM area */
    161 	*kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end);
    162 #endif /* TX391X */
    163 #ifdef TX392X
    164 	/*
    165 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    166 	 * at this time, frame buffer device is disabled.
    167 	 */
    168 	bootinfo->fb_addr = 0;
    169 #endif /* TX392X */
    170 }
    171 
    172 void
    173 tx_mem_init(paddr_t kernend)
    174 {
    175 
    176 	mem_clusters[0].start = 0;
    177 	mem_clusters[0].size = kernend;
    178 	mem_cluster_cnt = 1;
    179 	/* search DRAM bank 0 */
    180 	tx_find_dram(kernend, 0x02000000);
    181 
    182 	/* search DRAM bank 1 */
    183 	tx_find_dram(0x02000000, 0x04000000);
    184 	/*
    185 	 *  Clear currently unused D-RAM area
    186 	 *  (For reboot Windows CE clearly)
    187 	 */
    188 	memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF -
    189 	    (KERNBASE + 0x800));
    190 }
    191 
    192 void
    193 tx_find_dram(paddr_t start, paddr_t end)
    194 {
    195 	caddr_t page, startaddr, endaddr;
    196 
    197 	startaddr = (void*)MIPS_PHYS_TO_KSEG1(start);
    198 	endaddr = (void*)MIPS_PHYS_TO_KSEG1(end);
    199 
    200 #define DRAM_MAGIC0 0xac1dcafe
    201 #define DRAM_MAGIC1 0x19700220
    202 
    203 	page = startaddr;
    204 	if (badaddr(page, 4))
    205 		return;
    206 
    207 	*(volatile int *)(page + 0) = DRAM_MAGIC0;
    208 	*(volatile int *)(page + 4) = DRAM_MAGIC1;
    209 	wbflush();
    210 
    211 	if (*(volatile int *)(page + 0) != DRAM_MAGIC0 ||
    212 	    *(volatile int *)(page + 4) != DRAM_MAGIC1)
    213 		return;
    214 
    215 	for (page += NBPG; page < endaddr; page += NBPG) {
    216 		if (badaddr(page, 4))
    217 			return;
    218 
    219 		if (*(volatile int *)(page + 0) == DRAM_MAGIC0 &&
    220 		    *(volatile int *)(page + 4) == DRAM_MAGIC1) {
    221 			goto memend_found;
    222 		}
    223 	}
    224 
    225 	/* check for 32MByte memory */
    226 	page -= NBPG;
    227 	*(volatile int *)(page + 0) = DRAM_MAGIC0;
    228 	*(volatile int *)(page + 4) = DRAM_MAGIC1;
    229 	wbflush();
    230 
    231 	if (*(volatile int *)(page + 0) != DRAM_MAGIC0 ||
    232 	    *(volatile int *)(page + 4) != DRAM_MAGIC1)
    233 		return; /* no memory in this bank */
    234 
    235  memend_found:
    236 	mem_clusters[mem_cluster_cnt].start = start;
    237 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
    238 
    239 	/* skip kernel area */
    240 	if (mem_cluster_cnt == 1)
    241 		mem_clusters[mem_cluster_cnt].size -= start;
    242 
    243 	mem_cluster_cnt++;
    244 }
    245 
    246 void
    247 tx_reboot(int howto, char *bootstr)
    248 {
    249 
    250 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    251 }
    252 
    253 void
    254 tx_cons_init()
    255 {
    256 	int slot;
    257 #define CONSPLATIDMATCH(p)						\
    258 	platid_match(&platid, &platid_mask_MACH_##p)
    259 
    260 #ifdef SERIALCONSSLOT
    261 	slot = SERIALCONSSLOT;
    262 #else
    263 	slot = TX39_UARTA;
    264 #endif
    265 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    266 		if(txcom_cnattach(slot, CONSPEED,
    267 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    268 			panic("tx_cons_init: can't attach serial console.");
    269 		}
    270 	} else {
    271 #if NM38813C > 0
    272 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    273 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    274 			goto panic;
    275 		}
    276 #endif
    277 #if NTC5165BUF > 0
    278 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    279 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
    280 			goto panic;
    281 		}
    282 
    283 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    284 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    285 			goto panic;
    286 		}
    287 
    288 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
    289 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
    290 			goto panic;
    291 		}
    292 #endif
    293 	}
    294 
    295 	return;
    296  panic:
    297 	panic("tx_cons_init: can't init console");
    298 	/* NOTREACHED */
    299 }
    300 
    301 void
    302 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
    303 {
    304 
    305 	KASSERT(t == &tx_chipset);
    306 	tx_chipset.tc_intrt = intrt;
    307 }
    308 
    309 void
    310 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
    311 {
    312 
    313 	KASSERT(t == &tx_chipset);
    314 	tx_chipset.tc_powert = powert;
    315 }
    316 
    317 void
    318 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
    319 {
    320 
    321 	KASSERT(t == &tx_chipset);
    322 	tx_chipset.tc_clockt = clockt;
    323 }
    324 
    325 void
    326 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
    327 {
    328 
    329 	KASSERT(t == &tx_chipset);
    330 	tx_chipset.tc_soundt = soundt;
    331 }
    332 
    333 void
    334 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
    335 {
    336 
    337 	KASSERT(t == &tx_chipset);
    338 	tx_chipset.tc_videot = videot;
    339 }
    340 
    341 int
    342 __is_set_print(u_int32_t reg, int mask, char *name)
    343 {
    344 	const char onoff[2] = "_x";
    345 	int ret = reg & mask ? 1 : 0;
    346 
    347 	printf("%s[%c] ", name, onoff[ret]);
    348 
    349 	return (ret);
    350 }
    351