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tx39.c revision 1.31 
      1 /*	$NetBSD: tx39.c,v 1.31 2002/01/31 17:56:35 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include "opt_vr41xx.h"
     40 #include "opt_tx39xx.h"
     41 #include "m38813c.h"
     42 #include "tc5165buf.h"
     43 
     44 #include <sys/param.h>
     45 #include <sys/systm.h>
     46 
     47 #include <mips/cache.h>
     48 
     49 #include <machine/locore.h>   /* cpu_id */
     50 #include <machine/bootinfo.h> /* bootinfo */
     51 #include <machine/sysconf.h>  /* platform */
     52 #include <machine/vmparam.h>  /* mem_cluster */
     53 
     54 #include <machine/platid.h>
     55 #include <machine/platid_mask.h>
     56 
     57 #include <machine/bus.h>
     58 
     59 #include <hpcmips/tx/tx39biureg.h>
     60 #include <hpcmips/tx/tx39reg.h>
     61 #include <hpcmips/tx/tx39var.h>
     62 #ifdef TX391X
     63 #include <hpcmips/tx/tx3912videovar.h>
     64 #endif
     65 
     66 #include <sys/termios.h>
     67 #include <sys/ttydefaults.h>
     68 #include <hpcmips/tx/tx39uartvar.h>
     69 #ifndef CONSPEED
     70 #define CONSPEED TTYDEF_SPEED
     71 #endif
     72 
     73 /* console keyboard */
     74 #if NM38813C > 0
     75 #include <hpcmips/dev/m38813cvar.h>
     76 #endif
     77 #if NTC5165BUF > 0
     78 #include <hpcmips/dev/tc5165bufvar.h>
     79 #endif
     80 
     81 struct tx_chipset_tag tx_chipset;
     82 
     83 void	tx_init(void);
     84 #if defined(VR41XX) && defined(TX39XX)
     85 #define	TX_INTR	tx_intr
     86 #else
     87 #define	TX_INTR	cpu_intr	/* locore_mips3 directly call this */
     88 #endif
     89 
     90 extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
     91 
     92 void	tx39clock_cpuspeed(int *, int *);
     93 
     94 /* TX39-specific initialization vector */
     95 void	tx_cons_init(void);
     96 void    tx_fb_init(caddr_t *);
     97 void    tx_mem_init(paddr_t);
     98 void	tx_find_dram(paddr_t, paddr_t);
     99 void	tx_reboot(int, char *);
    100 
    101 void
    102 tx_init()
    103 {
    104 	tx_chipset_tag_t tc;
    105 	int model, rev;
    106 	int cpuclock;
    107 
    108 	tc = tx_conf_get_tag();
    109 	/*
    110 	 * Platform Specific Function Hooks
    111 	 */
    112 	platform.cpu_intr	= TX_INTR;
    113 	platform.cpu_idle	= NULL; /* not implemented yet */
    114 	platform.cons_init	= tx_cons_init;
    115 	platform.fb_init	= tx_fb_init;
    116 	platform.mem_init	= tx_mem_init;
    117 	platform.reboot		= tx_reboot;
    118 
    119 
    120 	model = MIPS_PRID_REV(cpu_id);
    121 
    122 	switch (model) {
    123 	default:
    124 		/* Unknown TOSHIBA TX39-series */
    125 		sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
    126 		break;
    127 	case TMPR3912:
    128 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    129 
    130 		sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
    131 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    132 		tc->tc_chipset = __TX391X;
    133 		break;
    134 	case TMPR3922:
    135 		tx39clock_cpuspeed(&cpuclock, &cpuspeed);
    136 		rev = tx_conf_read(tc, TX3922_REVISION_REG);
    137 
    138 		sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
    139 		    "%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
    140 		    cpuclock / 1000000, (cpuclock % 1000000) / 10000);
    141 		tc->tc_chipset = __TX392X;
    142 		break;
    143 	}
    144 }
    145 
    146 void
    147 tx_fb_init(caddr_t *kernend)
    148 {
    149 #ifdef TX391X
    150 	paddr_t fb_end;
    151 
    152 	fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
    153 	    mem_clusters[0].size - 1);
    154 	tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
    155 
    156 	/* Skip V-RAM area */
    157 	*kernend = (caddr_t)MIPS_PHYS_TO_KSEG0(fb_end);
    158 #endif /* TX391X */
    159 #ifdef TX392X
    160 	/*
    161 	 *  Plum V-RAM isn't accessible until pmap_bootstrap,
    162 	 * at this time, frame buffer device is disabled.
    163 	 */
    164 	bootinfo->fb_addr = 0;
    165 #endif /* TX392X */
    166 }
    167 
    168 void
    169 tx_mem_init(paddr_t kernend)
    170 {
    171 
    172 	mem_clusters[0].start = 0;
    173 	mem_clusters[0].size = kernend;
    174 	mem_cluster_cnt = 1;
    175 	/* search DRAM bank 0 */
    176 	tx_find_dram(kernend, 0x02000000);
    177 
    178 	/* search DRAM bank 1 */
    179 	tx_find_dram(0x02000000, 0x04000000);
    180 }
    181 
    182 void
    183 tx_find_dram(paddr_t start, paddr_t end)
    184 {
    185 	caddr_t page, startaddr, endaddr;
    186 	u_int32_t magic0, magic1;
    187 #define MAGIC0		(*(__volatile u_int32_t *)(page + 0))
    188 #define MAGIC1		(*(__volatile u_int32_t *)(page + 4))
    189 
    190 	startaddr = (void *)MIPS_PHYS_TO_KSEG1(start);
    191 	endaddr = (void *)MIPS_PHYS_TO_KSEG1(end);
    192 
    193 	page = startaddr;
    194 	if (badaddr(page, 4))
    195 		return;
    196 
    197 	do {
    198 		magic0 = random();
    199 		magic1 = random();
    200 	} while (MAGIC0 == magic0 || MAGIC0 == magic1);
    201 
    202 	MAGIC0 = magic0;
    203 	MAGIC1 = magic1;
    204 	wbflush();
    205 
    206 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    207 		return;
    208 
    209 	for (page += NBPG; page < endaddr; page += NBPG) {
    210 		if (badaddr(page, 4))
    211 			return;
    212 		if (MAGIC0 == magic0 &&
    213 		    MAGIC1 == magic1) {
    214 			goto memend_found;
    215 		}
    216 	}
    217 
    218 	/* check for 32MByte memory */
    219 	page -= NBPG;
    220 	MAGIC0 = magic0;
    221 	MAGIC1 = magic1;
    222 	wbflush();
    223 	if (MAGIC0 != magic0 || MAGIC1 != magic1)
    224 		return; /* no memory in this bank */
    225 
    226  memend_found:
    227 	mem_clusters[mem_cluster_cnt].start = start;
    228 	mem_clusters[mem_cluster_cnt].size = page - startaddr;
    229 
    230 	/* skip kernel area */
    231 	if (mem_cluster_cnt == 1)
    232 		mem_clusters[mem_cluster_cnt].size -= start;
    233 
    234 	mem_cluster_cnt++;
    235 #undef MAGIC0
    236 #undef MAGIC1
    237 }
    238 
    239 void
    240 tx_reboot(int howto, char *bootstr)
    241 {
    242 
    243 	goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
    244 }
    245 
    246 void
    247 tx_cons_init()
    248 {
    249 	int slot;
    250 #define CONSPLATIDMATCH(p)						\
    251 	platid_match(&platid, &platid_mask_MACH_##p)
    252 
    253 #ifdef SERIALCONSSLOT
    254 	slot = SERIALCONSSLOT;
    255 #else
    256 	slot = TX39_UARTA;
    257 #endif
    258 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    259 		if(txcom_cnattach(slot, CONSPEED,
    260 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    261 			panic("tx_cons_init: can't attach serial console.");
    262 		}
    263 	} else {
    264 #if NM38813C > 0
    265 		if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
    266 		    m38813c_cnattach(TX39_SYSADDR_CARD1)) {
    267 			goto panic;
    268 		}
    269 #endif
    270 #if NTC5165BUF > 0
    271 		if(CONSPLATIDMATCH(COMPAQ_C) &&
    272 		    tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
    273 			goto panic;
    274 		}
    275 
    276 		if(CONSPLATIDMATCH(SHARP_TELIOS) &&
    277 		    tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
    278 			goto panic;
    279 		}
    280 
    281 		if(CONSPLATIDMATCH(SHARP_MOBILON) &&
    282 		    tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
    283 			goto panic;
    284 		}
    285 #endif
    286 	}
    287 
    288 	return;
    289  panic:
    290 	panic("tx_cons_init: can't init console");
    291 	/* NOTREACHED */
    292 }
    293 
    294 void
    295 tx_conf_register_intr(tx_chipset_tag_t t, void *intrt)
    296 {
    297 
    298 	KASSERT(t == &tx_chipset);
    299 	tx_chipset.tc_intrt = intrt;
    300 }
    301 
    302 void
    303 tx_conf_register_power(tx_chipset_tag_t t, void *powert)
    304 {
    305 
    306 	KASSERT(t == &tx_chipset);
    307 	tx_chipset.tc_powert = powert;
    308 }
    309 
    310 void
    311 tx_conf_register_clock(tx_chipset_tag_t t, void *clockt)
    312 {
    313 
    314 	KASSERT(t == &tx_chipset);
    315 	tx_chipset.tc_clockt = clockt;
    316 }
    317 
    318 void
    319 tx_conf_register_sound(tx_chipset_tag_t t, void *soundt)
    320 {
    321 
    322 	KASSERT(t == &tx_chipset);
    323 	tx_chipset.tc_soundt = soundt;
    324 }
    325 
    326 void
    327 tx_conf_register_video(tx_chipset_tag_t t, void *videot)
    328 {
    329 
    330 	KASSERT(t == &tx_chipset);
    331 	tx_chipset.tc_videot = videot;
    332 }
    333